Wireless LAN system designers are carefully evaluating the promises of the proposed IEEE 802.11 standard. Part of this design engineering analysis takes into account various issues that can have adverse effects on new designs. In particular, in the RF section, the system designer must now discard the conventional, more costly, double- conversion superheterodyne architecture and move toward newer, more cost-effective ones like direct conversion, also known as zero IF.
Doing so not only meets the low-cost, low-power system requirements but also further boosts a fast-growing home wireless networking market. Therefore, it is vital for system designers to get a handle on new, emerging chip technologies that replace older, traditional RF architectures.
The goal of the IEEE 802.11 standard is to tailor a model of operation to resolve interoperability issues among manufacturers of wireless LAN (WLAN) equipment. Thus far, the 802.11 standards committee is revising a previous version of the medium access control (MAC) and physical (PHY) levels. Essentially, the MAC is composed of several functional blocks, while the PHY includes diffused infrared, direct-sequence spread-spectrum (DSSS) and frequency-hopping spread spectrum (FHSS). Both spread-spectrum techniques are used in the 2.4-GHz band due to its wide availability in many countries and lower hardware costs compared with the higher microwave frequency bands.
The IEEE standard supports DSSS for use with binary phase shift keying (BPSK) modulation at a 1-Mbit/second data rate and quadrature phase shift keying (QPSK) modulation at a 2-Mbit/s data rate. The 80-MHz-wide ISM band at 2.4 GHz has 79 frequency-hopping channels that are 1 MHz wide. The DSSS has an RF modulation bandwidth of 22 MHz (null to null), with 11 overlapping channels that have a 5-MHz separation. Overlapping channels are used when there is sufficient geographical distance or RF isolation between different WLAN networks.
IEEE 802.11a specifies the PHY for an orthogonal frequency division multiplexing (OFDM) system and additions that must be made to the base standard to handle the OFDM PHY. This RF LAN system is initially aimed at the unlicensed national information infrastructure (U-NII) bands, at 5.15-to-5.25 GHz, 5.25-to-5.35 GHz, and 5.725-to- 5.825 GHz.
The OFDM system provides a WLAN with data payload communication capabilities of 6, 9, 12, 18, 24, 36, 48 and 54 Mbits/s. All compliant implementations must transmit and receive at data rates of 6, 12 and 24 Mbits/s. This system uses 52 subcarriers, which are modulated using BPSK/QPSK, 16 quadrature amplitude modulation (QAM), or 64 QAM techniques.
IEEE 802.11b uses complementary code keying (CCK) modulation, but at 11 Mbits/s, it has a lower data rate than that of OFDM. This specification is the high-rate extension of the PHY for the DSSS system (HR/DSSS). This radio-frequency LAN system is targeted at the 2.4-GHz bands designated for industrial, scientific and medical (ISM) applications. The CCK modulation scheme provides interoperability with 802.11 direct sequence equipment operating at 1 and 2 Mbits/s, and also offers rates of 5.5 and 11 Mbits/s for applications requiring more speed.
Since the economies of WLAN home applications call for tightly integrated chip functionality, system engineers must move toward novel architectures, such as low-cost direct conversion. In this architecture, the signal directly down-converts from 2.4 GHz to 0 Hz I (in-channel) and Q (quadrature channel) modulation outputs for the receiver and vice versa for the transmitter.
Wireless LAN system engineers need to be aware of several key issues that must be overcome for the successful implementation of a direct conversion architecture to comply with 802.11b CCK modulation requirements. On the receiver side, the biggest problem is the local oscillator (LO) self-mixing, in which the LO that drives the I and Q mixers leaks to the RF port of the mixer. This is due to direct leakage through the mixer and other leakage paths to the front-end RF low-noise amplifier (LNA) and the mixer RF port. This LO leakage produces a very large dc offset at the output of the mixer due to self-mixing. Smaller, but time varying, dc offsets are also produced from out-of-band jammers. These dc offsets have to be kept significantly below the desired signal to prevent degradation of the overall signal-to-noise ratio.
One approach to this issue is to use a dc cancellation mechanism distributed throughout the baseband low-pass filter and automatic gain control (AGC) in the I and Q branches, along with circuit design techniques that result in a very low second-order nonlinearity. Additionally, an on-chip 90-dB range digital AGC control loop settles to the final 3-dB nominal output signal level in 8 microseconds. Dc cancellation occurs simultaneously when the AGC is active and reduces a maximum potential dc offset of +50 dBc to -20 dBc relative to a -76 dBm antenna input signal.
Another issue deals with AGC changes. Since the signal has 80 to 90 dB of dynamic range, an automatic gain control must be used. When the AGC setting is changed either in the baseband section or in the RF, the dc offsets change due to variation in the LO leakage paths, and due to dc offsets produced in the baseband I and Q channels. As a result, dc offset cancellation must be performed quickly within about 8 microseconds and at the beginning of the RF burst being received.
Switching between transmit and receive modes poses another problem. The circuits have to settle within 5 microseconds. A very fast synthesizer, along with a fast and clean voltage regulator, is therefore required to remove any frequency glitches in the voltage controlled oscillator (VCO). Another serious problem is keeping the leakage from the transmitter power amplifier output to the VCO at a very small level. The IEEE 802.11 standard demands frequency accuracy of 25 parts per million (PPM) at 2.4 GHz. VCO frequency jumps during transmit to receive switching and, vice versa, must be removed within 10 microseconds so that the error is within 25 PPM.
Another issue is transmitter carrier leakage because QAM is being performed directly onto a carrier at 2.4 GHz in a zero IF transceiver. The 802.11 specification requires a carrier leakage suppression that is equivalent to -25 dBc relative to a single tone modulation signal. When modulation is performed directly at 2.4 GHz, it is difficult to meet this spec.
The transmitter calls for fully integrated, active analog low-pass filters. The purpose of these filters is to spectrally shape the I and Q baseband input signal coming from the modem, and suppress spurious out-of-band tones that may be present. When, as is usually the case, the D/A outputs have four samples per QPSK symbol, very limited filtering is performed in the baseband digital hardware, and most of the spectral shaping is done on the transceiver chip.
The direct QAM modulation at 2.4 GHz in the transmitter creates difficulty in meeting the I-Q gain and phase imbalance requirements. The error vector magnitude due to transmitter distortions-such as filter response, I-Q imbalance, and power amplifier non-linearities-must be kept significantly below the IEEE 802.11b spec of 35 percent. On the receiver side, even though the equalizer and the baseband compensate for channel imperfections, the fully integrated channel filters must have low pass band distortion, while at the same time maintain a high out-of-band attenuation.
These issues can be resolved at the chip level through the careful design of a direct conversion/zero IF transceiver. The receiver should have a 90-dB dynamic range with a 10-microsecond receiver-to-transmitter switching time, and 5 microseconds in the reverse direction. It is important to include features such as a front-end LNA with multiple internal gain states, and a fast, on-chip closed-loop composite RF and IF AGC with an analog receive signal strength indicator output. Also, it must have quadrature down-converters from 2.4 GHz RF directly to zero IF, and on-chip fast baseband dc cancellation with dynamically changing dc cutoff bandwidths of up to 1 MHz and settling time of 3 microseconds or less. The receiver should include fully integrated channel filters for an 11-megasymbol/second QPSK RF modulation.
The transmitter should also have gain control so that the external power amplifier is not overdriven at the high power.
OFDM can present the WLAN system engineer with an expensive design proposition, since a conventional OFDM design uses a considerable amount of discrete components. Designing a transceiver this way is a nightmare for the RF engineer. A more efficient, cost-effective approach for an OFDM transceiver is single-chip gallium arsenide-based circuitry at the front end and a silicon-based direct conversion chip for the back end.
Such a radio architecture maintains the same LO frequencies for both transmitter and receiver. That eliminates changing LO frequencies when switching from transmit to receive and vice versa. Also, since the LOs are common to both the transmitter and receiver, significant silicon area and component costs are saved.
OFDM modulation bandwidth is slightly more than that of CCK. OFDM requires a flat passband frequency response. Sideband rejection also has to be very high. That means that the I and Q gain and phase imbalance in both transmitter and receiver must be small. Another issue is that the required carrier-to-noise ratio at the receiver antenna is significantly high for OFDM. Hence, noise levels and distortions in the transmitter and receiver must be kept small.