The JESD204B specification outlines an interconnect loss keep-out mask based on channel baud rate. Each transmission line will have loss characteristics with some maximum baud rate that just passes this mask. To be compliant, the channel response must stay outside the pre-defined mask area for the baud rate in use. The s-parameter profile can either be modeled in simulation tools prior to PCB fabrication or it can be measured directly once a system board is available. The channel response of this performance will be independent of the compensation methods. But they can help boost the performance of an otherwise poor channel response. For marginally compliant channels or those that require lossy characteristics, some techniques can be used to help the link robustness.
A common question asked by system designers is: How does the insertion loss relate to the quality of the data seen at the input to the receiver? The JESD204B specification outlines the interconnect insertion loss mask to provide guidance to the maximum allowed insertion loss to ensure that data can be recovered at the receiver. The JESD204B Insertion Loss mask limits the signal loss to be better at two key frequency points: -4dB at 1/2 baud rate and -6db at 3/4 baud rate. It is worthwhile noting that the JESD204B Insertion Loss mask assumes two things: the transmitter does not provide any channel compensation in the form of emphasis and the receiver does not provide an equalizer for channel compensation.
Figure 5. JESD204B Insertion Loss Mask vs. Baud Rate and an example of a compliant channel.
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One of the biggest challenges in implementing a multi-gigabit serial interface system, such as JESD204B, is ensuring that the bits from the transmitter arrive at the receiver without misinterpreting any of the original data, especially in applications that require relatively long link distances. Systems requiring backplane interconnects are typical examples of a challenging multi-gigabit serial interface system. The quality of the signal at the receiver highly depends on several factors of the interconnect, including connector type and quality, PCB board material, overall trace length and board typology. These factors contribute directly to insertion loss and return loss characteristics of the interconnect and will have a direct impact on the quality of the signal at the receiver.
The JESD204B specification does not provide details of the various types of connectors, board materials, length or board typology that can be used in a compliant system. Instead, it indicates three key parameters to define the interconnect requirements in order to ensure the quality of the signal at the receiver is maximized for best data recovery: Insertion Loss, Insertion Loss Deviation and receiver eye mask compliance. Return loss per the JESD204B specification is defined to be measured at the pins of the receiver device. The return loss measurement provides information as to how closely matched the termination impedance is relative to an ideal 100 ohm differential. This is extremely important so that reflections are minimized in high speed serial interface systems. The specification defines differential return loss to be -8dB at ¾ of the highest baud rate and common mode return loss of -6dB also at 3/4 of the highest baud rate.
JESD204B multi-gigabit systems operate using differential signaling, thus requiring controlled impedance over the entire transmission line of the link. These channels are mainly characterized using S-parameter analysis because this type of analysis provides key information that is related to the quality of the signal with respect to its frequency content. S-parameters provide insertion loss (S21), insertion loss deviation and return loss (S11) information, which is extremely useful to determine the quality of the signal at the receiver. Insertion loss is the measure of signal loss vs. frequency of the interconnect.
Figure 6. Insertion loss of standard FR4 PCB board traces of various lengths.
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Insertion loss deviation is the difference from the measured insertion loss fitted line and is a direct function of impedance differing from the channel's linear characteristic impedance. Hence, this deviation creates a wave like on the insertion loss plot as the loss varies over frequency due to several factors related to PCB fiberglass weave style and other aspects of the board design that is beyond the scope of this article. Figure 6 shows insertion loss measurements of FR4 PCB interconnects of various lengths. The plot shows a clear trend over longer trance lengths. The longer the interconnect, the greater the insertion loss will be for a given frequency point.
The JESD204B specification requires signals at the far end of the link to comply with a receive data eye mask, in order to provide the receiver an open eye for correct data recovery. PCB dielectric material used for the channel has a large impact on insertion loss.
Figure 7. JESD204B data eye mask seen at the input to the receiver.
Insertion loss is the main cause of eye closure at the end of a serial link. It is a result of the frequency dependent attenuation of the interconnect. This phenomenon is best described as a low pass filter, where the signal is attenuated depending on its frequency content, creating what is commonly known as Inter-Symbol Interference (ISI). ISI is created as a result of different bit transitions in the channel. For example, a bit transition, of 00001111 has lower frequency content than a 10101010 bit transition. This induces smaller signal attenuation in the former sequence versus the latter as data passes through the low pass filtering characteristics of the channel.