The patent is old and probably conceptually invalid due to prior-art. And I'm pretty surprised about the confusion about what it does, as it's fairly straight-forward and easy to read.
What Canon patented here is a specific implementation, not a method, of a two-stage pre-selection of AD reference voltage.
As the signal is presented to the AD section, the absolute voltage is first presented to a comparator circuit. In the "determination period" the comparator sets the AD ramp signal to either a high (fast) reference ramp, or a low (slow) reference ramp.
If the signal is (was) lower than the comparator set point, then the AD works with a slower ramp and after that it scales the result down numerically by a factor of [high ramp] / [low ramp]. This enables a "slower" readout of weak signals, something which offsets the crappy (noisy) AD converters base level noise for low-level signals. Signals stronger than the comparator set point will be digitized with lower precision, but in strong signals that inaccuracy is totally dominated by photon shot noise.
If you use higher quality AD converters or a slower bitrate conversion this two stage setup is not necessary. Often slower reads are implemented by higher parallelism, using more AD converters per image. This is what Sony's Exmor, or indeed any other of the five big one's on-sensor AD conversions. They use the "slow ramp" for all pixels, all the time, anyway.