1. Design Information
In this whitepaper we will define a custom counter system. This counter system will based upon user input, display different patterns across an array of LEDs on the custom CompactRIO module.
This design outlines a new C-Series module for CompactRIO. Within this reference design, elements such as isolation have not been designed or accounted for. In future designs, it is recommended that such design elements be factored into the design.
2. Why Create Custom Modules?
Custom Design is important for engineers who cannot find off the shelf solutions which meet their specific design needs. Whether it is specific I/O acquisition, or the need for custom signal conditioning, custom design is a necessary step for many engineers.
For the CompactRIO platform over 60 NI and 3rd party C-Series I/O modules are available for CompactRIO, however some may not meet the needs of a specific design platform. Circuit design tools such as NI Multisim and Ultiboard can provide the customization to complete the platform. This white paper provides an overview of how you can create a custom module using National Instruments tools.
3. Design Considerations
Designing custom modules for CompactRIO requires adhering to certain design rules. Many of these rules or fundamentals are outlined as a part of the NI Custom Module Development Kit. This kit demonstrates the various licenses, development strategies and support for the development of C Series modules. The kit also comes with a 9951 casing, to encase the PCB for professional deployment and use of the module.
When designing a module it is important to note that:
- The C-Series module connects to the CompactRIO platform through a 15 pin DSub Connector (female connector)
- Basic board size is 7.3381cm by 6.604cm (2.889 inches by 2.600 inches)
- There is an ID EEPROM on the module that identifies the module with vendor ID and Product ID (this is information that is not represented in this reference design)
For this design, the necessary software needed to develop a custom module is shown in the table below:
|Software Requirements for Design
Module Development Resources
Circuit Capture, Simulation, and Layout
Application Development Software
4. Module Functionality
The custom module in this paper is a simple counter with 2 rows of 4 LEDS. Based upon the stimulus sent to the module, these LEDs will light in specific patterns. Though this may not be a broad application, it provides an ideal starting point to showcase the design approach to custom modules.
Aside from the module, we do require LabVIEW code to define the operation of the CompactRIO system. LabVIEW real-time code has been designed for the CompactRIO to take user input and act as a 'master' to the LabVIEW FPGA based 'servant' code. It is this LabVIEW FPGA code which directly controls the functionality of the custom module (lighting the LED in specific patterns).
Figure 1 - Designing the LabVIEW RT and LabVIEW FPGA code for the operation of a Custom Module
The module is based upon a serial to parallel shift register (HCT595). This shift register has eight outputs, as well as enable, clear and data switches. The shift register is connected to eight LEDs which iterate between an on and off state, dependent on the input to the register.
Communication between the FPGA and module is over a synchronous serial data link, called a Serial Peripheral Interface (SPI) bus.
5. Resource Files
Attached to this white paper is a zip file named: 7868_design__files.zip
This contains the following files that can be used to explore custom module design:
- 595_toplevel_test_SPI_LVFPGA.ms10 Multisim schematic and simulation file
- HCT595cRIO.llb Custom LabVIEW instrument for Multisim
- 74HC595.pdf Datasheet for the HCT595
- .../HCT595cRIO/*.* Various LabVIEW FPGA and LabVIEW RT files, for CompactRIO design
These files are available for you to use as a reference to your own custom module designs.
Please note that the versions of these files. Multisim files are for use with version 10.x and higher. LabVIEW files are for use with version 8.6.x and higher.
6. Custom Module Design
Simulation plays an important role in circuit design, to be able to effectively evaluate the behavior of a topology prior to the prototyping stage.
The HCT595 is not a common simulation model, and as such as it was necessary to model the behavior of this device prior to the final schematic being defined for layout. This device is a high-speed Si-gate CMOS device. It is a 8-stage serial shift register with a storage register and 3 output (tri-state) outputs.
Figure 2 - HCT595 operational diagram
Click here to open the HCT595 datasheet.
Based upon the 8 stage shift register setup we are able to accurately model the behavior of the HCT595 system within Multisim, to appropriate define and analyze its simulated behavior. The chip is modelled at a low level by using flip-flops, logic gates, and shift registers to emulate the behavior of a physical chip.
This setup can be seen in the 595_toplevel_test_SPI_LVFPGA.ms10 circuit, available in the attached zip folder.
Figure 3 - HCT595 implemented as elemental flip-flops and logic gates
The model for the serial shift register therefore consists of a shift register (an array of D flip-flops), which are in turn outputting data to a tri-stage output gate.
Shift registers are setup such that the flip-flops are connected linearly, such that once activated, data is shifted through the linear setup of the device.
Tristate gates (U10, U11 in the above image) output one of three values on activation – logical 0, 1 or high impedance. The high impedance state is used to effectively remove the gate/pin influence from the overall circuit.
The entire group of digital design elements, and wires contained within the black boxes together form the HCT595 device model.
Simulation and Design
With the overall model of the HCT595 now available, our next step is to simulate the behavior of the complete system. In the schematic below (595_toplevel_test_SPI_LVFPGA.ms10) we are still performing preliminary design validation, and as such do not yet have to be concerned with placing the specific connectors and LEDs. Instead we can explore the core behavior of the circuit with simulation, prior to completing the design with the accessories that do not necessarily influence behavior.
Figure 4 - Preliminary schematic of design
You will notice that there are three open inputs to this circuit. These inputs define the enable (OEn),data in (Din), and input clock (CLK_SERIAL) to the shift register. In traditional design (with standard design tools) we would iteratively provide a stimulus to each of these inputs to view the various output states. This is manual, and slightly tedious process.
In Multisim we can instead create a custom LabVIEW instrument which operates within the simulation. By leveraging the graphical programming abilities of LabVIEW, we can define instruments which can acquire and measure simulation data within Multisim, and then analyze and present this data visually based upon the specific needs of the application.
Therefore a custom LabVIEW instrument can automate the input of signals to the above circuit, to better replicate the real world performance of the design. By creating a LabVIEW instrument which operates in Multisim, we can develop code that will provide the appropriate stimulus to the circuit in order to light the LEDs. This code, used within Multisim, performs the exact same action, as what is needed in the real world, and as such can be re-deployed as the FPGA code to control the operation of the physical custom module.
This process of utilizing the same stimulus in simulation as for the real circuit, is called virtual prototpyping and bridges the gap between design and test. By providing simulation with the same input as the final circuit, we can better analyze design behavior prior to building the physical prototype.
For this design we therefore construct the below instrument. In Multisim, this instrument inputs three signals to the HCT595 based serial shift register, as it will on the physical circuit.
The exact same code used for this custom instrument will be used for the LabVIEW FPGA code on the actual physical hardware.
Using the HCT595 Instrument
To view the schematic of the design, and utilize simulation to verify the choice/behavior of the HCT595 component:
- Close Multisim
- Browse to c:\Program Files\National Instruments\Circuit Design Suite 10.1\lvinstruments
- Place the attached HCT595cRIO.llb file in this folder
- Open Multisim
- Open the 595_toplevel_test_SPI_LVFPGA.ms10 file.
- Go to instrument toolbar, and select the LabVIEW Instruments icon
- Select the cRIO HCT595 instrument
- Place and connect the instrument to the Oen, Din and CLK_SERIAL pins in the 595_toplevel_test_SPI_LVFPGA.ms10 file (as seen below).
We can now begin simulating the behavior of the circuit, to validate its behavior.
- Double-click on the XLV1 instrument icon (the HCT595 custom instrument)
- Select the LED controls on the image (click once on LED 0, and once LED 3)
- Click on the Go switch
- Select Simulate > Run to begin simulation
- The serial-shift register will wait 9 clock cycles (for data to transfer through the 8 serial shift registers), and will then output the appropriate LEDs as based upon the cRIO instrument.
7. Building the Layout
As mentioned previously the design till this point has been based upon us validating circuit behavior. Now that we have confirmed that the HCT595 will work appropriately with the LabVIEW FPGA code, we can finalize the schematic and layout of the design.
This validated version of the file, is exported to NI Ultiboard where the below figure depicts the 3D equivalent of the board shape and outline.
Ultiboard allows you to export to a number of standard formats including the Gerber format, which is utilized by most fabrication board houses to define a physical prototype. To export the Gerber RS-274X files which can be used by a board house to fabricate the board, select File > Export. Select Gerber RS-274X and click on the Properties button. Select the various layers to export (they are already selected in the attached Ultiboard files), and finalize the Gerber files for the board house. To learn more about the export of Gerber files, view the following resource.
You can personally view the Gerber files for your own design purpose by downloading the following zip folder of manufacturing ready Gerbers.
There are a number of different board houses that are capable of fabricating a board for an engineer based upon the Gerber files sent to them. One such service is sunstone.com. This board manufacturer provides you with the ability to upload Gerbers, and will send you a complete board.
8. CompactRIO Design
With a custom CompactRIO module defined, it is now time to begin defining the code that will operate the LEDs on the module.
There are two coding elements to this design. There is a LabVIEW RT based application which will define the user interface. Secondly there is the LabVIEW FPGA code. This is the same basic alogirthm as of the HCT595 instrument used to prototype the behavior in Multisim. This code controls the flashing LEDs on the custom module.
Contained within the HCT595.lvproj project is the associated code to operate the custom CompactRIO module. This consists fundamentally of the FPGA_HCT595_SPI_Interface.vi and the Pattern Generator.vi. These two elements of LabVIEW code provide the user interface, and FPGA based control of the LEDs on the custom module.
Pattern Generator.vi is the interface to this application. This code loads the appropriate commands to the FPGA based code, and will create patterns of LEDs on the custom module.
FPGA_HCT595_SPI_Interface_LL.vi is the interface to the FPGA. This is the same algorithm as the HCT595 instruments used in Multisim. This re-use of code unifies the design spaces, and importantly provided us with an effective test environment to validate the performance of the circuit, as well as the performance of the algorithm, prior to prototyping. The FPGA_HCT595_SPI_Interface_LL.vi file, along with the Pattern Generator.vi both run on the CompactRIO FPGA target.