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Stitching for CMOS
by Drs. David Cohen and Thomas Reiner
Until recently, charge-coupled device (CCD) technology dominated the field of digital imaging. Since the complementary metal oxide semiconductor (CMOS) process has become the most commonly used technology for manufacturing semiconductor devices, CMOS image sensors have begun to gain prominence in the digital imaging sector. One reason for this is the increased functionality of CMOS over traditional CCD.
CMOS technology provides a number of advantages over CCD. For instance, CMOS offers short time-to-market and excellent flexibility when it comes to chip development, thus enabling the rapid production of new toys, consumer products and equipment with digital imaging capabilities.
Although CCD image sensor technology has evolved over the past 25+ years, it is still difficult to implement and manufacture when compared to CMOS image sensors. Since CMOS technology allows the integration of signal processing functions on the same monolithic silicon as the sensor, it is more cost-efficient than CCD technology, allowing significant overall silicon system cost reductions. Multiple functions can be integrated on a single CMOS image sensor, while CCD technology does not have this capability. For example, analog-to-digital converters, on-chip clock drivers and other signal processing functions can be integrated on a single sensor, whereas CCD systems require an additional chip to provide all of these functions. Moreover, the functional integration of CMOS image sensors results in lower power consumption as compared to CCD systems.
As digital imaging technology has evolved, so has the demand for large-area (35mm or 3:2 format and larger) digital photographic devices that produce extremely detailed, high-resolution pictures and incorporate the most advanced technologies. These two requirements-that is to say, large image sensor area combined with integrated signal processing-mandate devices that are larger than the reticle field used to expose the silicon. This means a method to expose larger areas of silicon is needed, as it is commonly known that in standard CMOS manufacturing processes, chip size is limited to the available field size of the reticle.
STITCHING MASS SEGMENTS
A patented stitching technique from Tower Semiconductor enables the manufacture of larger area CMOS image sensors for use in advanced, large-area digital photographic devices. Transparent to the customer, this technique enables a manufacturer to work with an area greater than the fixed field of exposure by breaking the stepper field size limitation and tiling intra-chip blocks. This fully automated process provides an improved method for stitching mask segments with small minimum feature sizes to form a large structure with seamless boundary regions.