O'm not sure on the intricacies of the different PIC families but in
general a goto or jump may use more memory and clock periods than a
branch. YMMMV dependent on the exact microcontroller family involved.
> What are the differences between the bra opcode and the goto opcode on the
> Pic18F chips?
> Both appear to be an unconditional jump statement; my read is that one is a
> relative jump (bra) and the other is an absolute jump (goto).
> Is the only (practical) difference that GOTO specifies a 20-bit absolute
> address while BRA specifies an 11-bit relative address?
> When should I use one over the other? For instance, in the template .asm
> files, I see that the reset vector uses a GOTO to jump to main code, while
> the interrupt vectors use BRA. Why?
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BRA does use less memory. Look at a disassembly and you'll see that
GOTO (and CALL) are padded with an NOP. On a couple of occassions
I've ported 16F code to an 18F and saved valuable memory changing
GOTOs to BRAs
It can be a helpful indicator, inasmuch as when you see it you know that
where flow is going is not too far away
> For instance, in the template .asm files, I see that the reset vector
> uses a GOTO to jump to main code, while the interrupt vectors use
> BRA. Why?
Must just be that example. Vector addresses are spaced far enough
apart to accomodate a GOTO (there'd be trouble if they weren't)
I've never used BRA for the IRQ vector. Sometimes I put the ISR at
the bottom of memory, sometimes I don't. GOTO will find it wherever
it is. Similarly with main code. It may start at 0x100, perhaps there's a
table below it. A BRA won't reach
Richard Prosser wrote:
> O'm not sure on the intricacies of the different PIC families but in
> general a goto or jump may use more memory and clock periods than a
GOTO and BRA are both two cycle instructions because both force the
prefetched instruction to be discarded. The difference, as clearly
explained in the data sheet, is that GOTO goes to a full absolute address
and takes 2 words, whereas BRA jumps to a limited range relative to the
current location and takes 1 word.
> How come GOTO doesn't take a third cycle to fetch the second word of
> the instruction? Does it actually manage to USE the pre-fetched
> version without any additional penalty?
The second cycle for a BRA instruction is because it can't use the
prefetched instruction following the BRA.
The second cycle for a GOTO/CALL instruction is because it uses the second
word of the instruction. Apparently the second word of the instruction is
available soon enough to change the PC in time to fetch the target of the
GOTO/CALL. I remember being impressed with this when I first saw the 18F
On Dec 16, 2008, at 6:37 PM, Bob Ammerman wrote:
>> How come GOTO doesn't take a third cycle ?
> Apparently the second word of the instruction is available soon
> enough to change the PC in time to fetch the target of the GOTO/
> CALL. I remember being impressed with this when I first saw the 18F
> instruction set.
I'm impressed too. Usually an extra word in the instruction is good
for an extra cycle in execution time, and you still lose a additional
cycle on branches from needing to get the next instruction from
somewhere other than your prefetch buffer...
I wonder if they had to exert effort to make this work, or whether it
fell out of the way that prefetching worked on the PIC16 anyway?