project
string
commit_id
string
target
int64
func
string
idx
int64
FFmpeg
1c010fd035c1a14dc73827b84f21f593e969a5d6
0
static int mxf_read_header(AVFormatContext *s) { MXFContext *mxf = s->priv_data; KLVPacket klv; int64_t essence_offset = 0; int ret; mxf->last_forward_tell = INT64_MAX; mxf->edit_units_per_packet = 1; if (!mxf_read_sync(s->pb, mxf_header_partition_pack_key, 14)) { av_log(s, AV_LOG_ERROR, "could not find header partition pack key\n"); return AVERROR_INVALIDDATA; } avio_seek(s->pb, -14, SEEK_CUR); mxf->fc = s; mxf->run_in = avio_tell(s->pb); mxf_read_random_index_pack(s); while (!url_feof(s->pb)) { const MXFMetadataReadTableEntry *metadata; if (klv_read_packet(&klv, s->pb) < 0) { /* EOF - seek to previous partition or stop */ if(mxf_parse_handle_partition_or_eof(mxf) <= 0) break; else continue; } PRINT_KEY(s, "read header", klv.key); av_dlog(s, "size %"PRIu64" offset %#"PRIx64"\n", klv.length, klv.offset); if (IS_KLV_KEY(klv.key, mxf_encrypted_triplet_key) || IS_KLV_KEY(klv.key, mxf_essence_element_key) || IS_KLV_KEY(klv.key, mxf_avid_essence_element_key) || IS_KLV_KEY(klv.key, mxf_system_item_key)) { if (!mxf->current_partition) { av_log(mxf->fc, AV_LOG_ERROR, "found essence prior to first PartitionPack\n"); return AVERROR_INVALIDDATA; } if (!mxf->current_partition->essence_offset) { /* for OP1a we compute essence_offset * for OPAtom we point essence_offset after the KL (usually op1a_essence_offset + 20 or 25) * TODO: for OP1a we could eliminate this entire if statement, always stopping parsing at op1a_essence_offset * for OPAtom we still need the actual essence_offset though (the KL's length can vary) */ int64_t op1a_essence_offset = round_to_kag(mxf->current_partition->this_partition + mxf->current_partition->pack_length, mxf->current_partition->kag_size) + round_to_kag(mxf->current_partition->header_byte_count, mxf->current_partition->kag_size) + round_to_kag(mxf->current_partition->index_byte_count, mxf->current_partition->kag_size); if (mxf->op == OPAtom) { /* point essence_offset to the actual data * OPAtom has all the essence in one big KLV */ mxf->current_partition->essence_offset = avio_tell(s->pb); mxf->current_partition->essence_length = klv.length; } else { /* NOTE: op1a_essence_offset may be less than to klv.offset (C0023S01.mxf) */ mxf->current_partition->essence_offset = op1a_essence_offset; } } if (!essence_offset) essence_offset = klv.offset; /* seek to footer, previous partition or stop */ if (mxf_parse_handle_essence(mxf) <= 0) break; continue; } else if (!memcmp(klv.key, mxf_header_partition_pack_key, 13) && klv.key[13] >= 2 && klv.key[13] <= 4 && mxf->current_partition) { /* next partition pack - keep going, seek to previous partition or stop */ if(mxf_parse_handle_partition_or_eof(mxf) <= 0) break; else if (mxf->parsing_backward) continue; /* we're still parsing forward. proceed to parsing this partition pack */ } for (metadata = mxf_metadata_read_table; metadata->read; metadata++) { if (IS_KLV_KEY(klv.key, metadata->key)) { int res; if (klv.key[5] == 0x53) { res = mxf_read_local_tags(mxf, &klv, metadata->read, metadata->ctx_size, metadata->type); } else { uint64_t next = avio_tell(s->pb) + klv.length; res = metadata->read(mxf, s->pb, 0, klv.length, klv.key, klv.offset); /* only seek forward, else this can loop for a long time */ if (avio_tell(s->pb) > next) { av_log(s, AV_LOG_ERROR, "read past end of KLV @ %#"PRIx64"\n", klv.offset); return AVERROR_INVALIDDATA; } avio_seek(s->pb, next, SEEK_SET); } if (res < 0) { av_log(s, AV_LOG_ERROR, "error reading header metadata\n"); return res; } break; } } if (!metadata->read) avio_skip(s->pb, klv.length); } /* FIXME avoid seek */ if (!essence_offset) { av_log(s, AV_LOG_ERROR, "no essence\n"); return AVERROR_INVALIDDATA; } avio_seek(s->pb, essence_offset, SEEK_SET); mxf_compute_essence_containers(mxf); /* we need to do this before computing the index tables * to be able to fill in zero IndexDurations with st->duration */ if ((ret = mxf_parse_structural_metadata(mxf)) < 0) goto fail; if ((ret = mxf_compute_index_tables(mxf)) < 0) goto fail; if (mxf->nb_index_tables > 1) { /* TODO: look up which IndexSID to use via EssenceContainerData */ av_log(mxf->fc, AV_LOG_INFO, "got %i index tables - only the first one (IndexSID %i) will be used\n", mxf->nb_index_tables, mxf->index_tables[0].index_sid); } else if (mxf->nb_index_tables == 0 && mxf->op == OPAtom) { av_log(mxf->fc, AV_LOG_ERROR, "cannot demux OPAtom without an index\n"); ret = AVERROR_INVALIDDATA; goto fail; } mxf_handle_small_eubc(s); return 0; fail: mxf_read_close(s); return ret; }
24,500
qemu
062ba099e01ff1474be98c0a4f3da351efab5d9d
1
static bool arm_cpu_has_work(CPUState *cs) { ARMCPU *cpu = ARM_CPU(cs); return !cpu->powered_off && cs->interrupt_request & (CPU_INTERRUPT_FIQ | CPU_INTERRUPT_HARD | CPU_INTERRUPT_VFIQ | CPU_INTERRUPT_VIRQ | CPU_INTERRUPT_EXITTB); }
24,501
qemu
a8170e5e97ad17ca169c64ba87ae2f53850dab4c
0
exynos4210_combiner_read(void *opaque, target_phys_addr_t offset, unsigned size) { struct Exynos4210CombinerState *s = (struct Exynos4210CombinerState *)opaque; uint32_t req_quad_base_n; /* Base of registers quad. Multiply it by 4 and get a start of corresponding group quad */ uint32_t grp_quad_base_n; /* Base of group quad */ uint32_t reg_n; /* Register number inside the quad */ uint32_t val; req_quad_base_n = offset >> 4; grp_quad_base_n = req_quad_base_n << 2; reg_n = (offset - (req_quad_base_n << 4)) >> 2; if (req_quad_base_n >= IIC_NGRP) { /* Read of ICIPSR register */ return s->icipsr[reg_n]; } val = 0; switch (reg_n) { /* IISTR */ case 2: val |= s->group[grp_quad_base_n].src_pending; val |= s->group[grp_quad_base_n + 1].src_pending << 8; val |= s->group[grp_quad_base_n + 2].src_pending << 16; val |= s->group[grp_quad_base_n + 3].src_pending << 24; break; /* IIMSR */ case 3: val |= s->group[grp_quad_base_n].src_mask & s->group[grp_quad_base_n].src_pending; val |= (s->group[grp_quad_base_n + 1].src_mask & s->group[grp_quad_base_n + 1].src_pending) << 8; val |= (s->group[grp_quad_base_n + 2].src_mask & s->group[grp_quad_base_n + 2].src_pending) << 16; val |= (s->group[grp_quad_base_n + 3].src_mask & s->group[grp_quad_base_n + 3].src_pending) << 24; break; default: if (offset >> 2 >= IIC_REGSET_SIZE) { hw_error("exynos4210.combiner: overflow of reg_set by 0x" TARGET_FMT_plx "offset\n", offset); } val = s->reg_set[offset >> 2]; return 0; } return val; }
24,502
FFmpeg
4cb6964244fd6c099383d8b7e99731e72cc844b9
0
static void int8x8_fmul_int32_c(float *dst, const int8_t *src, int scale) { float fscale = scale / 16.0; int i; for (i = 0; i < 8; i++) dst[i] = src[i] * fscale; }
24,503
qemu
42a268c241183877192c376d03bd9b6d527407c7
0
static inline void gen_movcf_d (DisasContext *ctx, int fs, int fd, int cc, int tf) { int cond; TCGv_i32 t0 = tcg_temp_new_i32(); TCGv_i64 fp0; int l1 = gen_new_label(); if (tf) cond = TCG_COND_EQ; else cond = TCG_COND_NE; tcg_gen_andi_i32(t0, fpu_fcr31, 1 << get_fp_bit(cc)); tcg_gen_brcondi_i32(cond, t0, 0, l1); tcg_temp_free_i32(t0); fp0 = tcg_temp_new_i64(); gen_load_fpr64(ctx, fp0, fs); gen_store_fpr64(ctx, fp0, fd); tcg_temp_free_i64(fp0); gen_set_label(l1); }
24,504
qemu
b131c74a0e485b084ddaffc8214c8a19af492be7
0
int kvm_irqchip_remove_irqfd(KVMState *s, int fd, int virq) { return -ENOSYS; }
24,505
qemu
1ea879e5580f63414693655fcf0328559cdce138
0
static void noop_conv (st_sample_t *dst, const void *src, int samples, volume_t *vol) { (void) src; (void) dst; (void) samples; (void) vol; }
24,506
qemu
9bb34eac8b89f624776ce6604c22d7c3097a1e24
0
static void vga_ioport_write(void *opaque, uint32_t addr, uint32_t val) { CirrusVGAState *s = opaque; int index; /* check port range access depending on color/monochrome mode */ if ((addr >= 0x3b0 && addr <= 0x3bf && (s->msr & MSR_COLOR_EMULATION)) || (addr >= 0x3d0 && addr <= 0x3df && !(s->msr & MSR_COLOR_EMULATION))) return; #ifdef DEBUG_VGA printf("VGA: write addr=0x%04x data=0x%02x\n", addr, val); #endif switch (addr) { case 0x3c0: if (s->ar_flip_flop == 0) { val &= 0x3f; s->ar_index = val; } else { index = s->ar_index & 0x1f; switch (index) { case 0x00 ... 0x0f: s->ar[index] = val & 0x3f; break; case 0x10: s->ar[index] = val & ~0x10; break; case 0x11: s->ar[index] = val; break; case 0x12: s->ar[index] = val & ~0xc0; break; case 0x13: s->ar[index] = val & ~0xf0; break; case 0x14: s->ar[index] = val & ~0xf0; break; default: break; } } s->ar_flip_flop ^= 1; break; case 0x3c2: s->msr = val & ~0x10; break; case 0x3c4: s->sr_index = val; break; case 0x3c5: if (cirrus_hook_write_sr(s, s->sr_index, val)) break; #ifdef DEBUG_VGA_REG printf("vga: write SR%x = 0x%02x\n", s->sr_index, val); #endif s->sr[s->sr_index] = val & sr_mask[s->sr_index]; break; case 0x3c6: cirrus_write_hidden_dac(s, val); break; case 0x3c7: s->dac_read_index = val; s->dac_sub_index = 0; s->dac_state = 3; break; case 0x3c8: s->dac_write_index = val; s->dac_sub_index = 0; s->dac_state = 0; break; case 0x3c9: if (cirrus_hook_write_palette(s, val)) break; s->dac_cache[s->dac_sub_index] = val; if (++s->dac_sub_index == 3) { memcpy(&s->palette[s->dac_write_index * 3], s->dac_cache, 3); s->dac_sub_index = 0; s->dac_write_index++; } break; case 0x3ce: s->gr_index = val; break; case 0x3cf: if (cirrus_hook_write_gr(s, s->gr_index, val)) break; #ifdef DEBUG_VGA_REG printf("vga: write GR%x = 0x%02x\n", s->gr_index, val); #endif s->gr[s->gr_index] = val & gr_mask[s->gr_index]; break; case 0x3b4: case 0x3d4: s->cr_index = val; break; case 0x3b5: case 0x3d5: if (cirrus_hook_write_cr(s, s->cr_index, val)) break; #ifdef DEBUG_VGA_REG printf("vga: write CR%x = 0x%02x\n", s->cr_index, val); #endif /* handle CR0-7 protection */ if ((s->cr[11] & 0x80) && s->cr_index <= 7) { /* can always write bit 4 of CR7 */ if (s->cr_index == 7) s->cr[7] = (s->cr[7] & ~0x10) | (val & 0x10); return; } switch (s->cr_index) { case 0x01: /* horizontal display end */ case 0x07: case 0x09: case 0x0c: case 0x0d: case 0x12: /* veritcal display end */ s->cr[s->cr_index] = val; break; default: s->cr[s->cr_index] = val; break; } break; case 0x3ba: case 0x3da: s->fcr = val & 0x10; break; } }
24,507
qemu
81b23ef82cd1be29ca3d69ab7e98b5b5e55926ce
1
static int xen_pt_cmd_reg_read(XenPCIPassthroughState *s, XenPTReg *cfg_entry, uint16_t *value, uint16_t valid_mask) { XenPTRegInfo *reg = cfg_entry->reg; uint16_t valid_emu_mask = 0; uint16_t emu_mask = reg->emu_mask; if (s->is_virtfn) { emu_mask |= PCI_COMMAND_MEMORY; } /* emulate word register */ valid_emu_mask = emu_mask & valid_mask; *value = XEN_PT_MERGE_VALUE(*value, cfg_entry->data, ~valid_emu_mask); return 0; }
24,508
qemu
06b1297017415ae6a07a0e97ad7d8e90b2d95823
1
static int virtio_net_has_buffers(VirtIONet *n, int bufsize) { if (virtio_queue_empty(n->rx_vq) || (n->mergeable_rx_bufs && !virtqueue_avail_bytes(n->rx_vq, bufsize, 0))) { virtio_queue_set_notification(n->rx_vq, 1); return 0; } virtio_queue_set_notification(n->rx_vq, 0); return 1; }
24,509
FFmpeg
697400eac07c0614f6b9f2e7615563982dbcbe4a
0
static int mov_read_chap(MOVContext *c, AVIOContext *pb, MOVAtom atom) { c->chapter_track = avio_rb32(pb); return 0; }
24,510
qemu
9561fda8d90e176bef598ba87c42a1bd6ad03ef7
1
static void qbus_initfn(Object *obj) { BusState *bus = BUS(obj); QTAILQ_INIT(&bus->children); object_property_add_link(obj, QDEV_HOTPLUG_HANDLER_PROPERTY, TYPE_HOTPLUG_HANDLER, (Object **)&bus->hotplug_handler, NULL); object_property_add_bool(obj, "realized", bus_get_realized, bus_set_realized, NULL); }
24,511
FFmpeg
f863bee841670384fc46f4f99f511b27eb89a216
0
static void final(Real144_internal *glob, short *i1, short *i2, void *out, int *statbuf, int len) { int x, sum; int buffer[10]; short *ptr; short *ptr2; memcpy(glob->work, statbuf,20); memcpy(glob->work + 10, i2, len * 2); buffer[9] = i1[0]; buffer[8] = i1[1]; buffer[7] = i1[2]; buffer[6] = i1[3]; buffer[5] = i1[4]; buffer[4] = i1[5]; buffer[3] = i1[6]; buffer[2] = i1[7]; buffer[1] = i1[8]; buffer[0] = i1[9]; ptr2 = (ptr = glob->work) + len; while (ptr < ptr2) { for(sum=0, x=0; x<=9; x++) sum += buffer[x] * (ptr[x]); sum = sum >> 12; x = ptr[10] - sum; if (x<-32768 || x>32767) { memset(out, 0, len * 2); memset(statbuf, 0, 20); return; } ptr[10] = x; ptr++; } memcpy(out, ptr+10 - len, len * 2); memcpy(statbuf, ptr, 20); }
24,512
qemu
3af9187fc6caaf415ab9c0c6d92c9678f65cb17f
1
static ssize_t mipsnet_receive(NetClientState *nc, const uint8_t *buf, size_t size) { MIPSnetState *s = qemu_get_nic_opaque(nc); trace_mipsnet_receive(size); if (!mipsnet_can_receive(nc)) s->busy = 1; /* Just accept everything. */ /* Write packet data. */ memcpy(s->rx_buffer, buf, size); s->rx_count = size; s->rx_read = 0; /* Now we can signal we have received something. */ s->intctl |= MIPSNET_INTCTL_RXDONE; mipsnet_update_irq(s); return size;
24,513
FFmpeg
c8241e730f116f1c9cfc0b34110aa7f052e05332
0
static AVBufferRef *vaapi_encode_alloc_output_buffer(void *opaque, int size) { AVCodecContext *avctx = opaque; VAAPIEncodeContext *ctx = avctx->priv_data; VABufferID buffer_id; VAStatus vas; AVBufferRef *ref; // The output buffer size is fixed, so it needs to be large enough // to hold the largest possible compressed frame. We assume here // that the uncompressed frame plus some header data is an upper // bound on that. vas = vaCreateBuffer(ctx->hwctx->display, ctx->va_context, VAEncCodedBufferType, 3 * ctx->aligned_width * ctx->aligned_height + (1 << 16), 1, 0, &buffer_id); if (vas != VA_STATUS_SUCCESS) { av_log(avctx, AV_LOG_ERROR, "Failed to create bitstream " "output buffer: %d (%s).\n", vas, vaErrorStr(vas)); return NULL; } av_log(avctx, AV_LOG_DEBUG, "Allocated output buffer %#x\n", buffer_id); ref = av_buffer_create((uint8_t*)(uintptr_t)buffer_id, sizeof(buffer_id), &vaapi_encode_free_output_buffer, avctx, AV_BUFFER_FLAG_READONLY); if (!ref) { vaDestroyBuffer(ctx->hwctx->display, buffer_id); return NULL; } return ref; }
24,514
qemu
a8170e5e97ad17ca169c64ba87ae2f53850dab4c
0
static struct omap_tipb_bridge_s *omap_tipb_bridge_init( MemoryRegion *memory, target_phys_addr_t base, qemu_irq abort_irq, omap_clk clk) { struct omap_tipb_bridge_s *s = (struct omap_tipb_bridge_s *) g_malloc0(sizeof(struct omap_tipb_bridge_s)); s->abort = abort_irq; omap_tipb_bridge_reset(s); memory_region_init_io(&s->iomem, &omap_tipb_bridge_ops, s, "omap-tipb-bridge", 0x100); memory_region_add_subregion(memory, base, &s->iomem); return s; }
24,515
qemu
c2b38b277a7882a592f4f2ec955084b2b756daaa
0
void thread_pool_submit(ThreadPool *pool, ThreadPoolFunc *func, void *arg) { thread_pool_submit_aio(pool, func, arg, NULL, NULL); }
24,516
qemu
61007b316cd71ee7333ff7a0a749a8949527575f
0
int bdrv_writev_vmstate(BlockDriverState *bs, QEMUIOVector *qiov, int64_t pos) { BlockDriver *drv = bs->drv; if (!drv) { return -ENOMEDIUM; } else if (drv->bdrv_save_vmstate) { return drv->bdrv_save_vmstate(bs, qiov, pos); } else if (bs->file) { return bdrv_writev_vmstate(bs->file, qiov, pos); } return -ENOTSUP; }
24,517
qemu
4fa4ce7107c6ec432f185307158c5df91ce54308
0
static int local_statfs(FsContext *s, V9fsPath *fs_path, struct statfs *stbuf) { char buffer[PATH_MAX]; char *path = fs_path->data; return statfs(rpath(s, path, buffer), stbuf); }
24,518
FFmpeg
5d20f19be25c973fe10d0d17db9245002585710d
1
static void init_multbl2(uint8_t tbl[1024], const int c[4], const uint8_t *log8, const uint8_t *alog8, const uint8_t *sbox) { int i, j; for (i = 0; i < 1024; i++) { int x = sbox[i >> 2]; if (x) tbl[i] = alog8[log8[x] + log8[c[i & 3]]]; } #if !CONFIG_SMALL for (j = 256; j < 1024; j++) for (i = 0; i < 4; i++) tbl[4*j + i] = tbl[4*j + ((i - 1) & 3) - 1024]; #endif }
24,519
qemu
c34d440a728fd3b5099d11dec122d440ef092c23
0
static int kvm_get_msr(CPUState *env, struct kvm_msr_entry *msrs, int n) { struct kvm_msrs *kmsrs = qemu_malloc(sizeof *kmsrs + n * sizeof *msrs); int r; kmsrs->nmsrs = n; memcpy(kmsrs->entries, msrs, n * sizeof *msrs); r = kvm_vcpu_ioctl(env, KVM_GET_MSRS, kmsrs); memcpy(msrs, kmsrs->entries, n * sizeof *msrs); free(kmsrs); return r; }
24,520
qemu
cfdf2c40577ed99bb19cdc05d0537e2808d77a78
0
static void do_balloon(Monitor *mon, const QDict *qdict, QObject **ret_data) { int value = qdict_get_int(qdict, "value"); ram_addr_t target = value; qemu_balloon(target << 20); }
24,521
FFmpeg
9bff052b51f27f6cce04e8d7d8b405c710d7ad67
0
static void blur(uint8_t *dst, const int dst_linesize, const uint8_t *src, const int src_linesize, const int w, const int h, FilterParam *fp) { int x, y; FilterParam f = *fp; const int radius = f.dist_width/2; const uint8_t * const src2[NB_PLANES] = { src }; int src2_linesize[NB_PLANES] = { src_linesize }; uint8_t *dst2[NB_PLANES] = { f.pre_filter_buf }; int dst2_linesize[NB_PLANES] = { f.pre_filter_linesize }; sws_scale(f.pre_filter_context, src2, src2_linesize, 0, h, dst2, dst2_linesize); #define UPDATE_FACTOR do { \ int factor; \ factor = f.color_diff_coeff[COLOR_DIFF_COEFF_SIZE/2 + pre_val - \ f.pre_filter_buf[ix + iy*f.pre_filter_linesize]] * f.dist_coeff[dx + dy*f.dist_linesize]; \ sum += src[ix + iy*src_linesize] * factor; \ div += factor; \ } while (0) for (y = 0; y < h; y++) { for (x = 0; x < w; x++) { int sum = 0; int div = 0; int dy; const int pre_val = f.pre_filter_buf[x + y*f.pre_filter_linesize]; if (x >= radius && x < w - radius) { for (dy = 0; dy < radius*2 + 1; dy++) { int dx; int iy = y+dy - radius; if (iy < 0) iy = -iy; else if (iy >= h) iy = h+h-iy-1; for (dx = 0; dx < radius*2 + 1; dx++) { const int ix = x+dx - radius; UPDATE_FACTOR; } } } else { for (dy = 0; dy < radius*2+1; dy++) { int dx; int iy = y+dy - radius; if (iy < 0) iy = -iy; else if (iy >= h) iy = h+h-iy-1; for (dx = 0; dx < radius*2 + 1; dx++) { int ix = x+dx - radius; if (ix < 0) ix = -ix; else if (ix >= w) ix = w+w-ix-1; UPDATE_FACTOR; } } } dst[x + y*dst_linesize] = (sum + div/2) / div; } } }
24,522
qemu
f8ed85ac992c48814d916d5df4d44f9a971c5de4
1
FWCfgState *pc_memory_init(PCMachineState *pcms, MemoryRegion *system_memory, MemoryRegion *rom_memory, MemoryRegion **ram_memory, PcGuestInfo *guest_info) { int linux_boot, i; MemoryRegion *ram, *option_rom_mr; MemoryRegion *ram_below_4g, *ram_above_4g; FWCfgState *fw_cfg; MachineState *machine = MACHINE(pcms); assert(machine->ram_size == pcms->below_4g_mem_size + pcms->above_4g_mem_size); linux_boot = (machine->kernel_filename != NULL); /* Allocate RAM. We allocate it as a single memory region and use * aliases to address portions of it, mostly for backwards compatibility * with older qemus that used qemu_ram_alloc(). */ ram = g_malloc(sizeof(*ram)); memory_region_allocate_system_memory(ram, NULL, "pc.ram", machine->ram_size); *ram_memory = ram; ram_below_4g = g_malloc(sizeof(*ram_below_4g)); memory_region_init_alias(ram_below_4g, NULL, "ram-below-4g", ram, 0, pcms->below_4g_mem_size); memory_region_add_subregion(system_memory, 0, ram_below_4g); e820_add_entry(0, pcms->below_4g_mem_size, E820_RAM); if (pcms->above_4g_mem_size > 0) { ram_above_4g = g_malloc(sizeof(*ram_above_4g)); memory_region_init_alias(ram_above_4g, NULL, "ram-above-4g", ram, pcms->below_4g_mem_size, pcms->above_4g_mem_size); memory_region_add_subregion(system_memory, 0x100000000ULL, ram_above_4g); e820_add_entry(0x100000000ULL, pcms->above_4g_mem_size, E820_RAM); } if (!guest_info->has_reserved_memory && (machine->ram_slots || (machine->maxram_size > machine->ram_size))) { MachineClass *mc = MACHINE_GET_CLASS(machine); error_report("\"-memory 'slots|maxmem'\" is not supported by: %s", mc->name); exit(EXIT_FAILURE); } /* initialize hotplug memory address space */ if (guest_info->has_reserved_memory && (machine->ram_size < machine->maxram_size)) { ram_addr_t hotplug_mem_size = machine->maxram_size - machine->ram_size; if (machine->ram_slots > ACPI_MAX_RAM_SLOTS) { error_report("unsupported amount of memory slots: %"PRIu64, machine->ram_slots); exit(EXIT_FAILURE); } if (QEMU_ALIGN_UP(machine->maxram_size, TARGET_PAGE_SIZE) != machine->maxram_size) { error_report("maximum memory size must by aligned to multiple of " "%d bytes", TARGET_PAGE_SIZE); exit(EXIT_FAILURE); } pcms->hotplug_memory.base = ROUND_UP(0x100000000ULL + pcms->above_4g_mem_size, 1ULL << 30); if (pcms->enforce_aligned_dimm) { /* size hotplug region assuming 1G page max alignment per slot */ hotplug_mem_size += (1ULL << 30) * machine->ram_slots; } if ((pcms->hotplug_memory.base + hotplug_mem_size) < hotplug_mem_size) { error_report("unsupported amount of maximum memory: " RAM_ADDR_FMT, machine->maxram_size); exit(EXIT_FAILURE); } memory_region_init(&pcms->hotplug_memory.mr, OBJECT(pcms), "hotplug-memory", hotplug_mem_size); memory_region_add_subregion(system_memory, pcms->hotplug_memory.base, &pcms->hotplug_memory.mr); } /* Initialize PC system firmware */ pc_system_firmware_init(rom_memory, guest_info->isapc_ram_fw); option_rom_mr = g_malloc(sizeof(*option_rom_mr)); memory_region_init_ram(option_rom_mr, NULL, "pc.rom", PC_ROM_SIZE, &error_abort); vmstate_register_ram_global(option_rom_mr); memory_region_add_subregion_overlap(rom_memory, PC_ROM_MIN_VGA, option_rom_mr, 1); fw_cfg = bochs_bios_init(); rom_set_fw(fw_cfg); if (guest_info->has_reserved_memory && pcms->hotplug_memory.base) { uint64_t *val = g_malloc(sizeof(*val)); PCMachineClass *pcmc = PC_MACHINE_GET_CLASS(pcms); uint64_t res_mem_end = pcms->hotplug_memory.base; if (!pcmc->broken_reserved_end) { res_mem_end += memory_region_size(&pcms->hotplug_memory.mr); } *val = cpu_to_le64(ROUND_UP(res_mem_end, 0x1ULL << 30)); fw_cfg_add_file(fw_cfg, "etc/reserved-memory-end", val, sizeof(*val)); } if (linux_boot) { load_linux(pcms, fw_cfg); } for (i = 0; i < nb_option_roms; i++) { rom_add_option(option_rom[i].name, option_rom[i].bootindex); } guest_info->fw_cfg = fw_cfg; return fw_cfg; }
24,523
qemu
1d2acc3162d9c7772510c973f446353fbdd1f9a8
1
static void migrate_fd_cancel(MigrationState *s) { int old_state ; QEMUFile *f = migrate_get_current()->to_dst_file; trace_migrate_fd_cancel(); if (s->rp_state.from_dst_file) { /* shutdown the rp socket, so causing the rp thread to shutdown */ qemu_file_shutdown(s->rp_state.from_dst_file); do { old_state = s->state; if (!migration_is_setup_or_active(old_state)) { break; migrate_set_state(&s->state, old_state, MIGRATION_STATUS_CANCELLING); } while (s->state != MIGRATION_STATUS_CANCELLING); /* * If we're unlucky the migration code might be stuck somewhere in a * send/write while the network has failed and is waiting to timeout; * if we've got shutdown(2) available then we can force it to quit. * The outgoing qemu file gets closed in migrate_fd_cleanup that is * called in a bh, so there is no race against this cancel. */ if (s->state == MIGRATION_STATUS_CANCELLING && f) { qemu_file_shutdown(f);
24,524
FFmpeg
bd737b5178f361a9b592691848f29a7a79603a7e
0
static int decode_init_thread_copy(AVCodecContext *avctx) { H264Context *h = avctx->priv_data; int ret; if (!avctx->internal->is_copy) return 0; memset(h->sps_buffers, 0, sizeof(h->sps_buffers)); memset(h->pps_buffers, 0, sizeof(h->pps_buffers)); ret = h264_init_context(avctx, h); if (ret < 0) return ret; h->context_initialized = 0; return 0; }
24,525
qemu
bf55b7afce53718ef96f4e6616da62c0ccac37dd
0
static IOMMUTLBEntry vtd_iommu_translate(MemoryRegion *iommu, hwaddr addr, bool is_write) { VTDAddressSpace *vtd_as = container_of(iommu, VTDAddressSpace, iommu); IntelIOMMUState *s = vtd_as->iommu_state; IOMMUTLBEntry ret = { .target_as = &address_space_memory, .iova = addr, .translated_addr = 0, .addr_mask = ~(hwaddr)0, .perm = IOMMU_NONE, }; if (!s->dmar_enabled) { /* DMAR disabled, passthrough, use 4k-page*/ ret.iova = addr & VTD_PAGE_MASK_4K; ret.translated_addr = addr & VTD_PAGE_MASK_4K; ret.addr_mask = ~VTD_PAGE_MASK_4K; ret.perm = IOMMU_RW; return ret; } vtd_do_iommu_translate(vtd_as, vtd_as->bus, vtd_as->devfn, addr, is_write, &ret); VTD_DPRINTF(MMU, "bus %"PRIu8 " slot %"PRIu8 " func %"PRIu8 " devfn %"PRIu8 " iova 0x%"PRIx64 " hpa 0x%"PRIx64, pci_bus_num(vtd_as->bus), VTD_PCI_SLOT(vtd_as->devfn), VTD_PCI_FUNC(vtd_as->devfn), vtd_as->devfn, addr, ret.translated_addr); return ret; }
24,526
qemu
d185c094b404b4ff392b77d1244c0233da7d53bd
0
static gboolean io_watch_poll_check(GSource *source) { IOWatchPoll *iwp = io_watch_poll_from_source(source); if (iwp->max_size == 0) { return FALSE; } return g_io_watch_funcs.check(source); }
24,527
FFmpeg
488a0fa68973d48e264d54f1722f7afb18afbea7
0
static int configure_input_audio_filter(FilterGraph *fg, InputFilter *ifilter, AVFilterInOut *in) { AVFilterContext *last_filter; const AVFilter *abuffer_filt = avfilter_get_by_name("abuffer"); InputStream *ist = ifilter->ist; InputFile *f = input_files[ist->file_index]; char args[255], name[255]; int ret, pad_idx = 0; snprintf(args, sizeof(args), "time_base=%d/%d:sample_rate=%d:sample_fmt=%s" ":channel_layout=0x%"PRIx64, 1, ist->st->codec->sample_rate, ist->st->codec->sample_rate, av_get_sample_fmt_name(ist->st->codec->sample_fmt), ist->st->codec->channel_layout); snprintf(name, sizeof(name), "graph %d input from stream %d:%d", fg->index, ist->file_index, ist->st->index); if ((ret = avfilter_graph_create_filter(&ifilter->filter, abuffer_filt, name, args, NULL, fg->graph)) < 0) return ret; last_filter = ifilter->filter; if (audio_sync_method > 0) { AVFilterContext *async; int len = 0; av_log(NULL, AV_LOG_WARNING, "-async has been deprecated. Used the " "asyncts audio filter instead.\n"); if (audio_sync_method > 1) len += snprintf(args + len, sizeof(args) - len, "compensate=1:" "max_comp=%d:", audio_sync_method); snprintf(args + len, sizeof(args) - len, "min_delta=%f", audio_drift_threshold); snprintf(name, sizeof(name), "graph %d audio sync for input stream %d:%d", fg->index, ist->file_index, ist->st->index); ret = avfilter_graph_create_filter(&async, avfilter_get_by_name("asyncts"), name, args, NULL, fg->graph); if (ret < 0) return ret; ret = avfilter_link(last_filter, 0, async, 0); if (ret < 0) return ret; last_filter = async; } if (audio_volume != 256) { AVFilterContext *volume; av_log(NULL, AV_LOG_WARNING, "-vol has been deprecated. Use the volume " "audio filter instead.\n"); snprintf(args, sizeof(args), "volume=%f", audio_volume / 256.0); snprintf(name, sizeof(name), "graph %d volume for input stream %d:%d", fg->index, ist->file_index, ist->st->index); ret = avfilter_graph_create_filter(&volume, avfilter_get_by_name("volume"), name, args, NULL, fg->graph); if (ret < 0) return ret; ret = avfilter_link(last_filter, 0, volume, 0); if (ret < 0) return ret; last_filter = volume; } snprintf(name, sizeof(name), "trim for input stream %d:%d", ist->file_index, ist->st->index); ret = insert_trim(((f->start_time == AV_NOPTS_VALUE) || !f->accurate_seek) ? AV_NOPTS_VALUE : 0, INT64_MAX, &last_filter, &pad_idx, name); if (ret < 0) return ret; if ((ret = avfilter_link(last_filter, 0, in->filter_ctx, in->pad_idx)) < 0) return ret; return 0; }
24,528
FFmpeg
8dca0877e3e1457e9ec79ffa1ead1135aabb791c
0
static int mpegts_write_packet_internal(AVFormatContext *s, AVPacket *pkt) { AVStream *st = s->streams[pkt->stream_index]; int size = pkt->size; uint8_t *buf = pkt->data; uint8_t *data = NULL; MpegTSWrite *ts = s->priv_data; MpegTSWriteStream *ts_st = st->priv_data; const uint64_t delay = av_rescale(s->max_delay, 90000, AV_TIME_BASE) * 2; int64_t dts = AV_NOPTS_VALUE, pts = AV_NOPTS_VALUE; if (ts->reemit_pat_pmt) { av_log(s, AV_LOG_WARNING, "resend_headers option is deprecated, use -mpegts_flags resend_headers\n"); ts->reemit_pat_pmt = 0; ts->flags |= MPEGTS_FLAG_REEMIT_PAT_PMT; } if (ts->flags & MPEGTS_FLAG_REEMIT_PAT_PMT) { ts->pat_packet_count = ts->pat_packet_period - 1; ts->sdt_packet_count = ts->sdt_packet_period - 1; ts->flags &= ~MPEGTS_FLAG_REEMIT_PAT_PMT; } if (pkt->pts != AV_NOPTS_VALUE) pts = pkt->pts + delay; if (pkt->dts != AV_NOPTS_VALUE) dts = pkt->dts + delay; if (ts_st->first_pts_check && pts == AV_NOPTS_VALUE) { av_log(s, AV_LOG_ERROR, "first pts value must set\n"); return AVERROR(EINVAL); } ts_st->first_pts_check = 0; if (st->codec->codec_id == AV_CODEC_ID_H264) { const uint8_t *p = buf, *buf_end = p + size; uint32_t state = -1; if (pkt->size < 5 || AV_RB32(pkt->data) != 0x0000001) { av_log(s, AV_LOG_ERROR, "H.264 bitstream malformed, " "no startcode found, use -bsf h264_mp4toannexb\n"); return AVERROR(EINVAL); } do { p = avpriv_find_start_code(p, buf_end, &state); av_dlog(s, "nal %d\n", state & 0x1f); } while (p < buf_end && (state & 0x1f) != 9 && (state & 0x1f) != 5 && (state & 0x1f) != 1); if ((state & 0x1f) != 9) { // AUD NAL data = av_malloc(pkt->size + 6); if (!data) return AVERROR(ENOMEM); memcpy(data + 6, pkt->data, pkt->size); AV_WB32(data, 0x00000001); data[4] = 0x09; data[5] = 0xf0; // any slice type (0xe) + rbsp stop one bit buf = data; size = pkt->size + 6; } } else if (st->codec->codec_id == AV_CODEC_ID_AAC) { if (pkt->size < 2) { av_log(s, AV_LOG_ERROR, "AAC packet too short\n"); return AVERROR(EINVAL); } if ((AV_RB16(pkt->data) & 0xfff0) != 0xfff0) { int ret; AVPacket pkt2; if (!ts_st->amux) { av_log(s, AV_LOG_ERROR, "AAC bitstream not in ADTS format " "and extradata missing\n"); return AVERROR(EINVAL); } av_init_packet(&pkt2); pkt2.data = pkt->data; pkt2.size = pkt->size; ret = avio_open_dyn_buf(&ts_st->amux->pb); if (ret < 0) return AVERROR(ENOMEM); ret = av_write_frame(ts_st->amux, &pkt2); if (ret < 0) { avio_close_dyn_buf(ts_st->amux->pb, &data); ts_st->amux->pb = NULL; av_free(data); return ret; } size = avio_close_dyn_buf(ts_st->amux->pb, &data); ts_st->amux->pb = NULL; buf = data; } } if (st->codec->codec_type != AVMEDIA_TYPE_AUDIO) { // for video and subtitle, write a single pes packet mpegts_write_pes(s, st, buf, size, pts, dts, pkt->flags & AV_PKT_FLAG_KEY); av_free(data); return 0; } if (ts_st->payload_size + size > ts->pes_payload_size) { if (ts_st->payload_size) { mpegts_write_pes(s, st, ts_st->payload, ts_st->payload_size, ts_st->payload_pts, ts_st->payload_dts, ts_st->payload_flags & AV_PKT_FLAG_KEY); ts_st->payload_size = 0; } if (size > ts->pes_payload_size) { mpegts_write_pes(s, st, buf, size, pts, dts, pkt->flags & AV_PKT_FLAG_KEY); av_free(data); return 0; } } if (!ts_st->payload_size) { ts_st->payload_pts = pts; ts_st->payload_dts = dts; ts_st->payload_flags = pkt->flags; } memcpy(ts_st->payload + ts_st->payload_size, buf, size); ts_st->payload_size += size; av_free(data); return 0; }
24,529
qemu
240f64b6dc3346d044d7beb7cc3a53668ce47384
0
void qmp_object_add(const char *type, const char *id, bool has_props, QObject *props, Error **errp) { const QDict *pdict = NULL; QmpInputVisitor *qiv; Object *obj; if (props) { pdict = qobject_to_qdict(props); if (!pdict) { error_setg(errp, QERR_INVALID_PARAMETER_TYPE, "props", "dict"); return; } } qiv = qmp_input_visitor_new(props, false); obj = user_creatable_add_type(type, id, pdict, qmp_input_get_visitor(qiv), errp); qmp_input_visitor_cleanup(qiv); if (obj) { object_unref(obj); } }
24,530
qemu
f6bb84d53110398f4899c19dab4e0fe9908ec060
1
static inline TranslationBlock *tb_find(CPUState *cpu, TranslationBlock *last_tb, int tb_exit) { CPUArchState *env = (CPUArchState *)cpu->env_ptr; TranslationBlock *tb; target_ulong cs_base, pc; uint32_t flags; bool acquired_tb_lock = false; /* we record a subset of the CPU state. It will always be the same before a given translated block is executed. */ cpu_get_tb_cpu_state(env, &pc, &cs_base, &flags); tb = atomic_rcu_read(&cpu->tb_jmp_cache[tb_jmp_cache_hash_func(pc)]); if (unlikely(!tb || tb->pc != pc || tb->cs_base != cs_base || tb->flags != flags || tb->trace_vcpu_dstate != *cpu->trace_dstate)) { tb = tb_htable_lookup(cpu, pc, cs_base, flags); if (!tb) { /* mmap_lock is needed by tb_gen_code, and mmap_lock must be * taken outside tb_lock. As system emulation is currently * single threaded the locks are NOPs. */ mmap_lock(); tb_lock(); acquired_tb_lock = true; /* There's a chance that our desired tb has been translated while * taking the locks so we check again inside the lock. */ tb = tb_htable_lookup(cpu, pc, cs_base, flags); if (!tb) { /* if no translated code available, then translate it now */ tb = tb_gen_code(cpu, pc, cs_base, flags, 0); } mmap_unlock(); } /* We add the TB in the virtual pc hash table for the fast lookup */ atomic_set(&cpu->tb_jmp_cache[tb_jmp_cache_hash_func(pc)], tb); } #ifndef CONFIG_USER_ONLY /* We don't take care of direct jumps when address mapping changes in * system emulation. So it's not safe to make a direct jump to a TB * spanning two pages because the mapping for the second page can change. */ if (tb->page_addr[1] != -1) { last_tb = NULL; } #endif /* See if we can patch the calling TB. */ if (last_tb && !qemu_loglevel_mask(CPU_LOG_TB_NOCHAIN)) { if (!acquired_tb_lock) { tb_lock(); acquired_tb_lock = true; } if (!tb->invalid) { tb_add_jump(last_tb, tb_exit, tb); } } if (acquired_tb_lock) { tb_unlock(); } return tb; }
24,531
FFmpeg
c3ab0004ae4dffc32494ae84dd15cfaa909a7884
1
static inline void RENAME(hyscale_fast)(SwsContext *c, int16_t *dst, int dstWidth, const uint8_t *src, int srcW, int xInc) { #if ARCH_X86 #if COMPILE_TEMPLATE_MMX2 int32_t *filterPos = c->hLumFilterPos; int16_t *filter = c->hLumFilter; int canMMX2BeUsed = c->canMMX2BeUsed; void *mmx2FilterCode= c->lumMmx2FilterCode; int i; #if defined(PIC) DECLARE_ALIGNED(8, uint64_t, ebxsave); #endif if (canMMX2BeUsed) { __asm__ volatile( #if defined(PIC) "mov %%"REG_b", %5 \n\t" #endif "pxor %%mm7, %%mm7 \n\t" "mov %0, %%"REG_c" \n\t" "mov %1, %%"REG_D" \n\t" "mov %2, %%"REG_d" \n\t" "mov %3, %%"REG_b" \n\t" "xor %%"REG_a", %%"REG_a" \n\t" // i PREFETCH" (%%"REG_c") \n\t" PREFETCH" 32(%%"REG_c") \n\t" PREFETCH" 64(%%"REG_c") \n\t" #if ARCH_X86_64 #define CALL_MMX2_FILTER_CODE \ "movl (%%"REG_b"), %%esi \n\t"\ "call *%4 \n\t"\ "movl (%%"REG_b", %%"REG_a"), %%esi \n\t"\ "add %%"REG_S", %%"REG_c" \n\t"\ "add %%"REG_a", %%"REG_D" \n\t"\ "xor %%"REG_a", %%"REG_a" \n\t"\ #else #define CALL_MMX2_FILTER_CODE \ "movl (%%"REG_b"), %%esi \n\t"\ "call *%4 \n\t"\ "addl (%%"REG_b", %%"REG_a"), %%"REG_c" \n\t"\ "add %%"REG_a", %%"REG_D" \n\t"\ "xor %%"REG_a", %%"REG_a" \n\t"\ #endif /* ARCH_X86_64 */ CALL_MMX2_FILTER_CODE CALL_MMX2_FILTER_CODE CALL_MMX2_FILTER_CODE CALL_MMX2_FILTER_CODE CALL_MMX2_FILTER_CODE CALL_MMX2_FILTER_CODE CALL_MMX2_FILTER_CODE CALL_MMX2_FILTER_CODE #if defined(PIC) "mov %5, %%"REG_b" \n\t" #endif :: "m" (src), "m" (dst), "m" (filter), "m" (filterPos), "m" (mmx2FilterCode) #if defined(PIC) ,"m" (ebxsave) #endif : "%"REG_a, "%"REG_c, "%"REG_d, "%"REG_S, "%"REG_D #if !defined(PIC) ,"%"REG_b #endif ); for (i=dstWidth-1; (i*xInc)>>16 >=srcW-1; i--) dst[i] = src[srcW-1]*128; } else { #endif /* COMPILE_TEMPLATE_MMX2 */ x86_reg dstWidth_reg = dstWidth; x86_reg xInc_shr16 = xInc >> 16; uint16_t xInc_mask = xInc & 0xffff; //NO MMX just normal asm ... __asm__ volatile( "xor %%"REG_a", %%"REG_a" \n\t" // i "xor %%"REG_d", %%"REG_d" \n\t" // xx "xorl %%ecx, %%ecx \n\t" // xalpha ASMALIGN(4) "1: \n\t" "movzbl (%0, %%"REG_d"), %%edi \n\t" //src[xx] "movzbl 1(%0, %%"REG_d"), %%esi \n\t" //src[xx+1] FAST_BILINEAR_X86 "movw %%si, (%%"REG_D", %%"REG_a", 2) \n\t" "addw %4, %%cx \n\t" //xalpha += xInc&0xFFFF "adc %3, %%"REG_d" \n\t" //xx+= xInc>>16 + carry "movzbl (%0, %%"REG_d"), %%edi \n\t" //src[xx] "movzbl 1(%0, %%"REG_d"), %%esi \n\t" //src[xx+1] FAST_BILINEAR_X86 "movw %%si, 2(%%"REG_D", %%"REG_a", 2) \n\t" "addw %4, %%cx \n\t" //xalpha += xInc&0xFFFF "adc %3, %%"REG_d" \n\t" //xx+= xInc>>16 + carry "add $2, %%"REG_a" \n\t" "cmp %2, %%"REG_a" \n\t" " jb 1b \n\t" :: "r" (src), "m" (dst), "m" (dstWidth_reg), "m" (xInc_shr16), "m" (xInc_mask) : "%"REG_a, "%"REG_d, "%ecx", "%"REG_D, "%esi" ); #if COMPILE_TEMPLATE_MMX2 } //if MMX2 can't be used #endif #else int i; unsigned int xpos=0; for (i=0;i<dstWidth;i++) { register unsigned int xx=xpos>>16; register unsigned int xalpha=(xpos&0xFFFF)>>9; dst[i]= (src[xx]<<7) + (src[xx+1] - src[xx])*xalpha; xpos+=xInc; } #endif /* ARCH_X86 */ }
24,532
FFmpeg
9d0b45ade864f3d2ccd8610149fe1fff53c4e937
1
static int decrypt_init(AVFormatContext *s, ID3v2ExtraMeta *em, uint8_t *header) { OMAContext *oc = s->priv_data; ID3v2ExtraMetaGEOB *geob = NULL; uint8_t *gdata; oc->encrypted = 1; av_log(s, AV_LOG_INFO, "File is encrypted\n"); /* find GEOB metadata */ while (em) { if (!strcmp(em->tag, "GEOB") && (geob = em->data) && (!strcmp(geob->description, "OMG_LSI") || !strcmp(geob->description, "OMG_BKLSI"))) { break; } em = em->next; } if (!em) { av_log(s, AV_LOG_ERROR, "No encryption header found\n"); return AVERROR_INVALIDDATA; } if (geob->datasize < 64) { av_log(s, AV_LOG_ERROR, "Invalid GEOB data size: %u\n", geob->datasize); return AVERROR_INVALIDDATA; } gdata = geob->data; if (AV_RB16(gdata) != 1) av_log(s, AV_LOG_WARNING, "Unknown version in encryption header\n"); oc->k_size = AV_RB16(&gdata[2]); oc->e_size = AV_RB16(&gdata[4]); oc->i_size = AV_RB16(&gdata[6]); oc->s_size = AV_RB16(&gdata[8]); if (memcmp(&gdata[OMA_ENC_HEADER_SIZE], "KEYRING ", 12)) { av_log(s, AV_LOG_ERROR, "Invalid encryption header\n"); return AVERROR_INVALIDDATA; } oc->rid = AV_RB32(&gdata[OMA_ENC_HEADER_SIZE + 28]); av_log(s, AV_LOG_DEBUG, "RID: %.8x\n", oc->rid); memcpy(oc->iv, &header[0x58], 8); hex_log(s, AV_LOG_DEBUG, "IV", oc->iv, 8); hex_log(s, AV_LOG_DEBUG, "CBC-MAC", &gdata[OMA_ENC_HEADER_SIZE + oc->k_size + oc->e_size + oc->i_size], 8); if (s->keylen > 0) { kset(s, s->key, s->key, s->keylen); } if (!memcmp(oc->r_val, (const uint8_t[8]){0}, 8) || rprobe(s, gdata, oc->r_val) < 0 && nprobe(s, gdata, geob->datasize, oc->n_val) < 0) { int i; for (i = 0; i < FF_ARRAY_ELEMS(leaf_table); i += 2) { uint8_t buf[16]; AV_WL64(buf, leaf_table[i]); AV_WL64(&buf[8], leaf_table[i + 1]); kset(s, buf, buf, 16); if (!rprobe(s, gdata, oc->r_val) || !nprobe(s, gdata, geob->datasize, oc->n_val)) break; } if (i >= sizeof(leaf_table)) { av_log(s, AV_LOG_ERROR, "Invalid key\n"); return AVERROR_INVALIDDATA; } } /* e_val */ av_des_init(&oc->av_des, oc->m_val, 64, 0); av_des_crypt(&oc->av_des, oc->e_val, &gdata[OMA_ENC_HEADER_SIZE + 40], 1, NULL, 0); hex_log(s, AV_LOG_DEBUG, "EK", oc->e_val, 8); /* init e_val */ av_des_init(&oc->av_des, oc->e_val, 64, 1); return 0; }
24,533
qemu
73479c5c87bf431c6344a80ab01456ed979447f1
1
void superh_cpu_do_interrupt(CPUState *cs) { SuperHCPU *cpu = SUPERH_CPU(cs); CPUSH4State *env = &cpu->env; int do_irq = cs->interrupt_request & CPU_INTERRUPT_HARD; int do_exp, irq_vector = cs->exception_index; /* prioritize exceptions over interrupts */ do_exp = cs->exception_index != -1; do_irq = do_irq && (cs->exception_index == -1); if (env->sr & (1u << SR_BL)) { if (do_exp && cs->exception_index != 0x1e0) { cs->exception_index = 0x000; /* masked exception -> reset */ } if (do_irq && !env->in_sleep) { return; /* masked */ } } env->in_sleep = 0; if (do_irq) { irq_vector = sh_intc_get_pending_vector(env->intc_handle, (env->sr >> 4) & 0xf); if (irq_vector == -1) { return; /* masked */ } } if (qemu_loglevel_mask(CPU_LOG_INT)) { const char *expname; switch (cs->exception_index) { case 0x0e0: expname = "addr_error"; break; case 0x040: expname = "tlb_miss"; break; case 0x0a0: expname = "tlb_violation"; break; case 0x180: expname = "illegal_instruction"; break; case 0x1a0: expname = "slot_illegal_instruction"; break; case 0x800: expname = "fpu_disable"; break; case 0x820: expname = "slot_fpu"; break; case 0x100: expname = "data_write"; break; case 0x060: expname = "dtlb_miss_write"; break; case 0x0c0: expname = "dtlb_violation_write"; break; case 0x120: expname = "fpu_exception"; break; case 0x080: expname = "initial_page_write"; break; case 0x160: expname = "trapa"; break; default: expname = do_irq ? "interrupt" : "???"; break; } qemu_log("exception 0x%03x [%s] raised\n", irq_vector, expname); log_cpu_state(cs, 0); } env->ssr = cpu_read_sr(env); env->spc = env->pc; env->sgr = env->gregs[15]; env->sr |= (1u << SR_BL) | (1u << SR_MD) | (1u << SR_RB); if (env->flags & (DELAY_SLOT | DELAY_SLOT_CONDITIONAL)) { /* Branch instruction should be executed again before delay slot. */ env->spc -= 2; /* Clear flags for exception/interrupt routine. */ env->flags &= ~(DELAY_SLOT | DELAY_SLOT_CONDITIONAL); } if (do_exp) { env->expevt = cs->exception_index; switch (cs->exception_index) { case 0x000: case 0x020: case 0x140: env->sr &= ~(1u << SR_FD); env->sr |= 0xf << 4; /* IMASK */ env->pc = 0xa0000000; break; case 0x040: case 0x060: env->pc = env->vbr + 0x400; break; case 0x160: env->spc += 2; /* special case for TRAPA */ /* fall through */ default: env->pc = env->vbr + 0x100; break; } return; } if (do_irq) { env->intevt = irq_vector; env->pc = env->vbr + 0x600; return; } }
24,534
FFmpeg
ee16a0ced01e6a33b7b01a0b21a0e07c1e1c7884
0
static int smacker_read_packet(AVFormatContext *s, AVPacket *pkt) { SmackerContext *smk = s->priv_data; int flags; int ret; int i; int frame_size = 0; int palchange = 0; if (s->pb->eof_reached || smk->cur_frame >= smk->frames) return AVERROR_EOF; /* if we demuxed all streams, pass another frame */ if(smk->curstream < 0) { avio_seek(s->pb, smk->nextpos, 0); frame_size = smk->frm_size[smk->cur_frame] & (~3); flags = smk->frm_flags[smk->cur_frame]; /* handle palette change event */ if(flags & SMACKER_PAL){ int size, sz, t, off, j, pos; uint8_t *pal = smk->pal; uint8_t oldpal[768]; memcpy(oldpal, pal, 768); size = avio_r8(s->pb); size = size * 4 - 1; frame_size -= size; frame_size--; sz = 0; pos = avio_tell(s->pb) + size; while(sz < 256){ t = avio_r8(s->pb); if(t & 0x80){ /* skip palette entries */ sz += (t & 0x7F) + 1; pal += ((t & 0x7F) + 1) * 3; } else if(t & 0x40){ /* copy with offset */ off = avio_r8(s->pb); j = (t & 0x3F) + 1; if (off + j > 0x100) { av_log(s, AV_LOG_ERROR, "Invalid palette update, offset=%d length=%d extends beyond palette size\n", off, j); return AVERROR_INVALIDDATA; } off *= 3; while(j-- && sz < 256) { *pal++ = oldpal[off + 0]; *pal++ = oldpal[off + 1]; *pal++ = oldpal[off + 2]; sz++; off += 3; } } else { /* new entries */ *pal++ = smk_pal[t]; *pal++ = smk_pal[avio_r8(s->pb) & 0x3F]; *pal++ = smk_pal[avio_r8(s->pb) & 0x3F]; sz++; } } avio_seek(s->pb, pos, 0); palchange |= 1; } flags >>= 1; smk->curstream = -1; /* if audio chunks are present, put them to stack and retrieve later */ for(i = 0; i < 7; i++) { if(flags & 1) { int size; uint8_t *tmpbuf; size = avio_rl32(s->pb) - 4; frame_size -= size; frame_size -= 4; smk->curstream++; tmpbuf = av_realloc(smk->bufs[smk->curstream], size); if (!tmpbuf) return AVERROR(ENOMEM); smk->bufs[smk->curstream] = tmpbuf; smk->buf_sizes[smk->curstream] = size; ret = avio_read(s->pb, smk->bufs[smk->curstream], size); if(ret != size) return AVERROR(EIO); smk->stream_id[smk->curstream] = smk->indexes[i]; } flags >>= 1; } if (frame_size < 0) return AVERROR_INVALIDDATA; if (av_new_packet(pkt, frame_size + 769)) return AVERROR(ENOMEM); if(smk->frm_size[smk->cur_frame] & 1) palchange |= 2; pkt->data[0] = palchange; memcpy(pkt->data + 1, smk->pal, 768); ret = avio_read(s->pb, pkt->data + 769, frame_size); if(ret != frame_size) return AVERROR(EIO); pkt->stream_index = smk->videoindex; pkt->pts = smk->cur_frame; pkt->size = ret + 769; smk->cur_frame++; smk->nextpos = avio_tell(s->pb); } else { if (av_new_packet(pkt, smk->buf_sizes[smk->curstream])) return AVERROR(ENOMEM); memcpy(pkt->data, smk->bufs[smk->curstream], smk->buf_sizes[smk->curstream]); pkt->size = smk->buf_sizes[smk->curstream]; pkt->stream_index = smk->stream_id[smk->curstream]; pkt->pts = smk->aud_pts[smk->curstream]; smk->aud_pts[smk->curstream] += AV_RL32(pkt->data); smk->curstream--; } return 0; }
24,535
qemu
f332e830e38b3ff3953ef02ac04e409ae53769c5
1
static void parse_type_size(Visitor *v, const char *name, uint64_t *obj, Error **errp) { StringInputVisitor *siv = to_siv(v); Error *err = NULL; uint64_t val; if (siv->string) { parse_option_size(name, siv->string, &val, &err); } else { error_setg(errp, QERR_INVALID_PARAMETER_TYPE, name ? name : "null", "size"); return; } if (err) { error_propagate(errp, err); return; } *obj = val; }
24,536
FFmpeg
9f61abc8111c7c43f49ca012e957a108b9cc7610
0
static int parse_fragment(AVFormatContext *s, const char *filename, int64_t *start_ts, int64_t *duration, int64_t *moof_size, int64_t size) { AVIOContext *in; int ret; uint32_t len; if ((ret = avio_open2(&in, filename, AVIO_FLAG_READ, &s->interrupt_callback, NULL)) < 0) return ret; ret = AVERROR(EIO); *moof_size = avio_rb32(in); if (*moof_size < 8 || *moof_size > size) goto fail; if (avio_rl32(in) != MKTAG('m','o','o','f')) goto fail; len = avio_rb32(in); if (len > *moof_size) goto fail; if (avio_rl32(in) != MKTAG('m','f','h','d')) goto fail; avio_seek(in, len - 8, SEEK_CUR); avio_rb32(in); /* traf size */ if (avio_rl32(in) != MKTAG('t','r','a','f')) goto fail; while (avio_tell(in) < *moof_size) { uint32_t len = avio_rb32(in); uint32_t tag = avio_rl32(in); int64_t end = avio_tell(in) + len - 8; if (len < 8 || len >= *moof_size) goto fail; if (tag == MKTAG('u','u','i','d')) { const uint8_t tfxd[] = { 0x6d, 0x1d, 0x9b, 0x05, 0x42, 0xd5, 0x44, 0xe6, 0x80, 0xe2, 0x14, 0x1d, 0xaf, 0xf7, 0x57, 0xb2 }; uint8_t uuid[16]; avio_read(in, uuid, 16); if (!memcmp(uuid, tfxd, 16) && len >= 8 + 16 + 4 + 16) { avio_seek(in, 4, SEEK_CUR); *start_ts = avio_rb64(in); *duration = avio_rb64(in); ret = 0; break; } } avio_seek(in, end, SEEK_SET); } fail: avio_close(in); return ret; }
24,537
qemu
da98c8eb4c35225049cad8cf767647eb39788b5d
0
void acpi_pm1_cnt_init(ACPIREGS *ar, qemu_irq cmos_s3) { ar->pm1.cnt.cmos_s3 = cmos_s3; }
24,538
qemu
4083733db5e4120939acee57019ff52db1f45b9d
0
static void console_refresh(QemuConsole *s) { DisplaySurface *surface = qemu_console_surface(s); TextCell *c; int x, y, y1; if (s->ds->have_text) { s->text_x[0] = 0; s->text_y[0] = 0; s->text_x[1] = s->width - 1; s->text_y[1] = s->height - 1; s->cursor_invalidate = 1; } vga_fill_rect(s, 0, 0, surface_width(surface), surface_height(surface), color_table_rgb[0][COLOR_BLACK]); y1 = s->y_displayed; for (y = 0; y < s->height; y++) { c = s->cells + y1 * s->width; for (x = 0; x < s->width; x++) { vga_putcharxy(s, x, y, c->ch, &(c->t_attrib)); c++; } if (++y1 == s->total_height) { y1 = 0; } } console_show_cursor(s, 1); dpy_gfx_update(s, 0, 0, surface_width(surface), surface_height(surface)); }
24,539
qemu
c2b38b277a7882a592f4f2ec955084b2b756daaa
0
static void qemu_init_child_watch(void) { struct sigaction act; sigchld_bh = qemu_bh_new(sigchld_bh_handler, NULL); memset(&act, 0, sizeof(act)); act.sa_handler = sigchld_handler; act.sa_flags = SA_NOCLDSTOP; sigaction(SIGCHLD, &act, NULL); }
24,540
FFmpeg
240fd8c96f59ebe9dcfc4152a1086cd3f63400c0
0
int av_packet_split_side_data(AVPacket *pkt){ if (!pkt->side_data_elems && pkt->size >12 && AV_RB64(pkt->data + pkt->size - 8) == FF_MERGE_MARKER){ int i; unsigned int size, orig_pktsize = pkt->size; uint8_t *p; p = pkt->data + pkt->size - 8 - 5; for (i=1; ; i++){ size = AV_RB32(p); if (size>INT_MAX || p - pkt->data < size) return 0; if (p[4]&128) break; p-= size+5; } pkt->side_data = av_malloc(i * sizeof(*pkt->side_data)); if (!pkt->side_data) return AVERROR(ENOMEM); p= pkt->data + pkt->size - 8 - 5; for (i=0; ; i++){ size= AV_RB32(p); av_assert0(size<=INT_MAX && p - pkt->data >= size); pkt->side_data[i].data = av_malloc(size + FF_INPUT_BUFFER_PADDING_SIZE); pkt->side_data[i].size = size; pkt->side_data[i].type = p[4]&127; if (!pkt->side_data[i].data) return AVERROR(ENOMEM); memcpy(pkt->side_data[i].data, p-size, size); pkt->size -= size + 5; if(p[4]&128) break; p-= size+5; } pkt->size -= 8; /* FFMIN() prevents overflow in case the packet wasn't allocated with * proper padding. * If the side data is smaller than the buffer padding size, the * remaining bytes should have already been filled with zeros by the * original packet allocation anyway. */ memset(pkt->data + pkt->size, 0, FFMIN(orig_pktsize - pkt->size, FF_INPUT_BUFFER_PADDING_SIZE)); pkt->side_data_elems = i+1; return 1; } return 0; }
24,541
qemu
3e305e4a4752f70c0b5c3cf5b43ec957881714f7
1
int vnc_tls_client_setup(VncState *vs, int needX509Creds) { VNC_DEBUG("Do TLS setup\n"); if (vnc_tls_initialize() < 0) { VNC_DEBUG("Failed to init TLS\n"); vnc_client_error(vs); return -1; } if (vs->tls.session == NULL) { if (gnutls_init(&vs->tls.session, GNUTLS_SERVER) < 0) { vnc_client_error(vs); return -1; } if (gnutls_set_default_priority(vs->tls.session) < 0) { gnutls_deinit(vs->tls.session); vs->tls.session = NULL; vnc_client_error(vs); return -1; } if (vnc_set_gnutls_priority(vs->tls.session, needX509Creds) < 0) { gnutls_deinit(vs->tls.session); vs->tls.session = NULL; vnc_client_error(vs); return -1; } if (needX509Creds) { gnutls_certificate_server_credentials x509_cred = vnc_tls_initialize_x509_cred(vs->vd); if (!x509_cred) { gnutls_deinit(vs->tls.session); vs->tls.session = NULL; vnc_client_error(vs); return -1; } if (gnutls_credentials_set(vs->tls.session, GNUTLS_CRD_CERTIFICATE, x509_cred) < 0) { gnutls_deinit(vs->tls.session); vs->tls.session = NULL; gnutls_certificate_free_credentials(x509_cred); vnc_client_error(vs); return -1; } if (vs->vd->tls.x509verify) { VNC_DEBUG("Requesting a client certificate\n"); gnutls_certificate_server_set_request(vs->tls.session, GNUTLS_CERT_REQUEST); } } else { gnutls_anon_server_credentials_t anon_cred = vnc_tls_initialize_anon_cred(); if (!anon_cred) { gnutls_deinit(vs->tls.session); vs->tls.session = NULL; vnc_client_error(vs); return -1; } if (gnutls_credentials_set(vs->tls.session, GNUTLS_CRD_ANON, anon_cred) < 0) { gnutls_deinit(vs->tls.session); vs->tls.session = NULL; gnutls_anon_free_server_credentials(anon_cred); vnc_client_error(vs); return -1; } } gnutls_transport_set_ptr(vs->tls.session, (gnutls_transport_ptr_t)vs); gnutls_transport_set_push_function(vs->tls.session, vnc_tls_push); gnutls_transport_set_pull_function(vs->tls.session, vnc_tls_pull); } return 0; }
24,542
FFmpeg
f6b7f72461673e4d398b1edf9ed2a7fe70d99c47
0
static void av_always_inline filter_mb_edgech( uint8_t *pix, int stride, const int16_t bS[4], unsigned int qp, H264Context *h, int intra ) { const int qp_bd_offset = 6 * (h->sps.bit_depth_luma - 8); const unsigned int index_a = qp - qp_bd_offset + h->slice_alpha_c0_offset; const int alpha = alpha_table[index_a]; const int beta = beta_table[qp - qp_bd_offset + h->slice_beta_offset]; if (alpha ==0 || beta == 0) return; if( bS[0] < 4 || !intra ) { int8_t tc[4]; tc[0] = tc0_table[index_a][bS[0]]+1; tc[1] = tc0_table[index_a][bS[1]]+1; tc[2] = tc0_table[index_a][bS[2]]+1; tc[3] = tc0_table[index_a][bS[3]]+1; h->h264dsp.h264_v_loop_filter_chroma(pix, stride, alpha, beta, tc); } else { h->h264dsp.h264_v_loop_filter_chroma_intra(pix, stride, alpha, beta); } }
24,543
qemu
a89f364ae8740dfc31b321eed9ee454e996dc3c1
0
static inline void bt_hci_lmp_acl_data(struct bt_hci_s *hci, uint16_t handle, const uint8_t *data, int start, int len) { struct hci_acl_hdr *pkt = (void *) hci->acl_buf; /* TODO: packet flags */ /* TODO: avoid memcpy'ing */ if (len + HCI_ACL_HDR_SIZE > sizeof(hci->acl_buf)) { fprintf(stderr, "%s: can't take ACL packets %i bytes long\n", __FUNCTION__, len); return; } memcpy(hci->acl_buf + HCI_ACL_HDR_SIZE, data, len); pkt->handle = cpu_to_le16( acl_handle_pack(handle, start ? ACL_START : ACL_CONT)); pkt->dlen = cpu_to_le16(len); hci->info.acl_recv(hci->info.opaque, hci->acl_buf, len + HCI_ACL_HDR_SIZE); }
24,544
qemu
42bb9c9178ae7ac4c439172b1ae99cc29188a5c6
0
static void xilinx_enet_init(Object *obj) { XilinxAXIEnet *s = XILINX_AXI_ENET(obj); SysBusDevice *sbd = SYS_BUS_DEVICE(obj); Error *errp = NULL; object_property_add_link(obj, "axistream-connected", TYPE_STREAM_SLAVE, (Object **) &s->tx_dev, &errp); assert_no_error(errp); object_initialize(&s->rx_data_dev, TYPE_XILINX_AXI_ENET_DATA_STREAM); object_property_add_child(OBJECT(s), "axistream-connected-target", (Object *)&s->rx_data_dev, &errp); assert_no_error(errp); sysbus_init_irq(sbd, &s->irq); memory_region_init_io(&s->iomem, &enet_ops, s, "enet", 0x40000); sysbus_init_mmio(sbd, &s->iomem); }
24,545
qemu
23326164ae6fe8d94b7eff123e03f97ca6978d33
0
bool address_space_rw(AddressSpace *as, hwaddr addr, uint8_t *buf, int len, bool is_write) { hwaddr l; uint8_t *ptr; uint64_t val; hwaddr addr1; MemoryRegion *mr; bool error = false; while (len > 0) { l = len; mr = address_space_translate(as, addr, &addr1, &l, is_write); if (is_write) { if (!memory_access_is_direct(mr, is_write)) { l = memory_access_size(mr, l, addr1); /* XXX: could force current_cpu to NULL to avoid potential bugs */ if (l == 4) { /* 32 bit write access */ val = ldl_p(buf); error |= io_mem_write(mr, addr1, val, 4); } else if (l == 2) { /* 16 bit write access */ val = lduw_p(buf); error |= io_mem_write(mr, addr1, val, 2); } else { /* 8 bit write access */ val = ldub_p(buf); error |= io_mem_write(mr, addr1, val, 1); } } else { addr1 += memory_region_get_ram_addr(mr); /* RAM case */ ptr = qemu_get_ram_ptr(addr1); memcpy(ptr, buf, l); invalidate_and_set_dirty(addr1, l); } } else { if (!memory_access_is_direct(mr, is_write)) { /* I/O case */ l = memory_access_size(mr, l, addr1); if (l == 4) { /* 32 bit read access */ error |= io_mem_read(mr, addr1, &val, 4); stl_p(buf, val); } else if (l == 2) { /* 16 bit read access */ error |= io_mem_read(mr, addr1, &val, 2); stw_p(buf, val); } else { /* 8 bit read access */ error |= io_mem_read(mr, addr1, &val, 1); stb_p(buf, val); } } else { /* RAM case */ ptr = qemu_get_ram_ptr(mr->ram_addr + addr1); memcpy(buf, ptr, l); } } len -= l; buf += l; addr += l; } return error; }
24,546
qemu
5c55ff99fa88158871d5b9f619c485deae5f3d5b
0
static int create_ppc_opcodes (CPUPPCState *env, const ppc_def_t *def) { opcode_t *opc, *start, *end; fill_new_table(env->opcodes, 0x40); if (&opc_start < &opc_end) { start = &opc_start; end = &opc_end; } else { start = &opc_end; end = &opc_start; } for (opc = start + 1; opc != end; opc++) { if ((opc->handler.type & def->insns_flags) != 0) { if (register_insn(env->opcodes, opc) < 0) { printf("*** ERROR initializing PowerPC instruction " "0x%02x 0x%02x 0x%02x\n", opc->opc1, opc->opc2, opc->opc3); return -1; } } } fix_opcode_tables(env->opcodes); fflush(stdout); fflush(stderr); return 0; }
24,547
qemu
b7f43fe46029d8fd0594cd599fa2599dcce0f553
1
Object *object_dynamic_cast_assert(Object *obj, const char *typename) { Object *inst; inst = object_dynamic_cast(obj, typename); if (!inst) { fprintf(stderr, "Object %p is not an instance of type %s\n", obj, typename); abort(); } return inst; }
24,548
qemu
6658ffb81ee56a510d7d77025872a508a9adce3a
1
static inline int gen_intermediate_code_internal(CPUState *env, TranslationBlock *tb, int search_pc) { DisasContext dc1, *dc = &dc1; uint16_t *gen_opc_end; int j, lj; target_ulong pc_start; uint32_t next_page_start; /* generate intermediate code */ pc_start = tb->pc; dc->tb = tb; gen_opc_ptr = gen_opc_buf; gen_opc_end = gen_opc_buf + OPC_MAX_SIZE; gen_opparam_ptr = gen_opparam_buf; dc->is_jmp = DISAS_NEXT; dc->pc = pc_start; dc->singlestep_enabled = env->singlestep_enabled; dc->condjmp = 0; dc->thumb = env->thumb; #if !defined(CONFIG_USER_ONLY) dc->user = (env->uncached_cpsr & 0x1f) == ARM_CPU_MODE_USR; #endif next_page_start = (pc_start & TARGET_PAGE_MASK) + TARGET_PAGE_SIZE; nb_gen_labels = 0; lj = -1; do { if (env->nb_breakpoints > 0) { for(j = 0; j < env->nb_breakpoints; j++) { if (env->breakpoints[j] == dc->pc) { gen_op_movl_T0_im((long)dc->pc); gen_op_movl_reg_TN[0][15](); gen_op_debug(); dc->is_jmp = DISAS_JUMP; break; } } } if (search_pc) { j = gen_opc_ptr - gen_opc_buf; if (lj < j) { lj++; while (lj < j) gen_opc_instr_start[lj++] = 0; } gen_opc_pc[lj] = dc->pc; gen_opc_instr_start[lj] = 1; } if (env->thumb) disas_thumb_insn(dc); else disas_arm_insn(env, dc); if (dc->condjmp && !dc->is_jmp) { gen_set_label(dc->condlabel); dc->condjmp = 0; } /* Terminate the TB on memory ops if watchpoints are present. */ /* FIXME: This should be replacd by the deterministic execution * IRQ raising bits. */ if (dc->is_mem && env->nb_watchpoints) break; /* Translation stops when a conditional branch is enoutered. * Otherwise the subsequent code could get translated several times. * Also stop translation when a page boundary is reached. This * ensures prefech aborts occur at the right place. */ } while (!dc->is_jmp && gen_opc_ptr < gen_opc_end && !env->singlestep_enabled && dc->pc < next_page_start); /* At this stage dc->condjmp will only be set when the skipped * instruction was a conditional branch, and the PC has already been * written. */ if (__builtin_expect(env->singlestep_enabled, 0)) { /* Make sure the pc is updated, and raise a debug exception. */ if (dc->condjmp) { gen_op_debug(); gen_set_label(dc->condlabel); } if (dc->condjmp || !dc->is_jmp) { gen_op_movl_T0_im((long)dc->pc); gen_op_movl_reg_TN[0][15](); dc->condjmp = 0; } gen_op_debug(); } else { switch(dc->is_jmp) { case DISAS_NEXT: gen_goto_tb(dc, 1, dc->pc); break; default: case DISAS_JUMP: case DISAS_UPDATE: /* indicate that the hash table must be used to find the next TB */ gen_op_movl_T0_0(); gen_op_exit_tb(); break; case DISAS_TB_JUMP: /* nothing more to generate */ break; } if (dc->condjmp) { gen_set_label(dc->condlabel); gen_goto_tb(dc, 1, dc->pc); dc->condjmp = 0; } } *gen_opc_ptr = INDEX_op_end; #ifdef DEBUG_DISAS if (loglevel & CPU_LOG_TB_IN_ASM) { fprintf(logfile, "----------------\n"); fprintf(logfile, "IN: %s\n", lookup_symbol(pc_start)); target_disas(logfile, pc_start, dc->pc - pc_start, env->thumb); fprintf(logfile, "\n"); if (loglevel & (CPU_LOG_TB_OP)) { fprintf(logfile, "OP:\n"); dump_ops(gen_opc_buf, gen_opparam_buf); fprintf(logfile, "\n"); } } #endif if (search_pc) { j = gen_opc_ptr - gen_opc_buf; lj++; while (lj <= j) gen_opc_instr_start[lj++] = 0; tb->size = 0; } else { tb->size = dc->pc - pc_start; } return 0; }
24,549
qemu
1c46efaa0a175e468772405385ca26a1e35dd94c
0
static void qcow_aio_read_cb(void *opaque, int ret) { QCowAIOCB *acb = opaque; BlockDriverState *bs = acb->common.bs; BDRVQcowState *s = bs->opaque; int index_in_cluster, n1; acb->hd_aiocb = NULL; if (ret < 0) goto done; /* post process the read buffer */ if (!acb->cluster_offset) { /* nothing to do */ } else if (acb->cluster_offset & QCOW_OFLAG_COMPRESSED) { /* nothing to do */ } else { if (s->crypt_method) { qcow2_encrypt_sectors(s, acb->sector_num, acb->buf, acb->buf, acb->cur_nr_sectors, 0, &s->aes_decrypt_key); } } acb->remaining_sectors -= acb->cur_nr_sectors; acb->sector_num += acb->cur_nr_sectors; acb->buf += acb->cur_nr_sectors * 512; if (acb->remaining_sectors == 0) { /* request completed */ ret = 0; goto done; } /* prepare next AIO request */ acb->cur_nr_sectors = acb->remaining_sectors; acb->cluster_offset = qcow2_get_cluster_offset(bs, acb->sector_num << 9, &acb->cur_nr_sectors); index_in_cluster = acb->sector_num & (s->cluster_sectors - 1); if (!acb->cluster_offset) { if (bs->backing_hd) { /* read from the base image */ n1 = qcow2_backing_read1(bs->backing_hd, acb->sector_num, acb->buf, acb->cur_nr_sectors); if (n1 > 0) { acb->hd_iov.iov_base = (void *)acb->buf; acb->hd_iov.iov_len = acb->cur_nr_sectors * 512; qemu_iovec_init_external(&acb->hd_qiov, &acb->hd_iov, 1); BLKDBG_EVENT(bs->file, BLKDBG_READ_BACKING_AIO); acb->hd_aiocb = bdrv_aio_readv(bs->backing_hd, acb->sector_num, &acb->hd_qiov, acb->cur_nr_sectors, qcow_aio_read_cb, acb); if (acb->hd_aiocb == NULL) goto done; } else { ret = qcow_schedule_bh(qcow_aio_read_bh, acb); if (ret < 0) goto done; } } else { /* Note: in this case, no need to wait */ memset(acb->buf, 0, 512 * acb->cur_nr_sectors); ret = qcow_schedule_bh(qcow_aio_read_bh, acb); if (ret < 0) goto done; } } else if (acb->cluster_offset & QCOW_OFLAG_COMPRESSED) { /* add AIO support for compressed blocks ? */ if (qcow2_decompress_cluster(bs, acb->cluster_offset) < 0) goto done; memcpy(acb->buf, s->cluster_cache + index_in_cluster * 512, 512 * acb->cur_nr_sectors); ret = qcow_schedule_bh(qcow_aio_read_bh, acb); if (ret < 0) goto done; } else { if ((acb->cluster_offset & 511) != 0) { ret = -EIO; goto done; } acb->hd_iov.iov_base = (void *)acb->buf; acb->hd_iov.iov_len = acb->cur_nr_sectors * 512; qemu_iovec_init_external(&acb->hd_qiov, &acb->hd_iov, 1); BLKDBG_EVENT(bs->file, BLKDBG_READ_AIO); acb->hd_aiocb = bdrv_aio_readv(bs->file, (acb->cluster_offset >> 9) + index_in_cluster, &acb->hd_qiov, acb->cur_nr_sectors, qcow_aio_read_cb, acb); if (acb->hd_aiocb == NULL) { ret = -EIO; goto done; } } return; done: if (acb->qiov->niov > 1) { qemu_iovec_from_buffer(acb->qiov, acb->orig_buf, acb->qiov->size); qemu_vfree(acb->orig_buf); } acb->common.cb(acb->common.opaque, ret); qemu_aio_release(acb); }
24,550
qemu
d8754f40acb2d30e4735cdcd21a16e7ac29264a3
0
opts_end_list(Visitor *v, Error **errp) { OptsVisitor *ov = DO_UPCAST(OptsVisitor, visitor, v); assert(ov->list_mode == LM_STARTED || ov->list_mode == LM_IN_PROGRESS); ov->repeated_opts = NULL; ov->list_mode = LM_NONE; }
24,551
qemu
1ea879e5580f63414693655fcf0328559cdce138
0
static CaptureVoiceOut *audio_pcm_capture_find_specific ( AudioState *s, audsettings_t *as ) { CaptureVoiceOut *cap; for (cap = s->cap_head.lh_first; cap; cap = cap->entries.le_next) { if (audio_pcm_info_eq (&cap->hw.info, as)) { return cap; } } return NULL; }
24,552
FFmpeg
fbd6c97f9ca858140df16dd07200ea0d4bdc1a83
1
AVBufferRef *av_buffer_pool_get(AVBufferPool *pool) { AVBufferRef *ret; BufferPoolEntry *buf; /* check whether the pool is empty */ buf = get_pool(pool); if (!buf) return pool_alloc_buffer(pool); /* keep the first entry, return the rest of the list to the pool */ add_to_pool(buf->next); buf->next = NULL; ret = av_buffer_create(buf->data, pool->size, pool_release_buffer, buf, 0); if (!ret) { add_to_pool(buf); return NULL; } avpriv_atomic_int_add_and_fetch(&pool->refcount, 1); return ret; }
24,553
qemu
c599d4d6d6e9bfdb64e54c33a22cb26e3496b96d
1
static void QEMU_NORETURN force_sig(int target_sig) { CPUState *cpu = thread_cpu; CPUArchState *env = cpu->env_ptr; TaskState *ts = (TaskState *)cpu->opaque; int host_sig, core_dumped = 0; struct sigaction act; host_sig = target_to_host_signal(target_sig); trace_user_force_sig(env, target_sig, host_sig); gdb_signalled(env, target_sig); /* dump core if supported by target binary format */ if (core_dump_signal(target_sig) && (ts->bprm->core_dump != NULL)) { stop_all_tasks(); core_dumped = ((*ts->bprm->core_dump)(target_sig, env) == 0); } if (core_dumped) { /* we already dumped the core of target process, we don't want * a coredump of qemu itself */ struct rlimit nodump; getrlimit(RLIMIT_CORE, &nodump); nodump.rlim_cur=0; setrlimit(RLIMIT_CORE, &nodump); (void) fprintf(stderr, "qemu: uncaught target signal %d (%s) - %s\n", target_sig, strsignal(host_sig), "core dumped" ); } /* The proper exit code for dying from an uncaught signal is * -<signal>. The kernel doesn't allow exit() or _exit() to pass * a negative value. To get the proper exit code we need to * actually die from an uncaught signal. Here the default signal * handler is installed, we send ourself a signal and we wait for * it to arrive. */ sigfillset(&act.sa_mask); act.sa_handler = SIG_DFL; act.sa_flags = 0; sigaction(host_sig, &act, NULL); /* For some reason raise(host_sig) doesn't send the signal when * statically linked on x86-64. */ kill(getpid(), host_sig); /* Make sure the signal isn't masked (just reuse the mask inside of act) */ sigdelset(&act.sa_mask, host_sig); sigsuspend(&act.sa_mask); /* unreachable */ abort(); }
24,554
FFmpeg
20035fa24103da9199de3515ca75ba1f6bb275aa
1
static int scale_vector(int16_t *dst, const int16_t *vector, int length) { int bits, max = 0; int i; for (i = 0; i < length; i++) max |= FFABS(vector[i]); bits = normalize_bits(max, 15); if (bits == 15) for (i = 0; i < length; i++) dst[i] = vector[i] * 0x7fff >> 3; else for (i = 0; i < length; i++) dst[i] = vector[i] << bits >> 3; return bits - 3; }
24,555
qemu
8dfbaa6ac450c4ec2646b1ca08a4017052a90c1d
0
static int virtio_ccw_hcall_notify(const uint64_t *args) { uint64_t subch_id = args[0]; uint64_t queue = args[1]; SubchDev *sch; int cssid, ssid, schid, m; if (ioinst_disassemble_sch_ident(subch_id, &m, &cssid, &ssid, &schid)) { return -EINVAL; } sch = css_find_subch(m, cssid, ssid, schid); if (!sch || !css_subch_visible(sch)) { return -EINVAL; } if (queue >= VIRTIO_PCI_QUEUE_MAX) { return -EINVAL; } virtio_queue_notify(virtio_ccw_get_vdev(sch), queue); return 0; }
24,556
FFmpeg
c04643a2c24564aed96a5b0760de8bf02eb305c6
0
void prepare_grab(void) { int has_video, has_audio, i, j; AVFormatContext *oc; AVFormatContext *ic; AVFormatParameters ap1, *ap = &ap1; /* see if audio/video inputs are needed */ has_video = 0; has_audio = 0; memset(ap, 0, sizeof(*ap)); for(j=0;j<nb_output_files;j++) { oc = output_files[j]; for(i=0;i<oc->nb_streams;i++) { AVCodecContext *enc = &oc->streams[i]->codec; switch(enc->codec_type) { case CODEC_TYPE_AUDIO: if (enc->sample_rate > ap->sample_rate) ap->sample_rate = enc->sample_rate; if (enc->channels > ap->channels) ap->channels = enc->channels; has_audio = 1; break; case CODEC_TYPE_VIDEO: if (enc->width > ap->width) ap->width = enc->width; if (enc->height > ap->height) ap->height = enc->height; if (enc->frame_rate > ap->frame_rate) ap->frame_rate = enc->frame_rate; has_video = 1; break; default: abort(); } } } if (has_video == 0 && has_audio == 0) { fprintf(stderr, "Output file must have at least one audio or video stream\n"); exit(1); } if (has_video) { AVInputFormat *fmt1; fmt1 = av_find_input_format("video_grab_device"); if (av_open_input_file(&ic, "", fmt1, 0, ap) < 0) { fprintf(stderr, "Could not find video grab device\n"); exit(1); } /* by now video grab has one stream */ ic->streams[0]->r_frame_rate = ap->frame_rate; input_files[nb_input_files] = ic; dump_format(ic, nb_input_files, v4l_device, 0); nb_input_files++; } if (has_audio) { AVInputFormat *fmt1; fmt1 = av_find_input_format("audio_device"); if (av_open_input_file(&ic, "", fmt1, 0, ap) < 0) { fprintf(stderr, "Could not find audio grab device\n"); exit(1); } input_files[nb_input_files] = ic; dump_format(ic, nb_input_files, audio_device, 0); nb_input_files++; } }
24,557
FFmpeg
9156a5ad72e989e0fa2735741edf894fffad33b9
0
static void ipvideo_decode_opcodes(IpvideoContext *s) { int x, y; unsigned char opcode; int ret; static int frame = 0; GetBitContext gb; debug_interplay("------------------ frame %d\n", frame); frame++; /* this is PAL8, so make the palette available */ memcpy(s->current_frame.data[1], s->avctx->palctrl->palette, PALETTE_COUNT * 4); s->stride = s->current_frame.linesize[0]; s->stream_ptr = s->buf + 14; /* data starts 14 bytes in */ s->stream_end = s->buf + s->size; s->line_inc = s->stride - 8; s->upper_motion_limit_offset = (s->avctx->height - 8) * s->stride + s->avctx->width - 8; init_get_bits(&gb, s->decoding_map, s->decoding_map_size * 8); for (y = 0; y < (s->stride * s->avctx->height); y += s->stride * 8) { for (x = y; x < y + s->avctx->width; x += 8) { opcode = get_bits(&gb, 4); debug_interplay(" block @ (%3d, %3d): encoding 0x%X, data ptr @ %p\n", x - y, y / s->stride, opcode, s->stream_ptr); s->pixel_ptr = s->current_frame.data[0] + x; ret = ipvideo_decode_block[opcode](s); if (ret != 0) { av_log(s->avctx, AV_LOG_ERROR, " Interplay video: decode problem on frame %d, @ block (%d, %d)\n", frame, x - y, y / s->stride); return; } } } if (s->stream_end - s->stream_ptr > 1) { av_log(s->avctx, AV_LOG_ERROR, " Interplay video: decode finished with %td bytes left over\n", s->stream_end - s->stream_ptr); } }
24,558
qemu
21ce148c7ec71ee32834061355a5ecfd1a11f90f
1
static inline void cris_fidx_i(unsigned int x) { register unsigned int v asm("$r10") = x; asm ("fidxi\t[%0]\n" : : "r" (v) ); }
24,559
qemu
b6fcf32d9b851a83dedcb609091236b97cc4a985
0
static void test_nested_struct_list(gconstpointer opaque) { TestArgs *args = (TestArgs *) opaque; const SerializeOps *ops = args->ops; UserDefNestedList *listp = NULL, *tmp, *tmp_copy, *listp_copy = NULL; Error *err = NULL; void *serialize_data; int i = 0; for (i = 0; i < 8; i++) { tmp = g_malloc0(sizeof(UserDefNestedList)); tmp->value = nested_struct_create(); tmp->next = listp; listp = tmp; } ops->serialize(listp, &serialize_data, visit_nested_struct_list, &err); ops->deserialize((void **)&listp_copy, serialize_data, visit_nested_struct_list, &err); g_assert(err == NULL); tmp = listp; tmp_copy = listp_copy; while (listp_copy) { g_assert(listp); nested_struct_compare(listp->value, listp_copy->value); listp = listp->next; listp_copy = listp_copy->next; } qapi_free_UserDefNestedList(tmp); qapi_free_UserDefNestedList(tmp_copy); ops->cleanup(serialize_data); g_free(args); }
24,560
FFmpeg
229843aa359ae0c9519977d7fa952688db63f559
0
static void handle_char(CCaptionSubContext *ctx, char hi, char lo, int64_t pts) { struct Screen *screen = get_writing_screen(ctx); char *row = screen->characters[ctx->cursor_row]; int ret; SET_FLAG(screen->row_used,ctx->cursor_row); ret = write_char(ctx, row, ctx->cursor_column, hi); if( ret == 0 ) ctx->cursor_column++; if(lo) { ret = write_char(ctx, row, ctx->cursor_column, lo); if ( ret == 0 ) ctx->cursor_column++; } write_char(ctx, row, ctx->cursor_column, 0); /* reset prev command since character can repeat */ ctx->prev_cmd[0] = 0; ctx->prev_cmd[1] = 0; if (lo) av_dlog(ctx, "(%c,%c)\n",hi,lo); else av_dlog(ctx, "(%c)\n",hi); }
24,561
qemu
12d4536f7d911b6d87a766ad7300482ea663cea2
1
int qemu_cpu_is_self(void *env) { return 1; }
24,562
qemu
71d0770c4cec9f1dc04f4dadcbf7fd6c335030a9
1
BlockDriverAIOCB *bdrv_aio_writev(BlockDriverState *bs, int64_t sector_num, QEMUIOVector *iov, int nb_sectors, BlockDriverCompletionFunc *cb, void *opaque) { return bdrv_aio_rw_vector(bs, sector_num, iov, nb_sectors, cb, opaque, 1); }
24,563
qemu
a8170e5e97ad17ca169c64ba87ae2f53850dab4c
0
static void omap_mcbsp_writeh(void *opaque, target_phys_addr_t addr, uint32_t value) { struct omap_mcbsp_s *s = (struct omap_mcbsp_s *) opaque; int offset = addr & OMAP_MPUI_REG_MASK; switch (offset) { case 0x00: /* DRR2 */ case 0x02: /* DRR1 */ OMAP_RO_REG(addr); return; case 0x04: /* DXR2 */ if (((s->xcr[0] >> 5) & 7) < 3) /* XWDLEN1 */ return; /* Fall through. */ case 0x06: /* DXR1 */ if (s->tx_req > 1) { s->tx_req -= 2; if (s->codec && s->codec->cts) { s->codec->out.fifo[s->codec->out.len ++] = (value >> 8) & 0xff; s->codec->out.fifo[s->codec->out.len ++] = (value >> 0) & 0xff; } if (s->tx_req < 2) omap_mcbsp_tx_done(s); } else printf("%s: Tx FIFO overrun\n", __FUNCTION__); return; case 0x08: /* SPCR2 */ s->spcr[1] &= 0x0002; s->spcr[1] |= 0x03f9 & value; s->spcr[1] |= 0x0004 & (value << 2); /* XEMPTY := XRST */ if (~value & 1) /* XRST */ s->spcr[1] &= ~6; omap_mcbsp_req_update(s); return; case 0x0a: /* SPCR1 */ s->spcr[0] &= 0x0006; s->spcr[0] |= 0xf8f9 & value; if (value & (1 << 15)) /* DLB */ printf("%s: Digital Loopback mode enable attempt\n", __FUNCTION__); if (~value & 1) { /* RRST */ s->spcr[0] &= ~6; s->rx_req = 0; omap_mcbsp_rx_done(s); } omap_mcbsp_req_update(s); return; case 0x0c: /* RCR2 */ s->rcr[1] = value & 0xffff; return; case 0x0e: /* RCR1 */ s->rcr[0] = value & 0x7fe0; return; case 0x10: /* XCR2 */ s->xcr[1] = value & 0xffff; return; case 0x12: /* XCR1 */ s->xcr[0] = value & 0x7fe0; return; case 0x14: /* SRGR2 */ s->srgr[1] = value & 0xffff; omap_mcbsp_req_update(s); return; case 0x16: /* SRGR1 */ s->srgr[0] = value & 0xffff; omap_mcbsp_req_update(s); return; case 0x18: /* MCR2 */ s->mcr[1] = value & 0x03e3; if (value & 3) /* XMCM */ printf("%s: Tx channel selection mode enable attempt\n", __FUNCTION__); return; case 0x1a: /* MCR1 */ s->mcr[0] = value & 0x03e1; if (value & 1) /* RMCM */ printf("%s: Rx channel selection mode enable attempt\n", __FUNCTION__); return; case 0x1c: /* RCERA */ s->rcer[0] = value & 0xffff; return; case 0x1e: /* RCERB */ s->rcer[1] = value & 0xffff; return; case 0x20: /* XCERA */ s->xcer[0] = value & 0xffff; return; case 0x22: /* XCERB */ s->xcer[1] = value & 0xffff; return; case 0x24: /* PCR0 */ s->pcr = value & 0x7faf; return; case 0x26: /* RCERC */ s->rcer[2] = value & 0xffff; return; case 0x28: /* RCERD */ s->rcer[3] = value & 0xffff; return; case 0x2a: /* XCERC */ s->xcer[2] = value & 0xffff; return; case 0x2c: /* XCERD */ s->xcer[3] = value & 0xffff; return; case 0x2e: /* RCERE */ s->rcer[4] = value & 0xffff; return; case 0x30: /* RCERF */ s->rcer[5] = value & 0xffff; return; case 0x32: /* XCERE */ s->xcer[4] = value & 0xffff; return; case 0x34: /* XCERF */ s->xcer[5] = value & 0xffff; return; case 0x36: /* RCERG */ s->rcer[6] = value & 0xffff; return; case 0x38: /* RCERH */ s->rcer[7] = value & 0xffff; return; case 0x3a: /* XCERG */ s->xcer[6] = value & 0xffff; return; case 0x3c: /* XCERH */ s->xcer[7] = value & 0xffff; return; } OMAP_BAD_REG(addr); }
24,564
FFmpeg
1f630b97178cdf1637c96f0eecd0975cde30bb7c
0
static inline void h264_loop_filter_luma_mmx2(uint8_t *pix, int stride, int alpha1, int beta1, int8_t *tc0) { DECLARE_ALIGNED_8(uint64_t, tmp0[2]); __asm__ volatile( "movq (%1,%3), %%mm0 \n\t" //p1 "movq (%1,%3,2), %%mm1 \n\t" //p0 "movq (%2), %%mm2 \n\t" //q0 "movq (%2,%3), %%mm3 \n\t" //q1 H264_DEBLOCK_MASK(%6, %7) "movd %5, %%mm4 \n\t" "punpcklbw %%mm4, %%mm4 \n\t" "punpcklwd %%mm4, %%mm4 \n\t" "pcmpeqb %%mm3, %%mm3 \n\t" "movq %%mm4, %%mm6 \n\t" "pcmpgtb %%mm3, %%mm4 \n\t" "movq %%mm6, 8+%0 \n\t" "pand %%mm4, %%mm7 \n\t" "movq %%mm7, %0 \n\t" /* filter p1 */ "movq (%1), %%mm3 \n\t" //p2 DIFF_GT2_MMX(%%mm1, %%mm3, %%mm5, %%mm6, %%mm4) // |p2-p0|>beta-1 "pand %%mm7, %%mm6 \n\t" // mask & |p2-p0|<beta "pand 8+%0, %%mm7 \n\t" // mask & tc0 "movq %%mm7, %%mm4 \n\t" "psubb %%mm6, %%mm7 \n\t" "pand %%mm4, %%mm6 \n\t" // mask & |p2-p0|<beta & tc0 H264_DEBLOCK_Q1(%%mm0, %%mm3, "(%1)", "(%1,%3)", %%mm6, %%mm4) /* filter q1 */ "movq (%2,%3,2), %%mm4 \n\t" //q2 DIFF_GT2_MMX(%%mm2, %%mm4, %%mm5, %%mm6, %%mm3) // |q2-q0|>beta-1 "pand %0, %%mm6 \n\t" "movq 8+%0, %%mm5 \n\t" // can be merged with the and below but is slower then "pand %%mm6, %%mm5 \n\t" "psubb %%mm6, %%mm7 \n\t" "movq (%2,%3), %%mm3 \n\t" H264_DEBLOCK_Q1(%%mm3, %%mm4, "(%2,%3,2)", "(%2,%3)", %%mm5, %%mm6) /* filter p0, q0 */ H264_DEBLOCK_P0_Q0(%8, unused) "movq %%mm1, (%1,%3,2) \n\t" "movq %%mm2, (%2) \n\t" : "=m"(*tmp0) : "r"(pix-3*stride), "r"(pix), "r"((x86_reg)stride), "m"(*tmp0/*unused*/), "m"(*(uint32_t*)tc0), "m"(alpha1), "m"(beta1), "m"(ff_bone) ); }
24,565
FFmpeg
4c55144ee969a63bb5e469e3ebd7179b7b3616e8
0
static int filter_frame(AVFilterLink *inlink, AVFrame *buf) { AVFilterContext *ctx = inlink->dst; AVFilterLink *outlink = ctx->outputs[0]; DeflickerContext *s = ctx->priv; AVDictionary **metadata; AVFrame *out, *in; float f; int y; if (s->q.available < s->size && !s->eof) { s->luminance[s->available] = s->calc_avgy(ctx, buf); ff_bufqueue_add(ctx, &s->q, buf); s->available++; return 0; } in = ff_bufqueue_peek(&s->q, 0); out = ff_get_video_buffer(outlink, outlink->w, outlink->h); if (!out) { av_frame_free(&buf); return AVERROR(ENOMEM); } s->get_factor(ctx, &f); s->deflicker(ctx, in->data[0], in->linesize[0], out->data[0], out->linesize[0], outlink->w, outlink->h, f); for (y = 1; y < s->nb_planes; y++) { av_image_copy_plane(out->data[y], out->linesize[y], in->data[y], in->linesize[y], s->planewidth[y] * (1 + (s->depth > 8)), s->planeheight[y]); } av_frame_copy_props(out, in); metadata = &out->metadata; if (metadata) { uint8_t value[128]; snprintf(value, sizeof(value), "%f", s->luminance[0]); av_dict_set(metadata, "lavfi.deflicker.luminance", value, 0); snprintf(value, sizeof(value), "%f", s->luminance[0] * f); av_dict_set(metadata, "lavfi.deflicker.new_luminance", value, 0); snprintf(value, sizeof(value), "%f", f - 1.0f); av_dict_set(metadata, "lavfi.deflicker.relative_change", value, 0); } in = ff_bufqueue_get(&s->q); av_frame_free(&in); memmove(&s->luminance[0], &s->luminance[1], sizeof(*s->luminance) * (s->size - 1)); s->luminance[s->available - 1] = s->calc_avgy(ctx, buf); ff_bufqueue_add(ctx, &s->q, buf); return ff_filter_frame(outlink, out); }
24,566
qemu
ec9c10d29c6bb5613a680af62f5825d3bb2d31d4
1
static DriveInfo *blockdev_init(QDict *bs_opts, BlockInterfaceType type, Error **errp) { const char *buf; const char *file = NULL; const char *serial; int ro = 0; int bdrv_flags = 0; int on_read_error, on_write_error; DriveInfo *dinfo; ThrottleConfig cfg; int snapshot = 0; bool copy_on_read; int ret; Error *error = NULL; QemuOpts *opts; const char *id; bool has_driver_specific_opts; BlockDriver *drv = NULL; /* Check common options by copying from bs_opts to opts, all other options * stay in bs_opts for processing by bdrv_open(). */ id = qdict_get_try_str(bs_opts, "id"); opts = qemu_opts_create(&qemu_common_drive_opts, id, 1, &error); if (error_is_set(&error)) { error_propagate(errp, error); return NULL; } qemu_opts_absorb_qdict(opts, bs_opts, &error); if (error_is_set(&error)) { error_propagate(errp, error); return NULL; } if (id) { qdict_del(bs_opts, "id"); } has_driver_specific_opts = !!qdict_size(bs_opts); /* extract parameters */ snapshot = qemu_opt_get_bool(opts, "snapshot", 0); ro = qemu_opt_get_bool(opts, "read-only", 0); copy_on_read = qemu_opt_get_bool(opts, "copy-on-read", false); file = qemu_opt_get(opts, "file"); serial = qemu_opt_get(opts, "serial"); if ((buf = qemu_opt_get(opts, "discard")) != NULL) { if (bdrv_parse_discard_flags(buf, &bdrv_flags) != 0) { error_setg(errp, "invalid discard option"); return NULL; } } if (qemu_opt_get_bool(opts, "cache.writeback", true)) { bdrv_flags |= BDRV_O_CACHE_WB; } if (qemu_opt_get_bool(opts, "cache.direct", false)) { bdrv_flags |= BDRV_O_NOCACHE; } if (qemu_opt_get_bool(opts, "cache.no-flush", false)) { bdrv_flags |= BDRV_O_NO_FLUSH; } #ifdef CONFIG_LINUX_AIO if ((buf = qemu_opt_get(opts, "aio")) != NULL) { if (!strcmp(buf, "native")) { bdrv_flags |= BDRV_O_NATIVE_AIO; } else if (!strcmp(buf, "threads")) { /* this is the default */ } else { error_setg(errp, "invalid aio option"); return NULL; } } #endif if ((buf = qemu_opt_get(opts, "format")) != NULL) { if (is_help_option(buf)) { error_printf("Supported formats:"); bdrv_iterate_format(bdrv_format_print, NULL); error_printf("\n"); return NULL; } drv = bdrv_find_format(buf); if (!drv) { error_setg(errp, "'%s' invalid format", buf); return NULL; } } /* disk I/O throttling */ memset(&cfg, 0, sizeof(cfg)); cfg.buckets[THROTTLE_BPS_TOTAL].avg = qemu_opt_get_number(opts, "throttling.bps-total", 0); cfg.buckets[THROTTLE_BPS_READ].avg = qemu_opt_get_number(opts, "throttling.bps-read", 0); cfg.buckets[THROTTLE_BPS_WRITE].avg = qemu_opt_get_number(opts, "throttling.bps-write", 0); cfg.buckets[THROTTLE_OPS_TOTAL].avg = qemu_opt_get_number(opts, "throttling.iops-total", 0); cfg.buckets[THROTTLE_OPS_READ].avg = qemu_opt_get_number(opts, "throttling.iops-read", 0); cfg.buckets[THROTTLE_OPS_WRITE].avg = qemu_opt_get_number(opts, "throttling.iops-write", 0); cfg.buckets[THROTTLE_BPS_TOTAL].max = qemu_opt_get_number(opts, "throttling.bps-total-max", 0); cfg.buckets[THROTTLE_BPS_READ].max = qemu_opt_get_number(opts, "throttling.bps-read-max", 0); cfg.buckets[THROTTLE_BPS_WRITE].max = qemu_opt_get_number(opts, "throttling.bps-write-max", 0); cfg.buckets[THROTTLE_OPS_TOTAL].max = qemu_opt_get_number(opts, "throttling.iops-total-max", 0); cfg.buckets[THROTTLE_OPS_READ].max = qemu_opt_get_number(opts, "throttling.iops-read-max", 0); cfg.buckets[THROTTLE_OPS_WRITE].max = qemu_opt_get_number(opts, "throttling.iops-write-max", 0); cfg.op_size = qemu_opt_get_number(opts, "throttling.iops-size", 0); if (!check_throttle_config(&cfg, &error)) { error_propagate(errp, error); return NULL; } on_write_error = BLOCKDEV_ON_ERROR_ENOSPC; if ((buf = qemu_opt_get(opts, "werror")) != NULL) { if (type != IF_IDE && type != IF_SCSI && type != IF_VIRTIO && type != IF_NONE) { error_setg(errp, "werror is not supported by this bus type"); return NULL; } on_write_error = parse_block_error_action(buf, 0, &error); if (error_is_set(&error)) { error_propagate(errp, error); return NULL; } } on_read_error = BLOCKDEV_ON_ERROR_REPORT; if ((buf = qemu_opt_get(opts, "rerror")) != NULL) { if (type != IF_IDE && type != IF_VIRTIO && type != IF_SCSI && type != IF_NONE) { error_report("rerror is not supported by this bus type"); return NULL; } on_read_error = parse_block_error_action(buf, 1, &error); if (error_is_set(&error)) { error_propagate(errp, error); return NULL; } } /* init */ dinfo = g_malloc0(sizeof(*dinfo)); dinfo->id = g_strdup(qemu_opts_id(opts)); dinfo->bdrv = bdrv_new(dinfo->id); dinfo->bdrv->open_flags = snapshot ? BDRV_O_SNAPSHOT : 0; dinfo->bdrv->read_only = ro; dinfo->type = type; dinfo->refcount = 1; if (serial != NULL) { dinfo->serial = g_strdup(serial); } QTAILQ_INSERT_TAIL(&drives, dinfo, next); bdrv_set_on_error(dinfo->bdrv, on_read_error, on_write_error); /* disk I/O throttling */ if (throttle_enabled(&cfg)) { bdrv_io_limits_enable(dinfo->bdrv); bdrv_set_io_limits(dinfo->bdrv, &cfg); } if (!file || !*file) { if (has_driver_specific_opts) { file = NULL; } else { return dinfo; } } if (snapshot) { /* always use cache=unsafe with snapshot */ bdrv_flags &= ~BDRV_O_CACHE_MASK; bdrv_flags |= (BDRV_O_SNAPSHOT|BDRV_O_CACHE_WB|BDRV_O_NO_FLUSH); } if (copy_on_read) { bdrv_flags |= BDRV_O_COPY_ON_READ; } if (runstate_check(RUN_STATE_INMIGRATE)) { bdrv_flags |= BDRV_O_INCOMING; } bdrv_flags |= ro ? 0 : BDRV_O_RDWR; QINCREF(bs_opts); ret = bdrv_open(dinfo->bdrv, file, bs_opts, bdrv_flags, drv, &error); if (ret < 0) { error_setg(errp, "could not open disk image %s: %s", file ?: dinfo->id, error_get_pretty(error)); error_free(error); goto err; } if (bdrv_key_required(dinfo->bdrv)) autostart = 0; QDECREF(bs_opts); qemu_opts_del(opts); return dinfo; err: qemu_opts_del(opts); QDECREF(bs_opts); bdrv_unref(dinfo->bdrv); g_free(dinfo->id); QTAILQ_REMOVE(&drives, dinfo, next); g_free(dinfo); return NULL; }
24,567
FFmpeg
4bff9ef9d0781c4de228bf1f85634d2706fc589b
0
inline static void RENAME(hcscale)(uint16_t *dst, long dstWidth, uint8_t *src1, uint8_t *src2, int srcW, int xInc, int flags, int canMMX2BeUsed, int16_t *hChrFilter, int16_t *hChrFilterPos, int hChrFilterSize, void *funnyUVCode, int srcFormat, uint8_t *formatConvBuffer, int16_t *mmx2Filter, int32_t *mmx2FilterPos) { if(srcFormat==IMGFMT_YUY2) { RENAME(yuy2ToUV)(formatConvBuffer, formatConvBuffer+2048, src1, src2, srcW); src1= formatConvBuffer; src2= formatConvBuffer+2048; } else if(srcFormat==IMGFMT_UYVY) { RENAME(uyvyToUV)(formatConvBuffer, formatConvBuffer+2048, src1, src2, srcW); src1= formatConvBuffer; src2= formatConvBuffer+2048; } else if(srcFormat==IMGFMT_BGR32) { RENAME(bgr32ToUV)(formatConvBuffer, formatConvBuffer+2048, src1, src2, srcW); src1= formatConvBuffer; src2= formatConvBuffer+2048; } else if(srcFormat==IMGFMT_BGR24) { RENAME(bgr24ToUV)(formatConvBuffer, formatConvBuffer+2048, src1, src2, srcW); src1= formatConvBuffer; src2= formatConvBuffer+2048; } else if(srcFormat==IMGFMT_BGR16) { RENAME(bgr16ToUV)(formatConvBuffer, formatConvBuffer+2048, src1, src2, srcW); src1= formatConvBuffer; src2= formatConvBuffer+2048; } else if(srcFormat==IMGFMT_BGR15) { RENAME(bgr15ToUV)(formatConvBuffer, formatConvBuffer+2048, src1, src2, srcW); src1= formatConvBuffer; src2= formatConvBuffer+2048; } else if(srcFormat==IMGFMT_RGB32) { RENAME(rgb32ToUV)(formatConvBuffer, formatConvBuffer+2048, src1, src2, srcW); src1= formatConvBuffer; src2= formatConvBuffer+2048; } else if(srcFormat==IMGFMT_RGB24) { RENAME(rgb24ToUV)(formatConvBuffer, formatConvBuffer+2048, src1, src2, srcW); src1= formatConvBuffer; src2= formatConvBuffer+2048; } else if(isGray(srcFormat)) { return; } #ifdef HAVE_MMX // use the new MMX scaler if the mmx2 can't be used (its faster than the x86asm one) if(!(flags&SWS_FAST_BILINEAR) || (!canMMX2BeUsed)) #else if(!(flags&SWS_FAST_BILINEAR)) #endif { RENAME(hScale)(dst , dstWidth, src1, srcW, xInc, hChrFilter, hChrFilterPos, hChrFilterSize); RENAME(hScale)(dst+2048, dstWidth, src2, srcW, xInc, hChrFilter, hChrFilterPos, hChrFilterSize); } else // Fast Bilinear upscale / crap downscale { #if defined(ARCH_X86) || defined(ARCH_X86_64) #ifdef HAVE_MMX2 int i; if(canMMX2BeUsed) { asm volatile( "pxor %%mm7, %%mm7 \n\t" "mov %0, %%"REG_c" \n\t" "mov %1, %%"REG_D" \n\t" "mov %2, %%"REG_d" \n\t" "mov %3, %%"REG_b" \n\t" "xor %%"REG_a", %%"REG_a" \n\t" // i PREFETCH" (%%"REG_c") \n\t" PREFETCH" 32(%%"REG_c") \n\t" PREFETCH" 64(%%"REG_c") \n\t" #ifdef ARCH_X86_64 #define FUNNY_UV_CODE \ "movl (%%"REG_b"), %%esi \n\t"\ "call *%4 \n\t"\ "movl (%%"REG_b", %%"REG_a"), %%esi\n\t"\ "add %%"REG_S", %%"REG_c" \n\t"\ "add %%"REG_a", %%"REG_D" \n\t"\ "xor %%"REG_a", %%"REG_a" \n\t"\ #else #define FUNNY_UV_CODE \ "movl (%%"REG_b"), %%esi \n\t"\ "call *%4 \n\t"\ "addl (%%"REG_b", %%"REG_a"), %%"REG_c"\n\t"\ "add %%"REG_a", %%"REG_D" \n\t"\ "xor %%"REG_a", %%"REG_a" \n\t"\ #endif FUNNY_UV_CODE FUNNY_UV_CODE FUNNY_UV_CODE FUNNY_UV_CODE "xor %%"REG_a", %%"REG_a" \n\t" // i "mov %5, %%"REG_c" \n\t" // src "mov %1, %%"REG_D" \n\t" // buf1 "add $4096, %%"REG_D" \n\t" PREFETCH" (%%"REG_c") \n\t" PREFETCH" 32(%%"REG_c") \n\t" PREFETCH" 64(%%"REG_c") \n\t" FUNNY_UV_CODE FUNNY_UV_CODE FUNNY_UV_CODE FUNNY_UV_CODE :: "m" (src1), "m" (dst), "m" (mmx2Filter), "m" (mmx2FilterPos), "m" (funnyUVCode), "m" (src2) : "%"REG_a, "%"REG_b, "%"REG_c, "%"REG_d, "%"REG_S, "%"REG_D ); for(i=dstWidth-1; (i*xInc)>>16 >=srcW-1; i--) { // printf("%d %d %d\n", dstWidth, i, srcW); dst[i] = src1[srcW-1]*128; dst[i+2048] = src2[srcW-1]*128; } } else { #endif long xInc_shr16 = (long) (xInc >> 16); uint16_t xInc_mask = xInc & 0xffff; asm volatile( "xor %%"REG_a", %%"REG_a" \n\t" // i "xor %%"REG_b", %%"REG_b" \n\t" // xx "xorl %%ecx, %%ecx \n\t" // 2*xalpha ASMALIGN16 "1: \n\t" "mov %0, %%"REG_S" \n\t" "movzbl (%%"REG_S", %%"REG_b"), %%edi \n\t" //src[xx] "movzbl 1(%%"REG_S", %%"REG_b"), %%esi \n\t" //src[xx+1] "subl %%edi, %%esi \n\t" //src[xx+1] - src[xx] "imull %%ecx, %%esi \n\t" //(src[xx+1] - src[xx])*2*xalpha "shll $16, %%edi \n\t" "addl %%edi, %%esi \n\t" //src[xx+1]*2*xalpha + src[xx]*(1-2*xalpha) "mov %1, %%"REG_D" \n\t" "shrl $9, %%esi \n\t" "movw %%si, (%%"REG_D", %%"REG_a", 2)\n\t" "movzbl (%5, %%"REG_b"), %%edi \n\t" //src[xx] "movzbl 1(%5, %%"REG_b"), %%esi \n\t" //src[xx+1] "subl %%edi, %%esi \n\t" //src[xx+1] - src[xx] "imull %%ecx, %%esi \n\t" //(src[xx+1] - src[xx])*2*xalpha "shll $16, %%edi \n\t" "addl %%edi, %%esi \n\t" //src[xx+1]*2*xalpha + src[xx]*(1-2*xalpha) "mov %1, %%"REG_D" \n\t" "shrl $9, %%esi \n\t" "movw %%si, 4096(%%"REG_D", %%"REG_a", 2)\n\t" "addw %4, %%cx \n\t" //2*xalpha += xInc&0xFF "adc %3, %%"REG_b" \n\t" //xx+= xInc>>8 + carry "add $1, %%"REG_a" \n\t" "cmp %2, %%"REG_a" \n\t" " jb 1b \n\t" /* GCC-3.3 makes MPlayer crash on IA-32 machines when using "g" operand here, which is needed to support GCC-4.0 */ #if defined(ARCH_X86_64) && ((__GNUC__ > 3) || ( __GNUC__ == 3 && __GNUC_MINOR__ >= 4)) :: "m" (src1), "m" (dst), "g" ((long)dstWidth), "m" (xInc_shr16), "m" (xInc_mask), #else :: "m" (src1), "m" (dst), "m" ((long)dstWidth), "m" (xInc_shr16), "m" (xInc_mask), #endif "r" (src2) : "%"REG_a, "%"REG_b, "%ecx", "%"REG_D, "%esi" ); #ifdef HAVE_MMX2 } //if MMX2 can't be used #endif #else int i; unsigned int xpos=0; for(i=0;i<dstWidth;i++) { register unsigned int xx=xpos>>16; register unsigned int xalpha=(xpos&0xFFFF)>>9; dst[i]=(src1[xx]*(xalpha^127)+src1[xx+1]*xalpha); dst[i+2048]=(src2[xx]*(xalpha^127)+src2[xx+1]*xalpha); /* slower dst[i]= (src1[xx]<<7) + (src1[xx+1] - src1[xx])*xalpha; dst[i+2048]=(src2[xx]<<7) + (src2[xx+1] - src2[xx])*xalpha; */ xpos+=xInc; } #endif } }
24,568
FFmpeg
ffa1de8a3b93139097214bc600d356ab62bfdf05
1
static void dequantization_int_97(int x, int y, Jpeg2000Cblk *cblk, Jpeg2000Component *comp, Jpeg2000T1Context *t1, Jpeg2000Band *band) { int i, j; int w = cblk->coord[0][1] - cblk->coord[0][0]; for (j = 0; j < (cblk->coord[1][1] - cblk->coord[1][0]); ++j) { int32_t *datap = &comp->i_data[(comp->coord[0][1] - comp->coord[0][0]) * (y + j) + x]; int *src = t1->data[j]; for (i = 0; i < w; ++i) datap[i] = (src[i] * band->i_stepsize + (1<<14)) >> 15; } }
24,569
FFmpeg
bdcd36a4c81c50254f6204e83e0c14adc1391e66
0
yuv2rgb_full_1_c_template(SwsContext *c, const int16_t *buf0, const int16_t *ubuf[2], const int16_t *vbuf[2], const int16_t *abuf0, uint8_t *dest, int dstW, int uvalpha, int y, enum AVPixelFormat target, int hasAlpha) { const int16_t *ubuf0 = ubuf[0], *vbuf0 = vbuf[0]; int i; int step = (target == AV_PIX_FMT_RGB24 || target == AV_PIX_FMT_BGR24) ? 3 : 4; int err[4] = {0}; if( target == AV_PIX_FMT_BGR4_BYTE || target == AV_PIX_FMT_RGB4_BYTE || target == AV_PIX_FMT_BGR8 || target == AV_PIX_FMT_RGB8) step = 1; if (uvalpha < 2048) { int A = 0; //init to silence warning for (i = 0; i < dstW; i++) { int Y = buf0[i] << 2; int U = (ubuf0[i] - (128<<7)) << 2; int V = (vbuf0[i] - (128<<7)) << 2; if (hasAlpha) { A = (abuf0[i] + 64) >> 7; if (A & 0x100) A = av_clip_uint8(A); } yuv2rgb_write_full(c, dest, i, Y, A, U, V, y, target, hasAlpha, err); dest += step; } } else { const int16_t *ubuf1 = ubuf[1], *vbuf1 = vbuf[1]; int A = 0; //init to silence warning for (i = 0; i < dstW; i++) { int Y = buf0[i] << 2; int U = (ubuf0[i] + ubuf1[i] - (128<<8)) << 1; int V = (vbuf0[i] + vbuf1[i] - (128<<8)) << 1; if (hasAlpha) { A = (abuf0[i] + 64) >> 7; if (A & 0x100) A = av_clip_uint8(A); } yuv2rgb_write_full(c, dest, i, Y, A, U, V, y, target, hasAlpha, err); dest += step; } } c->dither_error[0][i] = err[0]; c->dither_error[1][i] = err[1]; c->dither_error[2][i] = err[2]; }
24,570
FFmpeg
3fd2d1c4bc43aab583f97afbb63ab91145f9e7ba
1
void Process(void *ctx, AVPicture *picture, enum PixelFormat pix_fmt, int width, int height, int64_t pts) { int err = 0; ContextInfo *ci = (ContextInfo *) ctx; AVPicture picture1; AVPicture picture2; AVPicture *pict = picture; int out_width; int out_height; int i; uint8_t *ptr = NULL; FILE *in = rwpipe_reader( ci->rw ); FILE *out = rwpipe_writer( ci->rw ); /* Check that we have a pipe to talk to. */ if ( in == NULL || out == NULL ) err = 1; /* Convert to RGB24 if necessary */ if ( !err && pix_fmt != PIX_FMT_RGB24 ) { int size = avpicture_get_size(PIX_FMT_RGB24, width, height); if ( size != ci->size1 ) { av_free( ci->buf1 ); ci->buf1 = av_malloc(size); ci->size1 = size; err = ci->buf1 == NULL; } if ( !err ) { avpicture_fill(&picture1, ci->buf1, PIX_FMT_RGB24, width, height); // if we already got a SWS context, let's realloc if is not re-useable ci->toRGB_convert_ctx = sws_getCachedContext(ci->toRGB_convert_ctx, width, height, pix_fmt, width, height, PIX_FMT_RGB24, sws_flags, NULL, NULL, NULL); if (ci->toRGB_convert_ctx == NULL) { av_log(NULL, AV_LOG_ERROR, "Cannot initialize the toRGB conversion context\n"); return; } // img_convert parameters are 2 first destination, then 4 source // sws_scale parameters are context, 4 first source, then 2 destination sws_scale(ci->toRGB_convert_ctx, picture->data, picture->linesize, 0, height, picture1.data, picture1.linesize); pict = &picture1; } } /* Write out the PPM */ if ( !err ) { ptr = pict->data[ 0 ]; fprintf( out, "P6\n%d %d\n255\n", width, height ); for ( i = 0; !err && i < height; i ++ ) { err = !fwrite( ptr, width * 3, 1, out ); ptr += pict->linesize[ 0 ]; } if ( !err ) err = fflush( out ); } /* Read the PPM returned. */ if ( !err && !rwpipe_read_ppm_header( ci->rw, &out_width, &out_height ) ) { int size = avpicture_get_size(PIX_FMT_RGB24, out_width, out_height); if ( size != ci->size2 ) { av_free( ci->buf2 ); ci->buf2 = av_malloc(size); ci->size2 = size; err = ci->buf2 == NULL; } if ( !err ) { avpicture_fill(&picture2, ci->buf2, PIX_FMT_RGB24, out_width, out_height); ptr = picture2.data[ 0 ]; for ( i = 0; !err && i < out_height; i ++ ) { err = !fread( ptr, out_width * 3, 1, in ); ptr += picture2.linesize[ 0 ]; } } } /* Convert the returned PPM back to the input format */ if ( !err ) { /* The out_width/out_height returned from the PPM * filter won't necessarily be the same as width and height * but it will be scaled anyway to width/height. */ av_log(NULL, AV_LOG_DEBUG, "PPM vhook: Input dimensions: %d x %d Output dimensions: %d x %d\n", width, height, out_width, out_height); ci->fromRGB_convert_ctx = sws_getCachedContext(ci->fromRGB_convert_ctx, out_width, out_height, PIX_FMT_RGB24, width, height, pix_fmt, sws_flags, NULL, NULL, NULL); if (ci->fromRGB_convert_ctx == NULL) { av_log(NULL, AV_LOG_ERROR, "Cannot initialize the fromRGB conversion context\n"); return; } // img_convert parameters are 2 first destination, then 4 source // sws_scale parameters are context, 4 first source, then 2 destination sws_scale(ci->fromRGB_convert_ctx, picture2.data, picture2.linesize, 0, out_height, picture->data, picture->linesize); } }
24,571
FFmpeg
b6db385922b79939b0dc124d53ddb4824afac040
0
static int v4l2_set_parameters(AVFormatContext *s1, AVFormatParameters *ap) { struct video_data *s = s1->priv_data; struct v4l2_input input; struct v4l2_standard standard; struct v4l2_streamparm streamparm = { 0 }; struct v4l2_fract *tpf = &streamparm.parm.capture.timeperframe; int i, ret; AVRational framerate_q; streamparm.type = V4L2_BUF_TYPE_VIDEO_CAPTURE; if (s->framerate && (ret = av_parse_video_rate(&framerate_q, s->framerate)) < 0) { av_log(s1, AV_LOG_ERROR, "Could not parse framerate '%s'.\n", s->framerate); return ret; } /* set tv video input */ memset (&input, 0, sizeof (input)); input.index = s->channel; if (ioctl(s->fd, VIDIOC_ENUMINPUT, &input) < 0) { av_log(s1, AV_LOG_ERROR, "The V4L2 driver ioctl enum input failed:\n"); return AVERROR(EIO); } av_log(s1, AV_LOG_DEBUG, "The V4L2 driver set input_id: %d, input: %s\n", s->channel, input.name); if (ioctl(s->fd, VIDIOC_S_INPUT, &input.index) < 0) { av_log(s1, AV_LOG_ERROR, "The V4L2 driver ioctl set input(%d) failed\n", s->channel); return AVERROR(EIO); } if (s->standard) { av_log(s1, AV_LOG_DEBUG, "The V4L2 driver set standard: %s\n", s->standard); /* set tv standard */ memset (&standard, 0, sizeof (standard)); for(i=0;;i++) { standard.index = i; if (ioctl(s->fd, VIDIOC_ENUMSTD, &standard) < 0) { av_log(s1, AV_LOG_ERROR, "The V4L2 driver ioctl set standard(%s) failed\n", s->standard); return AVERROR(EIO); } if (!av_strcasecmp(standard.name, s->standard)) { break; } } av_log(s1, AV_LOG_DEBUG, "The V4L2 driver set standard: %s, id: %"PRIu64"\n", s->standard, (uint64_t)standard.id); if (ioctl(s->fd, VIDIOC_S_STD, &standard.id) < 0) { av_log(s1, AV_LOG_ERROR, "The V4L2 driver ioctl set standard(%s) failed\n", s->standard); return AVERROR(EIO); } } if (framerate_q.num && framerate_q.den) { av_log(s1, AV_LOG_DEBUG, "Setting time per frame to %d/%d\n", framerate_q.den, framerate_q.num); tpf->numerator = framerate_q.den; tpf->denominator = framerate_q.num; if (ioctl(s->fd, VIDIOC_S_PARM, &streamparm) != 0) { av_log(s1, AV_LOG_ERROR, "ioctl set time per frame(%d/%d) failed\n", framerate_q.den, framerate_q.num); return AVERROR(EIO); } if (framerate_q.num != tpf->denominator || framerate_q.den != tpf->numerator) { av_log(s1, AV_LOG_INFO, "The driver changed the time per frame from " "%d/%d to %d/%d\n", framerate_q.den, framerate_q.num, tpf->numerator, tpf->denominator); } } else { if (ioctl(s->fd, VIDIOC_G_PARM, &streamparm) != 0) { av_log(s1, AV_LOG_ERROR, "ioctl(VIDIOC_G_PARM): %s\n", strerror(errno)); return AVERROR(errno); } } s1->streams[0]->codec->time_base.den = tpf->denominator; s1->streams[0]->codec->time_base.num = tpf->numerator; s->timeout = 100 + av_rescale_q(1, s1->streams[0]->codec->time_base, (AVRational){1, 1000}); return 0; }
24,572
FFmpeg
38c48be213b86baa04e64762622afefbba1afa70
0
static int mpegts_read_packet(AVFormatContext *s, AVPacket *pkt) { MpegTSContext *ts = s->priv_data; if (!ts->mpeg2ts_raw) { ts->pkt = pkt; return handle_packets(ts, 0); } else { return mpegts_raw_read_packet(s, pkt); } }
24,573
qemu
7e84c2498f0ff3999937d18d1e9abaa030400000
0
static inline int load_segment(uint32_t *e1_ptr, uint32_t *e2_ptr, int selector) { SegmentCache *dt; int index; uint8_t *ptr; if (selector & 0x4) dt = &env->ldt; else dt = &env->gdt; index = selector & ~7; if ((index + 7) > dt->limit) return -1; ptr = dt->base + index; *e1_ptr = ldl_kernel(ptr); *e2_ptr = ldl_kernel(ptr + 4); return 0; }
24,574
FFmpeg
1dc42050185d63c1de5d16146fbaee92640af187
0
static int start_frame(AVFilterLink *link, AVFilterBufferRef *picref) { AVFilterContext *ctx = link->dst; YADIFContext *yadif = ctx->priv; if (yadif->frame_pending) return_frame(ctx, 1); if (yadif->prev) avfilter_unref_buffer(yadif->prev); yadif->prev = yadif->cur; yadif->cur = yadif->next; yadif->next = picref; if (!yadif->cur) return 0; if (yadif->auto_enable && !yadif->cur->video->interlaced) { yadif->out = avfilter_ref_buffer(yadif->cur, AV_PERM_READ); avfilter_unref_bufferp(&yadif->prev); if (yadif->out->pts != AV_NOPTS_VALUE) yadif->out->pts *= 2; return ff_start_frame(ctx->outputs[0], yadif->out); } if (!yadif->prev) yadif->prev = avfilter_ref_buffer(yadif->cur, AV_PERM_READ); yadif->out = ff_get_video_buffer(ctx->outputs[0], AV_PERM_WRITE | AV_PERM_PRESERVE | AV_PERM_REUSE, link->w, link->h); avfilter_copy_buffer_ref_props(yadif->out, yadif->cur); yadif->out->video->interlaced = 0; if (yadif->out->pts != AV_NOPTS_VALUE) yadif->out->pts *= 2; return ff_start_frame(ctx->outputs[0], yadif->out); }
24,575
FFmpeg
f6b7f72461673e4d398b1edf9ed2a7fe70d99c47
0
static void av_always_inline filter_mb_edgeh( uint8_t *pix, int stride, const int16_t bS[4], unsigned int qp, H264Context *h, int intra ) { const int qp_bd_offset = 6 * (h->sps.bit_depth_luma - 8); const unsigned int index_a = qp - qp_bd_offset + h->slice_alpha_c0_offset; const int alpha = alpha_table[index_a]; const int beta = beta_table[qp - qp_bd_offset + h->slice_beta_offset]; if (alpha ==0 || beta == 0) return; if( bS[0] < 4 || !intra ) { int8_t tc[4]; tc[0] = tc0_table[index_a][bS[0]]; tc[1] = tc0_table[index_a][bS[1]]; tc[2] = tc0_table[index_a][bS[2]]; tc[3] = tc0_table[index_a][bS[3]]; h->h264dsp.h264_v_loop_filter_luma(pix, stride, alpha, beta, tc); } else { h->h264dsp.h264_v_loop_filter_luma_intra(pix, stride, alpha, beta); } }
24,576
FFmpeg
ca203e9985cd2dcf42a0c0853940850d3a8edf3a
1
static void calc_thr_3gpp(const FFPsyWindowInfo *wi, const int num_bands, AacPsyChannel *pch, const uint8_t *band_sizes, const float *coefs) { int i, w, g; int start = 0; for (w = 0; w < wi->num_windows*16; w += 16) { for (g = 0; g < num_bands; g++) { AacPsyBand *band = &pch->band[w+g]; float form_factor = 0.0f; float Temp; band->energy = 0.0f; for (i = 0; i < band_sizes[g]; i++) { band->energy += coefs[start+i] * coefs[start+i]; form_factor += sqrtf(fabs(coefs[start+i])); } Temp = band->energy > 0 ? sqrtf((float)band_sizes[g] / band->energy) : 0; band->thr = band->energy * 0.001258925f; band->nz_lines = form_factor * sqrtf(Temp); start += band_sizes[g]; } } }
24,577
qemu
c2b38b277a7882a592f4f2ec955084b2b756daaa
0
void aio_bh_schedule_oneshot(AioContext *ctx, QEMUBHFunc *cb, void *opaque) { QEMUBH *bh; bh = g_new(QEMUBH, 1); *bh = (QEMUBH){ .ctx = ctx, .cb = cb, .opaque = opaque, }; qemu_lockcnt_lock(&ctx->list_lock); bh->next = ctx->first_bh; bh->scheduled = 1; bh->deleted = 1; /* Make sure that the members are ready before putting bh into list */ smp_wmb(); ctx->first_bh = bh; qemu_lockcnt_unlock(&ctx->list_lock); aio_notify(ctx); }
24,578
qemu
51b19ebe4320f3dcd93cea71235c1219318ddfd2
0
static int32_t virtio_net_flush_tx(VirtIONetQueue *q) { VirtIONet *n = q->n; VirtIODevice *vdev = VIRTIO_DEVICE(n); VirtQueueElement elem; int32_t num_packets = 0; int queue_index = vq2q(virtio_get_queue_index(q->tx_vq)); if (!(vdev->status & VIRTIO_CONFIG_S_DRIVER_OK)) { return num_packets; } if (q->async_tx.elem.out_num) { virtio_queue_set_notification(q->tx_vq, 0); return num_packets; } while (virtqueue_pop(q->tx_vq, &elem)) { ssize_t ret; unsigned int out_num = elem.out_num; struct iovec *out_sg = &elem.out_sg[0]; struct iovec sg[VIRTQUEUE_MAX_SIZE], sg2[VIRTQUEUE_MAX_SIZE + 1]; struct virtio_net_hdr_mrg_rxbuf mhdr; if (out_num < 1) { error_report("virtio-net header not in first element"); exit(1); } if (n->has_vnet_hdr) { if (iov_to_buf(out_sg, out_num, 0, &mhdr, n->guest_hdr_len) < n->guest_hdr_len) { error_report("virtio-net header incorrect"); exit(1); } if (virtio_needs_swap(vdev)) { virtio_net_hdr_swap(vdev, (void *) &mhdr); sg2[0].iov_base = &mhdr; sg2[0].iov_len = n->guest_hdr_len; out_num = iov_copy(&sg2[1], ARRAY_SIZE(sg2) - 1, out_sg, out_num, n->guest_hdr_len, -1); if (out_num == VIRTQUEUE_MAX_SIZE) { goto drop; } out_num += 1; out_sg = sg2; } } /* * If host wants to see the guest header as is, we can * pass it on unchanged. Otherwise, copy just the parts * that host is interested in. */ assert(n->host_hdr_len <= n->guest_hdr_len); if (n->host_hdr_len != n->guest_hdr_len) { unsigned sg_num = iov_copy(sg, ARRAY_SIZE(sg), out_sg, out_num, 0, n->host_hdr_len); sg_num += iov_copy(sg + sg_num, ARRAY_SIZE(sg) - sg_num, out_sg, out_num, n->guest_hdr_len, -1); out_num = sg_num; out_sg = sg; } ret = qemu_sendv_packet_async(qemu_get_subqueue(n->nic, queue_index), out_sg, out_num, virtio_net_tx_complete); if (ret == 0) { virtio_queue_set_notification(q->tx_vq, 0); q->async_tx.elem = elem; return -EBUSY; } drop: virtqueue_push(q->tx_vq, &elem, 0); virtio_notify(vdev, q->tx_vq); if (++num_packets >= n->tx_burst) { break; } } return num_packets; }
24,579
qemu
8be487d8f184f2f721cabeac559fb7a6cba18c95
1
static void sdhci_data_transfer(void *opaque) { SDHCIState *s = (SDHCIState *)opaque; if (s->trnmod & SDHC_TRNS_DMA) { switch (SDHC_DMA_TYPE(s->hostctl)) { case SDHC_CTRL_SDMA: if ((s->blkcnt == 1) || !(s->trnmod & SDHC_TRNS_MULTI)) { sdhci_sdma_transfer_single_block(s); } else { sdhci_sdma_transfer_multi_blocks(s); } break; case SDHC_CTRL_ADMA1_32: if (!(s->capareg & SDHC_CAN_DO_ADMA1)) { ERRPRINT("ADMA1 not supported\n"); break; } sdhci_do_adma(s); break; case SDHC_CTRL_ADMA2_32: if (!(s->capareg & SDHC_CAN_DO_ADMA2)) { ERRPRINT("ADMA2 not supported\n"); break; } sdhci_do_adma(s); break; case SDHC_CTRL_ADMA2_64: if (!(s->capareg & SDHC_CAN_DO_ADMA2) || !(s->capareg & SDHC_64_BIT_BUS_SUPPORT)) { ERRPRINT("64 bit ADMA not supported\n"); break; } sdhci_do_adma(s); break; default: ERRPRINT("Unsupported DMA type\n"); break; } } else { if ((s->trnmod & SDHC_TRNS_READ) && sdbus_data_ready(&s->sdbus)) { s->prnsts |= SDHC_DOING_READ | SDHC_DATA_INHIBIT | SDHC_DAT_LINE_ACTIVE; sdhci_read_block_from_card(s); } else { s->prnsts |= SDHC_DOING_WRITE | SDHC_DAT_LINE_ACTIVE | SDHC_SPACE_AVAILABLE | SDHC_DATA_INHIBIT; sdhci_write_block_to_card(s); } } }
24,580
qemu
2637c754ccdb286890ed2a8d0d1da775dbd062af
0
void cpu_dump_state(CPUState *env, FILE *f, int (*cpu_fprintf)(FILE *f, const char *fmt, ...), int flags) { int eflags, i, nb; char cc_op_name[32]; static const char *seg_name[6] = { "ES", "CS", "SS", "DS", "FS", "GS" }; if (kvm_enabled()) kvm_arch_get_registers(env); eflags = env->eflags; #ifdef TARGET_X86_64 if (env->hflags & HF_CS64_MASK) { cpu_fprintf(f, "RAX=%016" PRIx64 " RBX=%016" PRIx64 " RCX=%016" PRIx64 " RDX=%016" PRIx64 "\n" "RSI=%016" PRIx64 " RDI=%016" PRIx64 " RBP=%016" PRIx64 " RSP=%016" PRIx64 "\n" "R8 =%016" PRIx64 " R9 =%016" PRIx64 " R10=%016" PRIx64 " R11=%016" PRIx64 "\n" "R12=%016" PRIx64 " R13=%016" PRIx64 " R14=%016" PRIx64 " R15=%016" PRIx64 "\n" "RIP=%016" PRIx64 " RFL=%08x [%c%c%c%c%c%c%c] CPL=%d II=%d A20=%d SMM=%d HLT=%d\n", env->regs[R_EAX], env->regs[R_EBX], env->regs[R_ECX], env->regs[R_EDX], env->regs[R_ESI], env->regs[R_EDI], env->regs[R_EBP], env->regs[R_ESP], env->regs[8], env->regs[9], env->regs[10], env->regs[11], env->regs[12], env->regs[13], env->regs[14], env->regs[15], env->eip, eflags, eflags & DF_MASK ? 'D' : '-', eflags & CC_O ? 'O' : '-', eflags & CC_S ? 'S' : '-', eflags & CC_Z ? 'Z' : '-', eflags & CC_A ? 'A' : '-', eflags & CC_P ? 'P' : '-', eflags & CC_C ? 'C' : '-', env->hflags & HF_CPL_MASK, (env->hflags >> HF_INHIBIT_IRQ_SHIFT) & 1, (int)(env->a20_mask >> 20) & 1, (env->hflags >> HF_SMM_SHIFT) & 1, env->halted); } else #endif { cpu_fprintf(f, "EAX=%08x EBX=%08x ECX=%08x EDX=%08x\n" "ESI=%08x EDI=%08x EBP=%08x ESP=%08x\n" "EIP=%08x EFL=%08x [%c%c%c%c%c%c%c] CPL=%d II=%d A20=%d SMM=%d HLT=%d\n", (uint32_t)env->regs[R_EAX], (uint32_t)env->regs[R_EBX], (uint32_t)env->regs[R_ECX], (uint32_t)env->regs[R_EDX], (uint32_t)env->regs[R_ESI], (uint32_t)env->regs[R_EDI], (uint32_t)env->regs[R_EBP], (uint32_t)env->regs[R_ESP], (uint32_t)env->eip, eflags, eflags & DF_MASK ? 'D' : '-', eflags & CC_O ? 'O' : '-', eflags & CC_S ? 'S' : '-', eflags & CC_Z ? 'Z' : '-', eflags & CC_A ? 'A' : '-', eflags & CC_P ? 'P' : '-', eflags & CC_C ? 'C' : '-', env->hflags & HF_CPL_MASK, (env->hflags >> HF_INHIBIT_IRQ_SHIFT) & 1, (int)(env->a20_mask >> 20) & 1, (env->hflags >> HF_SMM_SHIFT) & 1, env->halted); } for(i = 0; i < 6; i++) { cpu_x86_dump_seg_cache(env, f, cpu_fprintf, seg_name[i], &env->segs[i]); } cpu_x86_dump_seg_cache(env, f, cpu_fprintf, "LDT", &env->ldt); cpu_x86_dump_seg_cache(env, f, cpu_fprintf, "TR", &env->tr); #ifdef TARGET_X86_64 if (env->hflags & HF_LMA_MASK) { cpu_fprintf(f, "GDT= %016" PRIx64 " %08x\n", env->gdt.base, env->gdt.limit); cpu_fprintf(f, "IDT= %016" PRIx64 " %08x\n", env->idt.base, env->idt.limit); cpu_fprintf(f, "CR0=%08x CR2=%016" PRIx64 " CR3=%016" PRIx64 " CR4=%08x\n", (uint32_t)env->cr[0], env->cr[2], env->cr[3], (uint32_t)env->cr[4]); for(i = 0; i < 4; i++) cpu_fprintf(f, "DR%d=%016" PRIx64 " ", i, env->dr[i]); cpu_fprintf(f, "\nDR6=%016" PRIx64 " DR7=%016" PRIx64 "\n", env->dr[6], env->dr[7]); } else #endif { cpu_fprintf(f, "GDT= %08x %08x\n", (uint32_t)env->gdt.base, env->gdt.limit); cpu_fprintf(f, "IDT= %08x %08x\n", (uint32_t)env->idt.base, env->idt.limit); cpu_fprintf(f, "CR0=%08x CR2=%08x CR3=%08x CR4=%08x\n", (uint32_t)env->cr[0], (uint32_t)env->cr[2], (uint32_t)env->cr[3], (uint32_t)env->cr[4]); for(i = 0; i < 4; i++) cpu_fprintf(f, "DR%d=%08x ", i, env->dr[i]); cpu_fprintf(f, "\nDR6=%08x DR7=%08x\n", env->dr[6], env->dr[7]); } if (flags & X86_DUMP_CCOP) { if ((unsigned)env->cc_op < CC_OP_NB) snprintf(cc_op_name, sizeof(cc_op_name), "%s", cc_op_str[env->cc_op]); else snprintf(cc_op_name, sizeof(cc_op_name), "[%d]", env->cc_op); #ifdef TARGET_X86_64 if (env->hflags & HF_CS64_MASK) { cpu_fprintf(f, "CCS=%016" PRIx64 " CCD=%016" PRIx64 " CCO=%-8s\n", env->cc_src, env->cc_dst, cc_op_name); } else #endif { cpu_fprintf(f, "CCS=%08x CCD=%08x CCO=%-8s\n", (uint32_t)env->cc_src, (uint32_t)env->cc_dst, cc_op_name); } } if (flags & X86_DUMP_FPU) { int fptag; fptag = 0; for(i = 0; i < 8; i++) { fptag |= ((!env->fptags[i]) << i); } cpu_fprintf(f, "FCW=%04x FSW=%04x [ST=%d] FTW=%02x MXCSR=%08x\n", env->fpuc, (env->fpus & ~0x3800) | (env->fpstt & 0x7) << 11, env->fpstt, fptag, env->mxcsr); for(i=0;i<8;i++) { #if defined(USE_X86LDOUBLE) union { long double d; struct { uint64_t lower; uint16_t upper; } l; } tmp; tmp.d = env->fpregs[i].d; cpu_fprintf(f, "FPR%d=%016" PRIx64 " %04x", i, tmp.l.lower, tmp.l.upper); #else cpu_fprintf(f, "FPR%d=%016" PRIx64, i, env->fpregs[i].mmx.q); #endif if ((i & 1) == 1) cpu_fprintf(f, "\n"); else cpu_fprintf(f, " "); } if (env->hflags & HF_CS64_MASK) nb = 16; else nb = 8; for(i=0;i<nb;i++) { cpu_fprintf(f, "XMM%02d=%08x%08x%08x%08x", i, env->xmm_regs[i].XMM_L(3), env->xmm_regs[i].XMM_L(2), env->xmm_regs[i].XMM_L(1), env->xmm_regs[i].XMM_L(0)); if ((i & 1) == 1) cpu_fprintf(f, "\n"); else cpu_fprintf(f, " "); } } }
24,581
qemu
9012a53f067a78022947e18050b145c34a3dc599
0
static void rtas_start_cpu(PowerPCCPU *cpu_, sPAPRMachineState *spapr, uint32_t token, uint32_t nargs, target_ulong args, uint32_t nret, target_ulong rets) { target_ulong id, start, r3; PowerPCCPU *cpu; if (nargs != 3 || nret != 1) { rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR); return; } id = rtas_ld(args, 0); start = rtas_ld(args, 1); r3 = rtas_ld(args, 2); cpu = spapr_find_cpu(id); if (cpu != NULL) { CPUState *cs = CPU(cpu); CPUPPCState *env = &cpu->env; PowerPCCPUClass *pcc = POWERPC_CPU_GET_CLASS(cpu); Error *local_err = NULL; if (!cs->halted) { rtas_st(rets, 0, RTAS_OUT_HW_ERROR); return; } /* This will make sure qemu state is up to date with kvm, and * mark it dirty so our changes get flushed back before the * new cpu enters */ kvm_cpu_synchronize_state(cs); /* Set compatibility mode to match existing cpus */ ppc_set_compat(cpu, POWERPC_CPU(first_cpu)->compat_pvr, &local_err); if (local_err) { error_report_err(local_err); rtas_st(rets, 0, RTAS_OUT_HW_ERROR); return; } env->msr = (1ULL << MSR_SF) | (1ULL << MSR_ME); /* Enable Power-saving mode Exit Cause exceptions for the new CPU */ env->spr[SPR_LPCR] |= pcc->lpcr_pm; env->nip = start; env->gpr[3] = r3; cs->halted = 0; spapr_cpu_set_endianness(cpu); spapr_cpu_update_tb_offset(cpu); qemu_cpu_kick(cs); rtas_st(rets, 0, RTAS_OUT_SUCCESS); return; } /* Didn't find a matching cpu */ rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR); }
24,582
qemu
ad196a9d0c14f681f010bb4b979030ec125ba976
0
void net_slirp_redir(Monitor *mon, const char *redir_str, const char *redir_opt2) { struct slirp_config_str *config; if (!slirp_inited) { if (mon) { monitor_printf(mon, "user mode network stack not in use\n"); } else { config = qemu_malloc(sizeof(*config)); config->str = redir_str; config->next = slirp_redirs; slirp_redirs = config; } return; } if (!strcmp(redir_str, "remove")) { net_slirp_redir_rm(mon, redir_opt2); return; } slirp_redirection(mon, redir_str); }
24,583
qemu
a6152b52bc50c5cf1cd118a74b483dd3f0748ebd
0
int ppc_hash64_handle_mmu_fault(PowerPCCPU *cpu, vaddr eaddr, int rwx, int mmu_idx) { CPUState *cs = CPU(cpu); CPUPPCState *env = &cpu->env; ppc_slb_t *slb; unsigned apshift; hwaddr ptex; ppc_hash_pte64_t pte; int pp_prot, amr_prot, prot; uint64_t new_pte1, dsisr; const int need_prot[] = {PAGE_READ, PAGE_WRITE, PAGE_EXEC}; hwaddr raddr; assert((rwx == 0) || (rwx == 1) || (rwx == 2)); /* Note on LPCR usage: 970 uses HID4, but our special variant * of store_spr copies relevant fields into env->spr[SPR_LPCR]. * Similarily we filter unimplemented bits when storing into * LPCR depending on the MMU version. This code can thus just * use the LPCR "as-is". */ /* 1. Handle real mode accesses */ if (((rwx == 2) && (msr_ir == 0)) || ((rwx != 2) && (msr_dr == 0))) { /* Translation is supposedly "off" */ /* In real mode the top 4 effective address bits are (mostly) ignored */ raddr = eaddr & 0x0FFFFFFFFFFFFFFFULL; /* In HV mode, add HRMOR if top EA bit is clear */ if (msr_hv || !env->has_hv_mode) { if (!(eaddr >> 63)) { raddr |= env->spr[SPR_HRMOR]; } } else { /* Otherwise, check VPM for RMA vs VRMA */ if (env->spr[SPR_LPCR] & LPCR_VPM0) { slb = &env->vrma_slb; if (slb->sps) { goto skip_slb_search; } /* Not much else to do here */ cs->exception_index = POWERPC_EXCP_MCHECK; env->error_code = 0; return 1; } else if (raddr < env->rmls) { /* RMA. Check bounds in RMLS */ raddr |= env->spr[SPR_RMOR]; } else { /* The access failed, generate the approriate interrupt */ if (rwx == 2) { ppc_hash64_set_isi(cs, env, 0x08000000); } else { dsisr = 0x08000000; if (rwx == 1) { dsisr |= 0x02000000; } ppc_hash64_set_dsi(cs, env, eaddr, dsisr); } return 1; } } tlb_set_page(cs, eaddr & TARGET_PAGE_MASK, raddr & TARGET_PAGE_MASK, PAGE_READ | PAGE_WRITE | PAGE_EXEC, mmu_idx, TARGET_PAGE_SIZE); return 0; } /* 2. Translation is on, so look up the SLB */ slb = slb_lookup(cpu, eaddr); if (!slb) { /* No entry found, check if in-memory segment tables are in use */ if ((env->mmu_model & POWERPC_MMU_V3) && ppc64_use_proc_tbl(cpu)) { /* TODO - Unsupported */ error_report("Segment Table Support Unimplemented"); exit(1); } /* Segment still not found, generate the appropriate interrupt */ if (rwx == 2) { cs->exception_index = POWERPC_EXCP_ISEG; env->error_code = 0; } else { cs->exception_index = POWERPC_EXCP_DSEG; env->error_code = 0; env->spr[SPR_DAR] = eaddr; } return 1; } skip_slb_search: /* 3. Check for segment level no-execute violation */ if ((rwx == 2) && (slb->vsid & SLB_VSID_N)) { ppc_hash64_set_isi(cs, env, 0x10000000); return 1; } /* 4. Locate the PTE in the hash table */ ptex = ppc_hash64_htab_lookup(cpu, slb, eaddr, &pte, &apshift); if (ptex == -1) { dsisr = 0x40000000; if (rwx == 2) { ppc_hash64_set_isi(cs, env, dsisr); } else { if (rwx == 1) { dsisr |= 0x02000000; } ppc_hash64_set_dsi(cs, env, eaddr, dsisr); } return 1; } qemu_log_mask(CPU_LOG_MMU, "found PTE at index %08" HWADDR_PRIx "\n", ptex); /* 5. Check access permissions */ pp_prot = ppc_hash64_pte_prot(cpu, slb, pte); amr_prot = ppc_hash64_amr_prot(cpu, pte); prot = pp_prot & amr_prot; if ((need_prot[rwx] & ~prot) != 0) { /* Access right violation */ qemu_log_mask(CPU_LOG_MMU, "PTE access rejected\n"); if (rwx == 2) { ppc_hash64_set_isi(cs, env, 0x08000000); } else { dsisr = 0; if (need_prot[rwx] & ~pp_prot) { dsisr |= 0x08000000; } if (rwx == 1) { dsisr |= 0x02000000; } if (need_prot[rwx] & ~amr_prot) { dsisr |= 0x00200000; } ppc_hash64_set_dsi(cs, env, eaddr, dsisr); } return 1; } qemu_log_mask(CPU_LOG_MMU, "PTE access granted !\n"); /* 6. Update PTE referenced and changed bits if necessary */ new_pte1 = pte.pte1 | HPTE64_R_R; /* set referenced bit */ if (rwx == 1) { new_pte1 |= HPTE64_R_C; /* set changed (dirty) bit */ } else { /* Treat the page as read-only for now, so that a later write * will pass through this function again to set the C bit */ prot &= ~PAGE_WRITE; } if (new_pte1 != pte.pte1) { ppc_hash64_store_hpte(cpu, ptex, pte.pte0, new_pte1); } /* 7. Determine the real address from the PTE */ raddr = deposit64(pte.pte1 & HPTE64_R_RPN, 0, apshift, eaddr); tlb_set_page(cs, eaddr & TARGET_PAGE_MASK, raddr & TARGET_PAGE_MASK, prot, mmu_idx, 1ULL << apshift); return 0; }
24,584
qemu
196a778428989217b82de042725dc8eb29c8f8d8
1
static void qxl_reset_surfaces(PCIQXLDevice *d) { dprint(d, 1, "%s:\n", __FUNCTION__); d->mode = QXL_MODE_UNDEFINED; qemu_mutex_unlock_iothread(); d->ssd.worker->destroy_surfaces(d->ssd.worker); qemu_mutex_lock_iothread(); memset(&d->guest_surfaces.cmds, 0, sizeof(d->guest_surfaces.cmds)); }
24,585