<s>
The	O
Zilog	B-Device
Z8	I-Device
is	O
a	O
microcontroller	B-Architecture
architecture	O
,	O
originally	O
introduced	O
in	O
1979	O
,	O
which	O
today	O
also	O
includes	O
the	O
Z8	O
Encore	O
!,	O
eZ8	O
Encore	O
!,	O
eZ8	O
Encore	O
!	O
</s>
<s>
Signifying	O
features	O
of	O
the	O
architecture	O
are	O
up	O
to	O
4,096	O
fast	O
on-chip	O
registers	O
which	O
may	O
be	O
used	O
as	O
accumulators	O
,	O
pointers	O
,	O
or	O
as	O
ordinary	O
random-access	B-Architecture
memory	I-Architecture
(	O
RAM	B-Architecture
)	O
.	O
</s>
<s>
A	O
16-bit	B-Device
address	O
space	O
for	O
between	O
1kibibyte	O
(	O
KB	O
)	O
and	O
64KB	O
of	O
either	O
programmable	B-General_Concept
read-only	I-General_Concept
memory	I-General_Concept
(	O
PROM	O
,	O
OTP	O
)	O
,	O
read-only	B-Device
memory	I-Device
(	O
ROM	B-Device
)	O
,	O
or	O
flash	B-Device
memory	I-Device
,	O
are	O
used	O
to	O
store	O
code	O
and	O
constants	O
,	O
and	O
there	O
is	O
a	O
second	O
16-bit	B-Device
address	O
space	O
which	O
can	O
be	O
used	O
for	O
large	O
applications	O
.	O
</s>
<s>
On	O
chip	O
peripherals	O
include	O
analog-to-digital	O
converter	O
(	O
A/D	O
)	O
,	O
Serial	B-Architecture
Peripheral	I-Architecture
Interface	I-Architecture
(	O
SPI	O
)	O
bus	O
and	O
Inter-Integrated	O
Circuit	O
(	O
I²C	O
)	O
channels	O
,	O
IrDA	O
encoders/decoders	O
etc	O
.	O
</s>
<s>
There	O
are	O
versions	O
with	O
from	O
8	O
up	O
to	O
80	O
pins	O
,	O
housed	O
in	O
dual	B-Algorithm
in-line	I-Algorithm
package	I-Algorithm
(	O
PDIP	B-Algorithm
)	O
,	O
Quad	B-Algorithm
Flat	I-Algorithm
No-leads	I-Algorithm
package	I-Algorithm
(	O
MicroLeadFrame	B-Algorithm
,	O
MLF	O
)	O
,	O
small	B-Algorithm
outline	I-Algorithm
integrated	I-Algorithm
circuit	I-Algorithm
(	O
SOIC	O
)	O
,	O
Shrink	B-Algorithm
Small-Outline	I-Algorithm
Package	I-Algorithm
(	O
SSOP	O
)	O
,	O
and	O
low	O
profile	O
Quad	B-Algorithm
Flat	I-Algorithm
Package	I-Algorithm
(	O
LQFP	O
)	O
.	O
</s>
<s>
series	O
can	O
be	O
programmed	O
and	O
debugged	O
through	O
a	O
single	O
pin	O
serial	B-Protocol
communication	I-Protocol
interface	O
.	O
</s>
<s>
The	O
basic	O
architecture	O
,	O
a	O
modified	O
(	O
non-strict	O
)	O
Harvard	B-Architecture
architecture	I-Architecture
,	O
is	O
technically	O
very	O
different	O
from	O
the	O
Zilog	B-General_Concept
Z80	I-General_Concept
.	O
</s>
<s>
Despite	O
this	O
,	O
the	O
instruction	B-General_Concept
set	I-General_Concept
and	O
assembly	B-Language
language	I-Language
syntax	B-Application
are	O
quite	O
similar	O
to	O
other	O
Zilog	O
processors	O
:	O
Load/store	O
operations	O
use	O
the	O
same	O
LD	O
mnemonic	O
(	O
no	O
MOV	O
or	O
MOVEs	O
)	O
,	O
typifying	O
instructions	O
such	O
as	O
DJNZ	O
,	O
are	O
the	O
same	O
,	O
and	O
so	O
on	O
.	O
</s>
<s>
An	O
integrated	B-Application
development	I-Application
environment	I-Application
(	O
IDE	O
)	O
named	O
Zilog	O
Developer	O
's	O
Studio	O
(	O
ZDS	O
)	O
can	O
be	O
downloaded	O
from	O
Zilog	O
's	O
website	O
including	O
an	O
assembler	B-Language
.	O
</s>
<s>
The	O
edition	O
of	O
ZDS	O
II	O
targeting	O
Z8	B-Device
Encore	I-Device
!	I-Device
</s>
<s>
Primary	O
competitors	O
include	O
the	O
somewhat	O
similar	O
Microchip	O
Technology	O
PIC	B-Architecture
family	O
,	O
and	O
all	O
Intel	B-Architecture
8051	I-Architecture
descendants	O
.	O
</s>
<s>
Also	O
more	O
traditional	O
von	B-Architecture
Neumann	I-Architecture
architecture	I-Architecture
based	O
single	B-Architecture
chip	I-Architecture
microcontrollers	I-Architecture
may	O
be	O
regarded	O
as	O
competitors	O
,	O
such	O
as	O
the	O
Motorola	B-Device
6800	I-Device
,	O
6809	B-Device
based	O
Motorola	B-Device
68HC11	I-Device
,	O
the	O
Hitachi	B-Device
H8	I-Device
family	O
,	O
and	O
Z80-derivatives	O
,	O
such	O
as	O
Toshiba	O
TLCS-870	O
,	O
to	O
name	O
only	O
a	O
few	O
.	O
</s>
<s>
JTCEMU	O
is	O
a	O
free	O
software	O
(	O
GNU	B-License
General	I-License
Public	I-License
License	I-License
(	O
GPL	B-License
)	O
version	O
3	O
)	O
Z8	O
emulator	O
written	O
in	O
Java	B-Language
for	O
Linux	B-Application
,	O
Windows	O
,	O
and	O
macOS	B-Application
.	O
</s>
