<s>
A	O
zero	B-Architecture
register	I-Architecture
is	O
a	O
processor	B-General_Concept
register	I-General_Concept
that	O
always	O
returns	O
the	O
value	O
zero	O
.	O
</s>
<s>
It	O
is	O
found	O
primarily	O
in	O
high-performance	O
instruction	B-General_Concept
set	I-General_Concept
architectures	I-General_Concept
,	O
notably	O
the	O
CDC	B-Device
6600	I-Device
,	O
System/360	B-Application
and	O
MIPS	B-Device
architecture	I-Device
,	O
among	O
others	O
.	O
</s>
<s>
Some	O
architectures	O
accomplish	O
this	O
with	O
dedicated	O
opcodes	B-Language
,	O
specialized	O
variations	O
of	O
their	O
basic	O
instructions	O
.	O
</s>
<s>
The	O
zero	B-Architecture
register	I-Architecture
can	O
accomplish	O
the	O
same	O
effect	O
without	O
requiring	O
new	O
opcodes	B-Language
,	O
although	O
at	O
the	O
cost	O
of	O
dedicating	O
a	O
register	O
to	O
this	O
feature	O
,	O
which	O
can	O
be	O
expensive	O
in	O
circuitry	O
terms	O
.	O
</s>
