<s>
Microsoft	O
XCPU	B-Device
,	O
codenamed	O
Xenon	B-Operating_System
,	O
is	O
a	O
CPU	B-General_Concept
used	O
in	O
the	B-Operating_System
Xbox	I-Operating_System
360	I-Operating_System
game	O
console	O
,	O
to	O
be	O
used	O
with	O
ATI	O
's	O
Xenos	B-Device
graphics	O
chip	O
.	O
</s>
<s>
The	O
processor	O
was	O
developed	O
by	O
Microsoft	O
and	O
IBM	O
under	O
the	O
IBM	O
chip	O
program	O
codenamed	O
"	O
Waternoose	B-Device
"	O
,	O
which	O
was	O
named	O
after	O
the	O
Monsters	B-Application
,	I-Application
Inc	I-Application
.	I-Application
character	O
Henry	O
J	O
.	O
Waternoose	B-Device
III	O
.	O
</s>
<s>
The	O
processor	O
is	O
based	O
on	O
IBM	B-Architecture
PowerPC	I-Architecture
instruction	B-General_Concept
set	I-General_Concept
architecture	I-General_Concept
.	O
</s>
<s>
It	O
consists	O
of	O
three	O
independent	O
processor	B-Architecture
cores	I-Architecture
on	O
a	O
single	O
die	O
.	O
</s>
<s>
These	O
cores	O
are	O
slightly	O
modified	O
versions	O
of	O
the	O
PPE	O
in	O
the	O
Cell	B-General_Concept
processor	I-General_Concept
used	O
on	O
the	O
PlayStation	B-Operating_System
3	I-Operating_System
.	O
</s>
<s>
Each	O
core	O
has	O
two	O
symmetric	O
hardware	O
threads	O
(	O
SMT	B-Operating_System
)	O
,	O
for	O
a	O
total	O
of	O
six	O
hardware	O
threads	O
available	O
to	O
games	O
.	O
</s>
<s>
Each	O
individual	O
core	O
also	O
includes	O
32	O
KB	O
of	O
L1	B-General_Concept
instruction	I-General_Concept
cache	I-General_Concept
and	O
32	O
KB	O
of	O
L1	O
data	B-General_Concept
cache	I-General_Concept
.	O
</s>
<s>
The	O
XCPU	B-Device
processors	O
were	O
manufactured	O
at	O
IBM	O
's	O
East	O
Fishkill	O
,	O
New	O
York	O
fabrication	O
plant	O
and	O
Chartered	O
Semiconductor	O
Manufacturing	O
(	O
now	O
part	O
of	O
GlobalFoundries	O
)	O
in	O
Singapore	O
.	O
</s>
<s>
Chartered	O
reduced	O
the	O
fabrication	O
process	O
in	O
2007	O
to	O
65	B-Algorithm
nm	I-Algorithm
from	O
90	O
nm	O
,	O
thus	O
reducing	O
manufacturing	O
costs	O
for	O
Microsoft	O
.	O
</s>
<s>
21.6	O
GB/s	O
front-side	B-Architecture
bus	I-Architecture
(	O
On	O
the	O
CPU	B-General_Concept
side	O
,	O
this	O
interfaces	O
to	O
a	O
1.35GHz	O
,	O
8B	O
wide	O
,	O
FSB	O
dataflow	O
;	O
on	O
the	O
GPU	O
side	O
,	O
it	O
connects	O
to	O
a	O
16B	O
wide	O
FSB	O
dataflow	O
running	O
at	O
675MHz	O
.	O
)	O
</s>
<s>
The	B-Operating_System
Xbox	I-Operating_System
360	I-Operating_System
S	O
introduced	O
the	O
XCGPU	O
,	O
which	O
integrated	O
the	O
Xenon	B-Device
CPU	I-Device
and	O
the	O
Xenos	B-Device
GPU	I-Device
onto	O
the	O
same	O
die	O
,	O
and	O
the	O
eDRAM	O
into	O
the	O
same	O
package	O
.	O
</s>
<s>
The	O
XCGPU	O
follows	O
the	O
trend	O
started	O
with	O
the	O
integrated	O
EE+GS	O
in	O
PlayStation	O
2	O
Slimline	O
,	O
combining	O
CPU	B-General_Concept
,	O
GPU	O
,	O
memory	O
controllers	O
and	O
IO	O
in	O
a	O
single	O
cost-reduced	O
chip	O
.	O
</s>
<s>
It	O
also	O
contains	O
a	O
"	O
front	B-Architecture
side	I-Architecture
bus	I-Architecture
replacement	O
block	O
"	O
that	O
connects	O
the	O
CPU	B-General_Concept
and	O
GPU	O
internally	O
in	O
exactly	O
the	O
same	O
manner	O
as	O
the	O
front	B-Architecture
side	I-Architecture
bus	I-Architecture
would	O
have	O
done	O
when	O
the	O
CPU	B-General_Concept
and	O
GPU	O
were	O
separate	O
chips	O
,	O
so	O
that	O
the	O
XCGPU	O
does	O
n't	O
change	O
the	O
hardware	O
characteristics	O
of	O
the	B-Operating_System
Xbox	I-Operating_System
360	I-Operating_System
.	O
</s>
<s>
XCGPU	O
contains	O
372	O
million	O
transistors	B-Application
and	O
is	O
manufactured	O
by	O
GlobalFoundries	O
on	O
a	O
45nm	B-Algorithm
process	O
.	O
</s>
<s>
Compared	O
to	O
the	O
original	O
chipset	B-Device
in	O
the	B-Operating_System
Xbox	I-Operating_System
360	I-Operating_System
the	O
combined	O
power	O
requirements	O
are	O
reduced	O
by	O
60%	O
and	O
the	O
physical	O
chip	O
area	O
by	O
50%	O
.	O
</s>
<s>
Illustrations	O
of	O
the	O
different	O
generations	O
of	O
processors	O
in	O
Xbox	B-Operating_System
360	I-Operating_System
and	O
Xbox	B-Operating_System
360	I-Operating_System
S	O
.	O
</s>
