<s>
The	O
x86	B-Device
instruction	I-Device
set	I-Device
refers	O
to	O
the	O
set	O
of	O
instructions	O
that	O
x86-compatible	O
microprocessors	B-Architecture
support	O
.	O
</s>
<s>
The	O
instructions	O
are	O
usually	O
part	O
of	O
an	O
executable	B-Application
program	I-Application
,	O
often	O
stored	O
as	O
a	O
computer	B-Operating_System
file	I-Operating_System
and	O
executed	O
on	O
the	O
processor	O
.	O
</s>
<s>
The	O
x86	B-Device
instruction	I-Device
set	I-Device
has	O
been	O
extended	O
several	O
times	O
,	O
introducing	O
wider	O
registers	B-General_Concept
and	O
datatypes	O
as	O
well	O
as	O
new	O
functionality	O
.	O
</s>
<s>
Below	O
is	O
the	O
full	O
8086/8088	O
instruction	B-General_Concept
set	I-General_Concept
of	O
Intel	O
(	O
81	O
instructions	O
total	O
)	O
.	O
</s>
<s>
Most	O
if	O
not	O
all	O
of	O
these	O
instructions	O
are	O
available	O
in	O
32-bit	O
mode	O
;	O
they	O
just	O
operate	O
on	O
32-bit	O
registers	B-General_Concept
(	O
eax	O
,	O
ebx	O
,	O
etc	O
.	O
)	O
</s>
<s>
The	O
updated	O
instruction	B-General_Concept
set	I-General_Concept
is	O
also	O
grouped	O
according	O
to	O
architecture	O
(	O
i386	B-General_Concept
,	O
i486	B-General_Concept
,	O
i686	B-Device
)	O
and	O
more	O
generally	O
is	O
referred	O
to	O
as	O
(	O
32-bit	O
)	O
x86	B-Operating_System
and	O
(	O
64-bit	O
)	O
x86-64	B-Device
(	O
also	O
known	O
as	O
AMD64	B-Device
)	O
.	O
</s>
<s>
+	O
Original	O
8086/8088	O
instruction	B-General_Concept
set	I-General_Concept
Instruction	O
Meaning	O
Notes	O
Opcode	B-Language
ASCII	O
adjust	O
AL	O
after	O
addition	O
used	O
with	O
unpacked	O
binary-coded	O
decimal	O
ASCII	O
adjust	O
AX	O
before	O
division	O
8086/8088	O
datasheet	O
documents	O
only	O
base	O
10	O
version	O
of	O
the	O
AAD	O
instruction	O
(	O
opcode	B-Language
)	O
,	O
but	O
any	O
other	O
base	O
will	O
work	O
.	O
</s>
<s>
NEC	B-Device
V20	I-Device
and	O
V30	O
(	O
and	O
possibly	O
other	O
NEC	B-Device
V-series	I-Device
CPUs	O
)	O
always	O
use	O
base	O
10	O
,	O
and	O
ignore	O
the	O
argument	O
,	O
causing	O
a	O
number	O
of	O
incompatibilities	O
ASCII	O
adjust	O
AX	O
after	O
multiplication	O
Only	O
base	O
10	O
version	O
(	O
Operand	O
is	O
0xA	O
)	O
is	O
documented	O
,	O
see	O
notes	O
for	O
AAD	O
ASCII	O
adjust	O
AL	O
after	O
subtraction	O
Add	O
with	O
carry	O
destination	O
=	O
destination	O
+	O
source	O
+	O
carry_flag	O
…,	O
…,	O
…	O
(	O
since	O
80186	B-Device
)	O
Add	O
(	O
1	O
)	O
r/m	O
+	O
=	O
r/imm	O
;	O
(	O
2	O
)	O
r	O
+	O
=	O
m/imm	O
;	O
…,	O
…,	O
…	O
(	O
since	O
80186	B-Device
)	O
Logical	O
AND	O
(	O
1	O
)	O
r/m	O
&	O
=	O
r/imm	O
;	O
(	O
2	O
)	O
r	O
&	O
=	O
m/imm	O
;	O
…,	O
…,	O
…	O
(	O
since	O
80186	B-Device
)	O
Call	O
procedure	O
,	O
,	O
,	O
Convert	O
byte	O
to	O
word	O
Clear	O
carry	B-Algorithm
flag	I-Algorithm
CF	O
=	O
0	O
;	O
Clear	B-Device
direction	I-Device
flag	I-Device
DF	O
=	O
0	O
;	O
Clear	O
interrupt	B-Device
flag	I-Device
IF	O
=	O
0	O
;	O
Complement	O
carry	B-Algorithm
flag	I-Algorithm
Compare	O
operands	O
…,	O
…,	O
…	O
(	O
since	O
80186	B-Device
)	O
Compare	O
bytes	O
in	O
memory	O
.	O
</s>
<s>
Convert	O
word	O
to	O
doubleword	O
Decimal	O
adjust	O
AL	O
after	O
addition	O
(	O
used	O
with	O
packed	O
binary-coded	O
decimal	O
)	O
Decimal	O
adjust	O
AL	O
after	O
subtraction	O
Decrement	O
by	O
1	O
…,	O
,	O
Unsigned	O
divide	O
(	O
1	O
)	O
AX	O
=	O
DX:AX	O
/	O
r/m	O
;	O
resulting	O
DX	O
=	O
remainder	O
(	O
2	O
)	O
AL	O
=	O
AX	O
/	O
r/m	O
;	O
resulting	O
AH	O
=	O
remainder	O
,	O
Used	O
with	O
floating-point	B-General_Concept
unit	I-General_Concept
..	O
</s>
<s>
Enter	O
halt	B-Language
state	O
Signed	O
divide	O
(	O
1	O
)	O
AX	O
=	O
DX:AX	O
/	O
r/m	O
;	O
resulting	O
DX	O
=	O
remainder	O
(	O
2	O
)	O
AL	O
=	O
AX	O
/	O
r/m	O
;	O
resulting	O
AH	O
=	O
remainder	O
,	O
Signed	O
multiply	O
in	O
One-operand	O
form	O
(	O
1	O
)	O
DX:AX	O
=	O
AX	O
*	O
r/m	O
;	O
(	O
2	O
)	O
AX	O
=	O
AL	O
*	O
r/m	O
,	O
(	O
both	O
since	O
80186	B-Device
)	O
,	O
,	O
,	O
(	O
since	O
80386	B-General_Concept
)	O
Input	O
from	O
port	O
(	O
1	O
)	O
AL	O
=	O
port[imm];	O
(	O
2	O
)	O
AL	O
=	O
port[DX];	O
(	O
3	O
)	O
AX	O
=	O
port[imm];	O
(	O
4	O
)	O
AX	O
=	O
port[DX];	O
,	O
,	O
,	O
Increment	O
by	O
1	O
…,	O
,	O
Call	O
to	O
interrupt	B-Application
,	O
Call	O
to	O
interrupt	B-Application
if	O
overflow	O
Return	O
from	O
interrupt	B-Application
Jump	B-General_Concept
if	I-General_Concept
condition	I-General_Concept
(	O
)	O
…,	O
…	O
(	O
since	O
80386	B-General_Concept
)	O
Jump	O
if	O
CX	O
is	O
zero	O
Jump	O
…,	O
,	O
Load	O
FLAGS	B-General_Concept
into	O
AH	O
register	O
Load	O
DS:r	O
with	O
far	O
pointer	O
Load	O
Effective	O
Address	O
Load	O
ES:r	O
with	O
far	O
pointer	O
Assert	O
BUS	O
LOCK#	O
signal	O
(	O
for	O
multiprocessing	O
)	O
Load	O
string	O
byte	O
.	O
</s>
<s>
Unsigned	O
multiply	O
(	O
1	O
)	O
DX:AX	O
=	O
AX	O
*	O
r/m	O
;	O
(	O
2	O
)	O
AX	O
=	O
AL	O
*	O
r/m	O
;	O
,	O
Two	O
's	O
complement	O
negation	O
…	O
No	B-Language
operation	I-Language
opcode	B-Language
equivalent	O
to	O
Negate	O
the	O
operand	O
,	O
logical	O
NOT	O
…	O
Logical	O
OR	O
(	O
1	O
)	O
(	O
2	O
)	O
…,	O
…,	O
…	O
(	O
since	O
80186	B-Device
)	O
Output	O
to	O
port	O
(	O
1	O
)	O
port[imm]	O
=	O
AL	O
;	O
(	O
2	O
)	O
port[DX]	O
=	O
AL	O
;	O
(	O
3	O
)	O
port[imm]	O
=	O
AX	O
;	O
(	O
4	O
)	O
port[DX]	O
=	O
AX	O
;	O
,	O
,	O
,	O
Pop	O
data	O
from	O
stack	B-Application
r/m	O
=	O
*	O
SP++	O
;	O
POP	O
CS	O
(	O
opcode	B-Language
)	O
works	O
only	O
on	O
8086/8088	O
.	O
</s>
<s>
,	O
(	O
8086/8088	O
only	O
)	O
,	O
,	O
,	O
…,	O
Pop	O
FLAGS	B-General_Concept
register	I-General_Concept
from	O
stack	B-Application
FLAGS	B-General_Concept
=	O
*	O
SP++	O
;	O
Push	O
data	O
onto	O
stack	B-Application
,	O
,	O
,	O
,	O
…,	O
,	O
(	O
both	O
since	O
80186	B-Device
)	O
,	O
Push	O
FLAGS	B-General_Concept
onto	O
stack	B-Application
Rotate	O
left	O
(	O
with	O
carry	O
)	O
…	O
(	O
since	O
80186	B-Device
)	O
,	O
…	O
Rotate	O
right	O
(	O
with	O
carry	O
)	O
…	O
(	O
since	O
80186	B-Device
)	O
,	O
…	O
Repeat	O
MOVS/STOS/CMPS/LODS/SCAS	O
(	O
)	O
,	O
Return	O
from	O
procedure	O
Not	O
a	O
real	O
instruction	O
.	O
</s>
<s>
Return	O
from	O
near	O
procedure	O
,	O
Return	O
from	O
far	O
procedure	O
,	O
Rotate	O
left	O
…	O
(	O
since	O
80186	B-Device
)	O
,	O
…	O
Rotate	O
right	O
…	O
(	O
since	O
80186	B-Device
)	O
,	O
…	O
Store	O
AH	O
into	O
FLAGS	B-General_Concept
Shift	O
Arithmetically	O
left	O
(	O
signed	O
shift	O
left	O
)	O
(	O
1	O
)	O
r/m	O
<<= 1; (2 )  r/m <<= CL;  … (since 80186 ) , …   Shift Arithmetically right (signed shift right )   (1 )  (signed )  r/m >>= 1; (2 )  (signed )  r/m >>	O
=	O
CL	O
;	O
…	O
(	O
since	O
80186	B-Device
)	O
,	O
…	O
Subtraction	O
with	O
borrow	O
alternative	O
1-byte	O
encoding	O
of	O
is	O
available	O
via	O
undocumented	O
SALC	O
instruction	O
…,	O
…,	O
…	O
(	O
since	O
80186	B-Device
)	O
Compare	O
byte	O
string	O
.	O
</s>
<s>
Shift	O
left	O
(	O
unsigned	O
shift	O
left	O
)	O
…	O
(	O
since	O
80186	B-Device
)	O
,	O
…	O
Shift	O
right	O
(	O
unsigned	O
shift	O
right	O
)	O
…	O
(	O
since	O
80186	B-Device
)	O
,	O
…	O
Set	O
carry	B-Algorithm
flag	I-Algorithm
CF	O
=	O
1	O
;	O
Set	B-Device
direction	I-Device
flag	I-Device
DF	O
=	O
1	O
;	O
Set	O
interrupt	B-Device
flag	I-Device
IF	O
=	O
1	O
;	O
Store	O
byte	O
in	O
string	O
.	O
</s>
<s>
Subtraction	O
(	O
1	O
)	O
r/m	O
-	O
=	O
r/imm	O
;	O
(	O
2	O
)	O
r	O
-	O
=	O
m/imm	O
;	O
…,	O
…,	O
…	O
(	O
since	O
80186	B-Device
)	O
Logical	O
compare	O
(	O
AND	O
)	O
(	O
1	O
)	O
r/m	O
&	O
r/imm	O
;	O
(	O
2	O
)	O
r	O
&	O
m/imm	O
;	O
,	O
,	O
,	O
,	O
,	O
Wait	O
until	O
not	O
busy	O
Waits	O
until	O
BUSY#	O
pin	O
is	O
inactive	O
(	O
used	O
with	O
floating-point	B-General_Concept
unit	I-General_Concept
)	O
Exchange	O
data	O
A	O
spinlock	B-Operating_System
typically	O
uses	O
xchg	O
as	O
an	O
atomic	B-General_Concept
operation	I-General_Concept
.	O
</s>
<s>
(	O
coma	B-Error_Name
bug	I-Error_Name
)	O
.	O
</s>
<s>
Instruction	O
Opcode	B-Language
Meaning	O
Notes	O
62	O
/r	O
Check	O
array	O
index	O
against	O
bounds	O
raises	O
software	O
interrupt	B-Application
5	O
if	O
test	B-Device
fails	O
C8	O
iw	O
ib	O
Enter	O
stack	B-Application
frame	O
Modifies	O
stack	B-Application
for	O
entry	O
to	O
procedure	O
for	O
high	O
level	O
language	O
.	O
</s>
<s>
Takes	O
two	O
operands	O
:	O
the	O
amount	O
of	O
storage	O
to	O
be	O
allocated	O
on	O
the	O
stack	B-Application
and	O
the	O
nesting	O
level	O
of	O
the	O
procedure	O
.	O
</s>
<s>
;	O
adjust	O
DI	O
according	O
to	O
operand	O
size	O
and	O
DF	O
6D	O
C9	O
Leave	O
stack	B-Application
frame	O
Releases	O
the	O
local	O
stack	B-Application
storage	O
created	O
by	O
the	O
previous	O
ENTER	O
instruction	O
.	O
</s>
<s>
;	O
adjust	O
SI	O
according	O
to	O
operand	O
size	O
and	O
DF	O
6F	O
61	O
Pop	O
all	O
general	O
purpose	O
registers	B-General_Concept
from	O
stack	B-Application
equivalent	O
to	O
:	O
</s>
<s>
POP	O
AX	O
60	O
Push	O
all	O
general	O
purpose	O
registers	B-General_Concept
onto	O
stack	B-Application
equivalent	O
to	O
:	O
</s>
<s>
PUSH	O
DI	O
immediate	O
6A	O
ib	O
Push	O
an	O
immediate	O
byte/word	O
value	O
onto	O
the	O
stack	B-Application
example	O
:	O
</s>
<s>
The	O
new	O
instructions	O
added	O
in	O
80286	B-General_Concept
add	O
support	O
for	O
x86	B-Operating_System
protected	B-Application
mode	I-Application
.	O
</s>
<s>
Some	O
but	O
not	O
all	O
of	O
the	O
instructions	O
are	O
available	O
in	O
real	B-Application
mode	I-Application
as	O
well	O
.	O
</s>
<s>
Instruction	O
Opcode	B-Language
Instruction	O
description	O
Real	B-Application
mode	I-Application
Ring	B-Operating_System
LGDT	O
m16&32	O
0F	O
01	O
/2	O
Load	O
GDTR	O
(	O
Global	B-General_Concept
Descriptor	I-General_Concept
Table	I-General_Concept
Register	O
)	O
from	O
memory	O
.	O
</s>
<s>
rowspan	O
=	O
"	O
4	O
"	O
rowspan	O
=	O
"	O
6	O
"	O
0F	O
01	O
/3	O
Load	O
IDTR	O
(	O
Interrupt	B-General_Concept
Descriptor	I-General_Concept
Table	I-General_Concept
Register	O
)	O
from	O
memory	O
..	O
The	O
IDTR	O
controls	O
not	O
just	O
the	O
address/size	O
of	O
the	O
IDT	O
(	O
interrupt	B-General_Concept
Descriptor	I-General_Concept
Table	I-General_Concept
)	O
in	O
protected	B-Application
mode	I-Application
,	O
but	O
the	O
IVT	O
(	O
Interrupt	B-Application
Vector	O
Table	O
)	O
in	O
real	B-Application
mode	I-Application
as	O
well	O
.	O
</s>
<s>
rowspan	O
=	O
"	O
2	O
"	O
LTR	B-Device
r/m16	O
0F	O
00	O
/3	O
Load	O
TR	O
(	O
Task	O
Register	O
)	O
from	O
16-bit	O
register	O
or	O
memory	O
.	O
</s>
<s>
The	O
TSS	O
(	O
Task	B-Device
State	I-Device
Segment	I-Device
)	O
specified	O
by	O
the	O
16-bit	O
argument	O
is	O
marked	O
busy	O
,	O
but	O
a	O
task	O
switch	O
is	O
not	O
done	O
.	O
</s>
<s>
eflags.zf	O
=	O
0	O
rowspan	O
=	O
"	O
5	O
"	O
LAR	O
r	O
,	O
r/m16	O
0F	O
02	O
/r	O
Load	O
access	O
rights	O
byte	O
from	O
the	O
specified	O
segment	O
descriptor.Reads	O
bytes	O
4-7	O
of	O
segment	B-Operating_System
descriptor	I-Operating_System
,	O
bitwise-ANDs	O
it	O
with	O
0x00FxFF00	O
,	O
then	O
stores	O
the	O
bottom	O
16/32	O
bits	O
of	O
the	O
result	O
in	O
destination	O
register	O
.	O
</s>
<s>
Sets	O
EFLAGS.ZF	O
=	O
1	O
if	O
the	O
descriptor	O
could	O
be	O
loaded	O
,	O
ZF	O
=	O
0	O
otherwise	O
.	O
</s>
<s>
rowspan	O
=	O
"	O
4	O
"	O
LSL	O
r	O
,	O
r/m16	O
0F	O
03	O
/r	O
Load	O
segment	O
limit	O
from	O
the	O
specified	O
segment	B-Operating_System
descriptor	I-Operating_System
.	O
</s>
<s>
Load	O
all	O
CPU	B-General_Concept
registers	I-General_Concept
from	O
a	O
102-byte	O
data	O
structure	O
starting	O
at	O
physical	O
address	O
800h	O
,	O
including	O
"	O
hidden	O
"	O
part	O
of	O
segment	B-Operating_System
descriptor	I-Operating_System
registers	B-General_Concept
.	O
</s>
<s>
rowspan	O
=	O
"	O
2	O
"	O
rowspan	O
=	O
"	O
2	O
"	O
Store	O
all	O
CPU	B-General_Concept
registers	I-General_Concept
to	O
a	O
102-byte	O
data	O
structure	O
starting	O
at	O
physical	O
address	O
800h	O
,	O
then	O
shut	O
down	O
CPU	O
.	O
</s>
<s>
Instruction	O
Meaning	O
Notes	O
Bit	B-Algorithm
scan	I-Algorithm
forward	I-Algorithm
BSF	B-Algorithm
and	O
BSR	B-Algorithm
produce	O
undefined	O
results	O
if	O
the	O
source	O
argument	O
is	O
all-0s	O
.	O
</s>
<s>
Bit	B-Algorithm
scan	I-Algorithm
reverse	I-Algorithm
Bit	B-Device
test	I-Device
Bit	B-Device
test	I-Device
and	O
complement	O
Instructions	O
atomic	O
only	O
if	O
LOCK	O
prefix	O
present	O
.	O
</s>
<s>
Bit	B-Device
test	I-Device
and	O
reset	O
Bit	B-Operating_System
test	I-Operating_System
and	I-Operating_System
set	I-Operating_System
Convert	O
double-word	O
to	O
quad-word	O
Sign-extends	O
EAX	O
into	O
EDX	O
,	O
forming	O
the	O
quad-word	O
EDX:EAX	O
.	O
</s>
<s>
Compare	O
string	O
double-word	O
Compares	O
ES	O
:	O
[( 	O
E	O
)	O
DI ]	O
with	O
DS	O
:	O
[( 	O
E	O
)	O
SI ]	O
and	O
increments	O
or	O
decrements	O
both	O
(	O
E	O
)	O
DI	O
and	O
(	O
E	O
)	O
SI	O
,	O
depending	O
on	O
DF	O
;	O
can	O
be	O
prefixed	O
with	O
REP	O
Convert	O
word	O
to	O
double-word	O
Unlike	O
CWD	O
,	O
CWDE	O
sign-extends	O
AX	O
to	O
EAX	O
instead	O
of	O
AX	O
to	O
DX:AX	O
Insert	O
Bit	O
String	O
Discontinued	O
with	O
B1	O
step	O
of	O
80386	B-General_Concept
.	O
</s>
<s>
Two-operand	O
form	O
of	O
IMUL	O
:	O
Signed	O
and	O
Unsigned	O
Allows	O
to	O
multiply	O
two	O
registers	B-General_Concept
directly	O
,	O
storing	O
the	O
partial	O
(	O
truncated	O
)	O
lower	O
bit	O
result	O
.	O
</s>
<s>
Interrupt	B-Application
return	O
;	O
D	O
suffix	O
means	O
32-bit	O
return	O
,	O
F	O
suffix	O
means	O
do	O
not	O
generate	O
epilogue	O
code	O
(	O
i.e.	O
</s>
<s>
LEAVE	O
instruction	O
)	O
Use	O
IRETD	O
rather	O
than	O
IRET	O
in	O
32-bit	O
situations	O
(	O
near	O
)	O
Jump	O
conditionally	O
Conditional	O
near	O
jump	O
instructions	O
for	O
all	O
8086	O
Jxx	O
short	O
jump	O
instructions	O
Jump	O
if	O
ECX	O
is	O
zero	O
Load	O
far	O
pointer	O
Load	O
stack	B-Application
segment	O
and	O
register	O
Normally	O
used	O
to	O
update	O
both	O
SS	O
and	O
SP	O
at	O
the	O
same	O
time	O
.	O
</s>
<s>
Load	O
string	O
double-word	O
( ±±	O
depends	O
on	O
DF	O
,	O
DS	O
:	O
can	O
be	O
overridden	O
)	O
;	O
can	O
be	O
prefixed	O
with	O
REP	O
Loop	O
,	O
conditional	O
loop	O
Same	O
as	O
LOOP	O
,	O
LOOPcc	O
for	O
earlier	O
processors	O
Loop	O
while	O
equal	O
,	O
cc	O
=	O
Z(ero )	O
,	O
E(qual )	O
,	O
NonZero	O
,	O
N(on )	O
E(qual )	O
to/from	O
Move	O
to/from	O
special	O
registers	B-General_Concept
CR	O
=	O
control	B-Operating_System
registers	I-Operating_System
,	O
DR	O
=	O
debug	O
registers	B-General_Concept
,	O
TR	O
=	O
test	B-Device
registers	B-General_Concept
(	O
up	O
to	O
80486	B-General_Concept
)	O
Move	O
string	O
double-word	O
( ±±	O
depends	O
on	O
DF	O
)	O
;	O
can	O
be	O
prefixed	O
with	O
REP	O
Move	O
with	O
sign-extension	O
and	O
similar	O
Move	O
with	O
zero-extension	O
and	O
similar	O
Output	O
to	O
port	O
from	O
string	O
double-word	O
( ±±	O
depends	O
on	O
DF	O
,	O
DS	O
:	O
can	O
be	O
overridden	O
)	O
;	O
can	O
be	O
prefixed	O
with	O
REP	O
.	O
</s>
<s>
Pop	O
all	O
double-word	O
(	O
32-bit	O
)	O
registers	B-General_Concept
from	O
stack	B-Application
Does	O
not	O
pop	O
register	O
ESP	O
off	O
of	O
stack	B-Application
Pop	O
data	O
into	O
EFLAGS	B-General_Concept
register	I-General_Concept
Push	O
all	O
double-word	O
(	O
32-bit	O
)	O
registers	B-General_Concept
onto	O
stack	B-Application
Push	O
EFLAGS	B-General_Concept
register	I-General_Concept
onto	O
stack	B-Application
Push	O
a	O
double-word	O
(	O
32-bit	O
)	O
value	O
onto	O
stack	B-Application
Scan	O
string	O
data	O
double-word	O
Compares	O
ES	O
:	O
[( 	O
E	O
)	O
DI ]	O
with	O
EAX	O
and	O
increments	O
or	O
decrements	O
(	O
E	O
)	O
DI	O
,	O
depending	O
on	O
DF	O
;	O
can	O
be	O
prefixed	O
with	O
REP	O
Set	O
byte	O
to	O
one	O
on	O
condition	O
,	O
zero	O
otherwise	O
(	O
)	O
Shift	O
left	O
double	O
Instead	O
of	O
CL	O
,	O
8-bit	O
immediate	O
can	O
be	O
used	O
.	O
</s>
<s>
(	O
Actual	O
results	O
differ	O
between	O
different	O
Intel	O
CPUs	O
,	O
with	O
at	O
least	O
three	O
different	O
behaviors	O
known.sandpile.org,	O
x86	B-Operating_System
architecture	I-Operating_System
rFLAGS	B-General_Concept
register	O
,	O
see	O
note	O
#7	O
)	O
Store	O
string	O
double-word	O
( ±±	O
depends	O
on	O
DF	O
,	O
ES	O
cannot	O
be	O
overridden	O
)	O
;	O
can	O
be	O
prefixed	O
with	O
REP	O
Extract	O
Bit	O
String	O
Discontinued	O
with	O
B1	O
step	O
of	O
80386	B-General_Concept
.	O
</s>
<s>
Used	O
by	O
software	O
mainly	O
for	O
detection	O
of	O
the	O
buggy	O
B0	O
stepping	O
of	O
the	O
80386	B-General_Concept
.	O
</s>
<s>
Compared	O
to	O
earlier	O
sets	O
,	O
the	O
80386	B-General_Concept
instruction	B-General_Concept
set	I-General_Concept
also	O
adds	O
opcodes	B-Language
with	O
different	O
parameter	O
combinations	O
for	O
the	O
following	O
instructions	O
:	O
and	O
prefix	O
opcodes	B-Language
for	O
and	O
segment	O
overrides	O
.	O
</s>
<s>
Instruction	O
Opcode	B-Language
Description	O
Ring	B-Operating_System
BSWAP	O
r32	O
Byte	O
Order	O
Swap	O
.	O
</s>
<s>
rowspan	O
=	O
"	O
5	O
"	O
CMPXCHG	O
r/m8	O
,	O
r8	O
Compare	B-Operating_System
and	I-Operating_System
Exchange	I-Operating_System
.	O
</s>
<s>
If	O
accumulator	O
(	O
AL/AX/EAX/RAX	O
)	O
compares	O
equal	O
to	O
first	O
operand	O
,	O
then	O
EFLAGS.ZF	O
is	O
set	O
to	O
1	O
and	O
the	O
first	O
operand	O
is	O
overwritten	O
with	O
the	O
second	O
operand	O
.	O
</s>
<s>
Otherwise	O
,	O
EFLAGS.ZF	O
is	O
set	O
to	O
0	O
,	O
and	O
first	O
operand	O
is	O
copied	O
into	O
the	O
accumulator	O
.	O
</s>
<s>
XADD	B-Operating_System
r/m	O
,	O
r8	O
eXchange	B-Operating_System
and	I-Operating_System
ADD	I-Operating_System
.	O
</s>
<s>
XADD	B-Operating_System
r/m	O
,	O
r16XADD	O
r/m	O
,	O
r32	O
0F	O
C1	O
/r	O
INVLPG	O
m8	O
Invalidate	O
TLB	B-Architecture
entries	O
for	O
page	O
that	O
contains	O
the	O
byte	O
specified	O
by	O
the	O
m8	O
argument	O
.	O
</s>
<s>
Integer/system	O
instructions	O
that	O
were	O
not	O
present	O
in	O
the	O
basic	O
80486	B-General_Concept
instruction	B-General_Concept
set	I-General_Concept
,	O
but	O
were	O
added	O
in	O
processors	O
prior	O
to	O
the	O
introduction	O
of	O
SSE	B-General_Concept
.	O
</s>
<s>
(	O
Discontinued	B-Device
instructions	I-Device
are	O
not	O
included	O
.	O
)	O
</s>
<s>
Instruction	O
Opcode	B-Language
Description	O
Ring	B-Operating_System
Added	O
in	O
RDMSR	B-General_Concept
0F	O
32	O
Read	O
Model-specific	B-General_Concept
register	I-General_Concept
.	O
</s>
<s>
The	O
MSR	B-General_Concept
to	O
read	O
is	O
specified	O
in	O
ECX	O
.	O
</s>
<s>
The	O
value	O
of	O
the	O
MSR	B-General_Concept
is	O
then	O
returned	O
as	O
a	O
64-bit	O
value	O
in	O
EDX:EAX	O
.	O
</s>
<s>
rowspan	O
=	O
"	O
2	O
"	O
IBM	B-Device
386SLC	I-Device
,	O
Frank	O
van	O
Gilluwe	O
,	O
"	O
The	O
Undocumented	O
PC	O
,	O
second	O
edition	O
"	O
,	O
1997	O
,	O
,	O
page	O
55Intel	O
Pentium	B-General_Concept
,	O
AMD	O
K5	O
,	O
IDT	B-Device
WinChip	I-Device
C6	O
,	O
Transmeta	B-General_Concept
Crusoe	I-General_Concept
WRMSR	B-General_Concept
0F	O
30	O
Write	O
Model-specific	B-General_Concept
register	I-General_Concept
.	O
</s>
<s>
The	O
MSR	B-General_Concept
to	O
write	O
is	O
specified	O
in	O
ECX	O
,	O
and	O
the	O
data	O
to	O
write	O
is	O
given	O
in	O
EDX:EAX.Instruction	O
is	O
,	O
with	O
some	O
exceptions	O
,	O
serializing	O
.	O
</s>
<s>
RSM	O
0F	O
AA	O
Resume	O
from	O
System	B-Architecture
Management	I-Architecture
Mode	I-Architecture
.	O
</s>
<s>
Intel	B-General_Concept
Pentium	I-General_Concept
,	O
AMD	B-Device
5x86	I-Device
,	O
Cyrix	O
486SLC/e	O
,	O
Cyrix	O
486SLC/e	O
Data	O
Sheet	O
(	O
1992	O
)	O
,	O
section	O
2.6.4IDT	O
WinChip	B-Device
C6	O
,	O
Transmeta	B-General_Concept
Crusoe	I-General_Concept
,	O
Rise	O
mP6	B-General_Concept
CPUID	B-Architecture
0F	O
A2	O
CPU	O
Identification	O
and	O
feature	O
information	O
.	O
</s>
<s>
Takes	O
as	O
input	O
a	O
CPUID	B-Architecture
leaf	O
index	O
in	O
EAX	O
and	O
,	O
depending	O
on	O
leaf	O
,	O
a	O
sub-index	O
in	O
ECX	O
.	O
</s>
<s>
Result	O
is	O
returned	O
in	O
EAX	O
,	O
EBX	O
,	O
ECX	O
,	O
EDX.Instruction	O
is	O
serializing	O
,	O
and	O
causes	O
a	O
mandatory	O
#VMEXIT	O
under	O
virtualization.Support	O
for	O
CPUID	B-Architecture
can	O
be	O
checked	O
by	O
toggling	O
bit	O
21	O
of	O
EFLAGS	B-General_Concept
(	O
EFLAGS.ID	O
)	O
-	O
if	O
this	O
bit	O
can	O
be	O
toggled	O
,	O
CPUID	B-Architecture
is	O
present	O
.	O
</s>
<s>
Intel	B-General_Concept
Pentium	I-General_Concept
,	O
AMD	B-Device
5x86	I-Device
,	O
Cyrix	B-Device
5x86	I-Device
,	O
IDT	B-Device
WinChip	I-Device
C6	O
,	O
Transmeta	B-General_Concept
Crusoe	I-General_Concept
,	O
Rise	O
mP6	B-General_Concept
,	O
NexGen	O
Nx586	O
,	O
UMC	B-Device
Green	I-Device
CPU	I-Device
Compare	B-Operating_System
and	I-Operating_System
Exchange	I-Operating_System
8	O
bytes	O
.	O
</s>
<s>
Intel	B-General_Concept
Pentium	I-General_Concept
,	O
AMD	O
K5	O
,	O
Cyrix	O
IDT	B-Device
WinChip	I-Device
C6	O
,	O
Transmeta	B-General_Concept
Crusoe	I-General_Concept
,	O
Rise	O
mP6	B-General_Concept
RDTSC	B-Device
0F	O
31	O
Read	O
64-bit	O
Time	B-Device
Stamp	I-Device
Counter	I-Device
(	O
TSC	O
)	O
into	O
EDX:EAX.In	O
early	O
processors	O
,	O
the	O
TSC	O
was	O
a	O
cycle	O
counter	O
,	O
incrementing	O
by	O
1	O
for	O
each	O
clock	O
cycle	O
(	O
which	O
could	O
cause	O
its	O
rate	O
to	O
vary	O
on	O
processors	O
that	O
could	O
change	O
clock	O
speed	O
at	O
runtime	O
)	O
-	O
in	O
later	O
processors	O
,	O
it	O
increments	O
at	O
a	O
fixed	O
rate	O
that	O
does	O
n't	O
necessarily	O
match	O
the	O
CPU	O
clock	O
speed	O
.	O
</s>
<s>
Accessed	O
24	O
Jan	O
2023	O
.	O
and	O
later	O
;	O
Zhaoxin	B-Device
LuJiaZuiCPU-World	O
,	O
CPUID	B-Architecture
for	O
IDT	O
ZHAOXIN	B-Device
KaiXian	O
KX-U6780	O
2.7	O
GHz	O
(	O
by	O
KZ	O
)	O
.	O
</s>
<s>
Intel	B-General_Concept
Pentium	I-General_Concept
,	O
AMD	O
K5	O
,	O
Cyrix	O
IDT	B-Device
WinChip	I-Device
C6	O
,	O
Transmeta	B-General_Concept
Crusoe	I-General_Concept
,	O
Rise	O
mP6	B-General_Concept
RDPMC	O
0F	O
33	O
Read	O
Performance	B-General_Concept
Monitoring	I-General_Concept
Counter	I-General_Concept
.	O
</s>
<s>
Intel	B-Device
Pentium	I-Device
Pro	I-Device
,	O
AMD	B-Architecture
K7	I-Architecture
,	O
Cyrix	O
6x86MX	B-General_Concept
,	O
IDT	B-Device
WinChip	I-Device
C6	O
,	O
VIA	B-Device
Nano	I-Device
Conditional	O
move	O
to	O
register	O
.	O
</s>
<s>
Intel	B-Device
Pentium	I-Device
Pro	I-Device
,	O
AMD	B-Architecture
K7	I-Architecture
,	O
Transmeta	B-General_Concept
Crusoe	I-General_Concept
,	O
VIA	B-Device
C3	I-Device
"	O
Nehemiah	B-Device
"	O
NOP	B-Language
r/m	O
,	O
NOPL	O
r/m	O
Official	O
long	O
NOP.Other	O
than	O
AMD	O
K7/K8	O
,	O
broadly	O
unsupported	O
in	O
non-Intel	O
processors	O
released	O
before	O
2006.JookWiki	O
,	O
"	O
nopl	O
"	O
,	O
sep	O
24	O
,	O
2022	O
-	O
provides	O
a	O
lengthy	O
account	O
of	O
the	O
history	O
of	O
the	O
long	O
NOP	B-Language
and	O
the	O
issues	O
around	O
it	O
.	O
</s>
<s>
Intel	B-Device
Pentium	I-Device
Pro	I-Device
,	O
UD2	O
0F	O
0B	O
Undefined	O
Instructions	O
.	O
</s>
<s>
Generate	O
an	O
invalid	B-Language
opcode	I-Language
(	O
#UD	O
)	O
exception	O
in	O
all	O
operating	O
modes.These	O
instructions	O
are	O
provided	O
for	O
software	O
testing	O
to	O
explicitly	O
generate	O
an	O
invalid	B-Language
opcode	I-Language
.	O
</s>
<s>
The	O
opcodes	B-Language
for	O
these	O
instructions	O
are	O
reserved	O
for	O
this	O
purpose	O
.	O
</s>
<s>
rowspan	O
="3	O
"	O
(	O
80186	B-Device
)	O
,	O
Intel	O
PentiumIntel	O
,	O
Pentium®	O
Processor	O
Family	O
Developer	O
’s	O
Manual	O
Volume	O
3	O
,	O
1995	O
.	O
order	O
no	O
.	O
</s>
<s>
241430-004	O
,	O
appendix	O
A	O
,	O
page	O
943	O
-	O
reserves	O
the	O
opcodes	B-Language
and	O
.	O
</s>
<s>
UD1	O
reg	O
,	O
r/m	O
0F	O
B9	O
/r	O
OIO	O
,	O
UD0	O
,	O
UD0	O
reg	O
,	O
r/m	O
0F	O
FF	O
,	O
0F	O
FF	O
/r	O
(	O
80186	B-Device
)	O
,	O
Cyrix	B-General_Concept
6x86	I-General_Concept
,	O
Cyrix	O
,	O
6x86	B-General_Concept
processor	O
data	O
book	O
,	O
1996	O
,	O
order	O
no	O
.	O
</s>
<s>
94175-01	O
,	O
table	O
6-20	O
,	O
page	O
209	O
-	O
uses	O
the	O
mnemonic	O
OIO	O
(	O
"	O
Official	O
invalid	B-Language
opcode	I-Language
"	O
)	O
for	O
the	O
opcode.AMD	O
K5AMD	O
,	O
AMD-K5	O
Processor	O
Technical	O
Reference	O
Manual	O
,	O
Nov	O
1996	O
,	O
order	O
no	O
.	O
</s>
<s>
18524C/0	O
,	O
section	O
3.3.7	O
,	O
page	O
90	O
-	O
reserves	O
the	O
opcode	B-Language
without	O
assigning	O
it	O
a	O
mnemonic	O
.	O
</s>
<s>
SYSCALL	B-Operating_System
0F	O
05	O
Fast	O
System	B-Operating_System
call	I-Operating_System
.	O
</s>
<s>
AMD	B-Architecture
K6	I-Architecture
,	O
x86-64	B-Device
SYSRET	O
0F	O
07	O
Fast	O
Return	O
from	O
System	B-Operating_System
Call	I-Operating_System
.	O
</s>
<s>
Designed	O
to	O
be	O
used	O
together	O
with	O
SYSCALL	B-Operating_System
.	O
</s>
<s>
SYSENTER	O
0F	O
34	O
Fast	O
System	B-Operating_System
call	I-Operating_System
.	O
</s>
<s>
Intel	B-General_Concept
Pentium	I-General_Concept
II	I-General_Concept
,	O
AMD	B-Architecture
K7	I-Architecture
,	O
AMD	B-Architecture
,	I-Architecture
Athlon	I-Architecture
Processor	O
x86	B-Operating_System
Code	O
Optimization	O
Guide	O
,	O
publication	O
no	O
.	O
</s>
<s>
22007	O
,	O
rev	O
K	O
,	O
feb	O
2002	O
,	O
appendix	O
F	O
,	O
page	O
284Transmeta	O
Crusoe	B-General_Concept
,	O
VIA	B-Device
C3	I-Device
"	O
Nehemiah	B-Device
"	O
SYSEXIT	O
0F	O
35	O
Fast	O
Return	O
from	O
System	B-Operating_System
Call	I-Operating_System
.	O
</s>
<s>
Instruction	O
Encoding	O
Meaning	O
CDQE	O
REX.W	O
98	O
Sign	O
extend	O
EAX	O
into	O
RAX	O
CQO	O
REX.W	O
99	O
Sign	O
extend	O
RAX	O
into	O
RDX:RAX	O
CMPSQ	O
REX.W	O
A7	O
CoMPare	O
String	O
Quadword	O
REX.W	O
0F	O
C7	O
/1	O
CoMPare	B-Operating_System
and	I-Operating_System
eXCHanGe	I-Operating_System
16	O
Bytes.Atomic	O
only	O
if	O
used	O
with	O
LOCK	O
prefix	O
.	O
</s>
<s>
Bit	B-Device
manipulation	I-Device
instructions	I-Device
.	O
</s>
<s>
For	O
all	O
of	O
the	O
VEX-encoded	B-General_Concept
instructions	O
defined	O
by	O
BMI1	O
and	O
BMI2	O
,	O
the	O
operand	O
size	O
may	O
be	O
32	O
or	O
64	O
bits	O
,	O
controlled	O
by	O
the	O
VEX.W	O
bit	O
-	O
none	O
of	O
these	O
instructions	O
are	O
available	O
in	O
16-bit	O
variants	O
.	O
</s>
<s>
Bit	O
Manipulation	O
Extension	O
Instructionmnemonics	O
Opcode	B-Language
Instruction	O
description	O
Added	O
in	O
POPCNT	O
r16	O
,	O
r/m16	O
F3	O
0F	O
B8	O
/r	O
Population	O
Count	O
.	O
</s>
<s>
K10	O
,	O
Bobcat	O
,	O
Haswell	B-Device
,	O
ZhangJiang	B-Device
,	O
Gracemont	B-Device
POPCNT	O
r64	O
,	O
r/m64	O
F3	O
REX.W	O
0F	O
B8	O
/r	O
LZCNT	B-Algorithm
r16	O
,	O
r/m16LZCNT	O
r32	O
,	O
r/m32	O
F3	O
0F	O
BD	O
/r	O
Count	O
Leading	O
zeroes.If	O
source	O
operand	O
is	O
all-0s	O
,	O
then	O
LZCNT	B-Algorithm
will	O
return	O
operand	O
size	O
in	O
bits	O
(	O
16/32/64	O
)	O
and	O
set	O
CF	O
=	O
1	O
.	O
</s>
<s>
LZCNT	B-Algorithm
r64	O
,	O
r/m64	O
TZCNT	O
r16	O
,	O
r/m16TZCNT	O
r32	O
,	O
r/m32	O
F3	O
0F	O
BC	O
/r	O
Count	O
Trailing	O
zeroes.If	O
source	O
operand	O
is	O
all-0s	O
,	O
then	O
TZCNT	O
will	O
return	O
operand	O
size	O
in	O
bits	O
(	O
16/32/64	O
)	O
and	O
set	O
CF	O
=	O
1	O
.	O
</s>
<s>
Haswell	B-Device
,	O
Piledriver	O
,	O
Jaguar	O
,	O
ZhangJiang	B-Device
,	O
Gracemont	B-Device
TZCNT	O
r64	O
,	O
r/m64	O
ANDN	O
ra	O
,	O
rb	O
,	O
r/m	O
VEX.LZ.0F38	O
F2	O
/r	O
Bitwise	O
AND-NOT	O
:	O
ra	O
=	O
r/m	O
AND	O
NOT(rb )	O
BEXTR	O
ra	O
,	O
r/m	O
,	O
rb	O
VEX.LZ.0F38	O
F7	O
/r	O
Bitfield	O
extract	O
.	O
</s>
<s>
Equivalent	O
tora	O
=	O
r/m	O
AND	O
NOT( 	O
-1	O
<<	O
rb[7:0]	O
)	O
Haswell	B-Device
,	O
Excavator	O
,	O
ZhangJiang	B-Device
,	O
Gracemont	B-Device
MULX	O
ra	O
,	O
rb	O
,	O
r/m	O
Widening	O
unsigned	O
integer	O
multiply	O
without	O
setting	O
flags	B-General_Concept
.	O
</s>
<s>
ra[k]=rb[i];	O
k	O
=	O
k+1	O
Rotate	O
right	O
by	O
immediate	O
without	O
affecting	O
flags	B-General_Concept
.	O
</s>
<s>
SARX	O
ra	O
,	O
r/m	O
,	O
rb	O
Arithmetic	O
shift	O
right	O
without	O
updating	O
flags.For	O
SARX	O
,	O
SHRX	O
and	O
SHLX	O
,	O
the	O
shift-amount	O
specified	O
in	O
rb	O
is	O
masked	O
to	O
5	O
bits	O
for	O
32-bit	O
operand	O
size	O
and	O
6	O
bits	O
for	O
64-bit	O
operand	O
size	O
.	O
</s>
<s>
SHRX	O
ra	O
,	O
r/m	O
,	O
rb	O
Logical	O
shift	O
right	O
without	O
updating	O
flags	B-General_Concept
.	O
</s>
<s>
SHLX	O
ra	O
,	O
r/m	O
,	O
rb	O
Shift	O
left	O
without	O
updating	O
flags	B-General_Concept
.	O
</s>
<s>
TSX	O
Subset	O
Instruction	O
Opcode	B-Language
Description	O
Added	O
in	O
XBEGIN	O
rel16	O
C7	O
F8	O
cw	O
Start	O
transaction	O
.	O
</s>
<s>
</s>
<s>
Ice	B-Device
Lake-SP	I-Device
,	O
Sapphire	B-Device
Rapids	I-Device
)	O
)	O
XABORT	O
imm8	O
C6	O
F8	O
ib	O
Abort	O
transaction	O
with	O
8-bit	O
immediate	O
as	O
error	O
code	O
.	O
</s>
<s>
XTEST	O
Test	B-Device
if	O
in	O
transactional	O
execution	O
.	O
</s>
<s>
Sets	O
EFLAGS.ZF	O
to	O
0	O
if	O
executed	O
inside	O
a	O
transaction	O
(	O
RTM	O
or	O
HLE	O
)	O
,	O
1	O
otherwise	O
.	O
</s>
<s>
XACQUIRE	O
F2	O
Instruction	O
prefix	O
to	O
indicate	O
start	O
of	O
hardware	O
lock	O
elision	O
,	O
used	O
with	O
memory	O
atomic	B-General_Concept
instructions	I-General_Concept
only	O
(	O
for	O
other	O
instructions	O
,	O
the	O
F2	O
prefix	O
may	O
have	O
other	O
meanings	O
)	O
.	O
</s>
<s>
When	O
used	O
with	O
such	O
instructions	O
,	O
may	O
start	O
a	O
transaction	O
instead	O
of	O
performing	O
the	O
memory	O
atomic	B-General_Concept
operation	I-General_Concept
.	O
</s>
<s>
</s>
<s>
Intel	O
CET	O
(	O
Control-Flow	O
Enforcement	O
Technology	O
)	O
adds	O
two	O
distinct	O
features	O
to	O
help	O
protect	O
against	O
security	O
exploits	O
such	O
as	O
return-oriented	O
programming	O
:	O
a	O
shadow	O
stack	B-Application
(	O
CET_SS	O
)	O
,	O
and	O
indirect	O
branch	O
tracking	O
(	O
CET_IBT	O
)	O
.	O
</s>
<s>
CET	O
Subset	O
Instruction	O
Opcode	B-Language
Description	O
Ring	B-Operating_System
Added	O
in	O
INCSSPD	O
r32	O
F3	O
0F	O
AE	O
/5	O
Increment	O
shadow	O
stack	B-Application
pointer	O
rowspan	O
=	O
"	O
8	O
"	O
Zen	O
3	O
INCSSPQ	O
r64	O
F3	O
REX.W	O
0F	O
AE	O
/5	O
RDSSPD	O
r32	O
F3	O
0F	O
1E	O
/1	O
Read	O
shadow	O
stack	B-Application
pointer	O
into	O
register	O
(	O
low	O
32	O
bits	O
)	O
RDSSPQ	O
r64	O
F3	O
REX.W	O
0F	O
1E	O
/1	O
Read	O
shadow	O
stack	B-Application
pointer	O
into	O
register	O
(	O
full	O
64	O
bits	O
)	O
SAVEPREVSSP	O
F3	O
0F	O
01	O
EA	O
Save	O
previous	O
shadow	O
stack	B-Application
pointer	O
RSTORSSP	O
m64	O
F3	O
0F	O
01	O
/5	O
Restore	O
saved	O
shadow	O
stack	B-Application
pointer	O
WRSSD	O
m32	O
,	O
r32	O
0F	O
38	O
F6	O
/r	O
Write	O
4	O
bytes	O
to	O
shadow	O
stack	B-Application
WRSSQ	O
m64	O
,	O
r64	O
REX.W	O
0F	O
38	O
F6	O
/r	O
Write	O
8	O
bytes	O
to	O
shadow	O
stack	B-Application
WRUSSD	O
m32	O
,	O
r32	O
66	O
0F	O
38	O
F5	O
/r	O
Write	O
4	O
bytes	O
to	O
user	O
shadow	O
stack	B-Application
rowspan	O
=	O
"	O
4	O
"	O
Write	O
8	O
bytes	O
to	O
user	O
shadow	O
stack	B-Application
SETSSBSY	O
F3	O
0F	O
01	O
E8	O
Mark	O
shadow	O
stack	B-Application
busy	O
CLRSSBSY	O
m64	O
F3	O
0F	O
AE	O
/6	O
Clear	O
shadow	O
stack	B-Application
busy	O
flag	O
ENDBR32	O
F3	O
0F	O
1E	O
FB	O
Terminate	O
indirect	O
branch	O
in	O
32-bit	O
mode	O
rowspan	O
="3	O
"	O
Tiger	B-Device
Lake	I-Device
ENDBR64	O
F3	O
0F	O
1E	O
FA	O
Terminate	O
indirect	O
branch	O
in	O
64-bit	O
mode	O
NOTRACK	O
3E	O
Prefix	O
used	O
with	O
indirect	O
CALL/JMP	O
near	O
instructions	O
(	O
opcodes	B-Language
and	O
)	O
to	O
indicate	O
that	O
the	O
branch	O
target	O
is	O
not	O
required	O
to	O
start	O
with	O
an	O
ENDBR32/64	O
instruction	O
.	O
</s>
<s>
Instruction	B-General_Concept
Set	I-General_Concept
Extension	O
Instructionmnemonics	O
Opcode	B-Language
Instruction	O
description	O
Ring	B-Operating_System
Added	O
in	O
PREFETCHNTA	O
m8	O
0F	O
18	O
/0	O
Prefetch	O
with	O
Non-Temporal	O
Access.Prefetch	O
data	O
under	O
the	O
assumption	O
that	O
the	O
data	O
will	O
be	O
used	O
only	O
once	O
,	O
and	O
attempt	O
to	O
minimize	O
cache	O
pollution	O
from	O
said	O
data	O
.	O
</s>
<s>
rowspan	O
=	O
"	O
5	O
"	O
Pentium	B-General_Concept
III	I-General_Concept
,	O
(	O
K7	B-Architecture
)	O
,	O
Nehemiah	B-Device
,	O
Efficeon	B-General_Concept
PREFETCHT0	O
m8	O
0F	O
18	O
/1	O
Prefetch	O
data	O
to	O
all	O
levels	O
of	O
the	O
cache	B-General_Concept
hierarchy	I-General_Concept
.	O
</s>
<s>
PREFETCHT1	O
m8	O
0F	O
18	O
/2	O
Prefetch	O
data	O
to	O
all	O
levels	O
of	O
the	O
cache	B-General_Concept
hierarchy	I-General_Concept
except	O
L1	O
cache	O
.	O
</s>
<s>
PREFETCHT2	O
m8	O
0F	O
18	O
/3	O
Prefetch	O
data	O
to	O
all	O
levels	O
of	O
the	O
cache	B-General_Concept
hierarchy	I-General_Concept
except	O
L1	O
and	O
L2	O
caches	O
.	O
</s>
<s>
rowspan	O
=	O
"	O
4	O
"	O
Pentium	B-General_Concept
4	I-General_Concept
,	O
K8	B-Device
,	O
Efficeon	B-General_Concept
,	O
C7	B-Device
Esther	I-Device
MFENCE	O
NP	O
0F	O
AE	O
F0+x	O
Memory	O
Fence	O
.	O
</s>
<s>
PAUSE	O
F3	O
90The	O
actual	O
length	O
of	O
the	O
pause	O
performed	O
by	O
the	O
PAUSE	O
instruction	O
is	O
implementation-dependent.On	O
systems	O
without	O
SSE2	B-General_Concept
,	O
PAUSE	O
will	O
execute	O
as	O
NOP	B-Language
.	O
</s>
<s>
}}	O
Intended	O
for	O
use	O
in	O
spinlocks	B-Operating_System
.	O
</s>
<s>
NP	O
0F	O
AE	O
/7	O
Flush	O
one	O
cache	O
line	O
to	O
memory.In	O
a	O
system	O
with	O
multiple	O
cache	B-General_Concept
hierarchy	I-General_Concept
levels	O
and/or	O
multiple	O
processors	O
each	O
with	O
their	O
own	O
caches	O
,	O
the	O
line	O
is	O
flushed	O
from	O
all	O
of	O
them	O
.	O
</s>
<s>
(	O
SSE2	B-General_Concept
)	O
,	O
Geode	B-Device
LX	I-Device
MONITOR	O
NP	O
0F	O
01	O
C8	O
Start	O
monitoring	O
a	O
memory	O
location	O
for	O
memory	O
writes	O
.	O
</s>
<s>
ECX	O
and	O
EDX	O
are	O
reserved	O
for	O
extra	O
extension	O
and	O
hint	O
flags	B-General_Concept
,	O
respectively	O
.	O
</s>
<s>
rowspan	O
=	O
"	O
2	O
"	O
Prescott	O
,	O
Yonah	B-Device
,	O
Bonnell	B-Device
,	O
K10	O
,	O
Nano	B-Device
MWAITMWAIT	O
EAX	O
,	O
ECX	O
NP	O
0F	O
01	O
C9The	O
wait	O
performed	O
by	O
MWAITmay	O
be	O
ended	O
by	O
system	O
events	O
other	O
than	O
a	O
memory	O
write	O
(	O
e.g.	O
</s>
<s>
cacheline	O
evictions	O
,	O
interrupts	B-Application
)	O
-	O
the	O
exact	O
set	O
of	O
events	O
that	O
can	O
cause	O
the	O
wait	O
to	O
end	O
is	O
implementation-specific.Regardless	O
of	O
whether	O
the	O
wait	O
was	O
ended	O
by	O
a	O
memory	O
write	O
or	O
some	O
other	O
event	O
,	O
monitoring	O
will	O
have	O
ended	O
and	O
it	O
will	O
be	O
necessary	O
to	O
set	O
up	O
monitoring	O
again	O
with	O
MONITOR	O
before	O
performing	O
any	O
further	O
MWAITs	O
.	O
</s>
<s>
}}	O
and	O
hint	O
flags	B-General_Concept
,	O
respectively	O
.	O
</s>
<s>
WuDaoKou	B-Device
,	O
Guru3D	O
,	O
VIA	O
Zhaoxin	B-Device
x86	B-Operating_System
4	O
and	O
8-core	O
SoC	O
processors	O
launch	O
,	O
Jan	O
22	O
,	O
2018Tremont	O
XSAVE	O
memXSAVE64	O
mem	O
NP	O
0F	O
AE	O
/4NP	O
REX.W	O
0F	O
AE	O
/4	O
Save	O
state	O
components	O
specified	O
by	O
EDX:EAX	O
to	O
memory	O
.	O
</s>
<s>
rowspan	O
="3	O
"	O
Penryn	B-Device
,	O
Bulldozer	O
,	O
Jaguar	O
,	O
Goldmont	B-Device
,	O
ZhangJiang	B-Device
XRSTOR	O
memXRSTOR64	O
mem	O
NP	O
0F	O
AE	O
/5NP	O
REX.W	O
0F	O
AE	O
/5	O
Restore	O
state	O
components	O
specified	O
by	O
EDX:EAX	O
from	O
memory	O
.	O
</s>
<s>
RDTSCP	O
0F	O
01	O
F9	O
Read	B-Device
Time	I-Device
Stamp	I-Device
Counter	I-Device
and	O
processor	O
core	O
ID.The	O
TSC	O
value	O
is	O
placed	O
in	O
EDX:EAX	O
and	O
the	O
core	O
ID	O
in	O
ECX	O
.	O
</s>
<s>
K10	O
,	O
Nehalem	B-Device
,	O
Silvermont	B-Device
,	O
Nano	B-Device
POPCNT	O
r16	O
,	O
r/m16POPCNT	O
r32	O
,	O
r/m32	O
F3	O
0F	O
B8	O
/r	O
Count	O
the	O
number	O
of	O
bits	O
that	O
are	O
set	O
to	O
1	O
in	O
its	O
source	O
argument	O
.	O
</s>
<s>
rowspan	O
=	O
"	O
2	O
"	O
K10	O
,	O
Nehalem	B-Device
,	O
Nano	B-Device
3000	I-Device
POPCNT	O
r64	O
,	O
r/m64	O
F3	O
REX.W	O
0F	O
B8	O
/r	O
CRC32	O
r32	O
,	O
r/m8	O
F2	O
0F	O
38	O
F0	O
/r	O
Accumulate	O
CRC	O
value	O
using	O
the	O
CRC-32C	O
(	O
Castagnoli	O
)	O
polynomial	O
0x11EDC6F41	O
(	O
normal	O
form	O
0x1EDC6F41	O
)	O
.	O
</s>
<s>
rowspan	O
="3	O
"	O
Nehalem	B-Device
,	O
Bulldozer	O
,	O
ZhangJiang	B-Device
CRC32	O
r32	O
,	O
r/m16CRC32	O
r32	O
,	O
r/m32	O
F2	O
0F	O
38	O
F1	O
/r	O
CRC32	O
r64	O
,	O
r/m64	O
F2	O
REX.W	O
0F	O
38	O
F1	O
/r	O
XSAVEOPT	O
memXSAVEOPT64	O
mem	O
NP	O
0F	O
AE	O
/6NP	O
REX.W	O
0F	O
AE	O
/6	O
Save	O
state	O
components	O
specified	O
by	O
EDX:EAX	O
to	O
memory.Unlike	O
the	O
older	O
XSAVE	O
instruction	O
,	O
XSAVEOPT	O
may	O
abstain	O
from	O
writing	O
processor	O
state	O
items	O
to	O
memory	O
when	O
the	O
CPU	O
can	O
determine	O
that	O
they	O
have	O
n't	O
been	O
modified	O
since	O
the	O
most	O
recent	O
corresponding	O
XRSTOR	O
.	O
</s>
<s>
Sandy	B-Device
Bridge	I-Device
,	O
Steamroller	B-Application
,	O
Puma	O
,	O
Goldmont	B-Device
,	O
ZhangJiang	B-Device
RDFSBASE	O
r32RDFSBASE	O
r64	O
F3	O
0F	O
AE	O
/0F3	O
REX.W	O
0F	O
AE	O
/0	O
Read	O
base	O
address	O
of	O
FS	O
:	O
segment	O
.	O
</s>
<s>
rowspan	O
=	O
"	O
4	O
"	O
Ivy	B-Device
Bridge	I-Device
,	O
Steamroller	B-Application
,	O
Goldmont	B-Device
,	O
ZhangJiang	B-Device
RDGSBASE	O
r32RDGSBASE	O
r64	O
F3	O
0F	O
AE	O
/1F3	O
REX.W	O
0F	O
AE	O
/1	O
Read	O
base	O
address	O
of	O
GS	O
:	O
segment	O
.	O
</s>
<s>
rowspan	O
=	O
"	O
4	O
"	O
Bonnell	B-Device
,	O
Haswell	B-Device
,	O
Jaguar	O
,	O
Steamroller	B-Application
,	O
ZhangJiang	B-Device
MOVBE	O
r64	O
,	O
m64	O
MOVBE	O
m16	O
,	O
r16MOVBE	O
m32	O
,	O
r32	O
NFx	O
0F	O
38	O
F1	O
/r	O
Store	O
to	O
memory	O
from	O
register	O
with	O
byte-order	O
swap	O
.	O
</s>
<s>
MOVBE	O
m64	O
,	O
r64	O
INVPCID	O
reg	O
,	O
m128	O
66	O
0F	O
38	O
82	O
/r	O
Invalidate	O
entries	O
in	O
TLB	B-Architecture
and	O
paging-structure	O
caches	O
based	O
on	O
invalidation	O
type	O
in	O
register	O
and	O
descriptor	O
in	O
m128	O
.	O
</s>
<s>
Haswell	B-Device
,	O
ZhangJiang	B-Device
,	O
Zen	O
3	O
,	O
Gracemont	B-Device
0F	O
0D	O
/1	O
Prefetch	O
cache	O
line	O
with	O
intent	O
to	O
write	O
.	O
</s>
<s>
rowspan	O
=	O
"	O
2	O
"	O
K6-2	O
,	O
Silvermont	B-Device
,	O
Broadwell	B-General_Concept
,	O
ZhangJiang	B-Device
0F	O
0D	O
/0	O
Prefetch	O
cache	O
line	O
.	O
</s>
<s>
Differs	O
from	O
the	O
older	O
ADC	O
instruction	O
in	O
that	O
it	O
leaves	O
flags	B-General_Concept
other	O
than	O
EFLAGS.CF	O
unchanged	O
.	O
</s>
<s>
rowspan	O
=	O
"	O
2	O
"	O
Broadwell	B-General_Concept
,	O
Zen	O
1	O
,	O
ZhangJiang	B-Device
,	O
Gracemont	B-Device
ADOX	O
r64	O
,	O
r/m64	O
F3	O
0F	O
38	O
F6	O
/r	O
Add-with-carry	O
,	O
with	O
the	O
overflow-flag	O
EFLAGS.OF	O
serving	O
as	O
carry	O
input	O
and	O
output	O
,	O
with	O
other	O
flags	B-General_Concept
left	O
unchanged	O
.	O
</s>
<s>
CLAC	O
NP	O
0F	O
01	O
CA	O
Clear	O
EFLAGS.AC	O
.	O
</s>
<s>
rowspan	O
=	O
"	O
2	O
"	O
Broadwell	B-General_Concept
,	O
Goldmont	B-Device
,	O
Zen	O
1	O
STAC	O
NP	O
0F	O
01	O
CB	O
Set	O
EFLAGS.AC	O
.	O
</s>
<s>
Skylake	B-Architecture
,	O
Goldmont	B-Device
,	O
Zen	O
1	O
XSAVEC	O
memXSAVEC64	O
mem	O
NP	O
0F	O
C7	O
/4NP	O
REX.W	O
0F	O
C7	O
/4	O
Save	O
processor	O
extended	O
state	O
components	O
specified	O
by	O
EDX:EAX	O
to	O
memory	O
with	O
compaction	O
.	O
</s>
<s>
Skylake	B-Architecture
,	O
Goldmont	B-Device
,	O
Zen	O
1	O
XSAVES	O
memXSAVES64	O
mem	O
NP	O
0F	O
C7	O
/5NP	O
REX.W	O
0F	O
C7	O
/5	O
Save	O
processor	O
extended	O
state	O
components	O
specified	O
by	O
EDX:EAX	O
to	O
memory	O
with	O
compaction	O
and	O
optimization	O
if	O
possible	O
.	O
</s>
<s>
rowspan	O
=	O
"	O
2	O
"	O
Skylake	B-Architecture
,	O
Goldmont	B-Device
,	O
Zen	O
1	O
XRSTORS	O
memXRSTORS64	O
mem	O
NP	O
0F	O
C7	O
/3NP	O
REX.W	O
0F	O
C7	O
/3	O
Restore	O
state	O
components	O
specified	O
by	O
EDX:EAX	O
from	O
memory	O
.	O
</s>
<s>
rowspan	O
=	O
"	O
2	O
"	O
Comet	B-Device
Lake	I-Device
,	O
Gracemont	B-Device
,	O
Zen	O
3	O
WRPKRU	O
NP	O
0F	O
01	O
EF	O
Write	O
data	O
from	O
EAX	O
into	O
User	O
Page	O
Key	O
Register	O
,	O
and	O
perform	O
a	O
Memory	O
Fence	O
.	O
</s>
<s>
Zen	O
2	O
,	O
Ice	B-Device
Lake	I-Device
CLWB	O
m8	O
Write	O
one	O
cache	O
line	O
back	O
to	O
memory	O
without	O
invalidating	O
the	O
cache	O
line	O
.	O
</s>
<s>
Zen	O
2	O
,	O
Tiger	B-Device
Lake	I-Device
,	O
Tremont	B-Device
WBNOINVD	O
F3	O
0F	O
09	O
Write	O
back	O
all	O
dirty	O
cache	O
lines	O
to	O
memory	O
without	O
invalidation	O
.	O
</s>
<s>
Instruction	B-General_Concept
Set	I-General_Concept
Extension	O
Instructionmnemonics	O
Opcode	B-Language
Instruction	O
description	O
Ring	B-Operating_System
Added	O
in	O
ENCLS	O
Perform	O
an	O
SGX	O
Supervisor	O
function	O
.	O
</s>
<s>
Kaby	B-Device
Lake	I-Device
,	O
MOVDIRI	O
m32	O
,	O
r32MOVDIRI	O
m64	O
,	O
r64	O
NP	O
0F	O
38	O
F9	O
/r	O
Store	O
to	O
memory	O
using	O
Direct	O
Store	O
(	O
memory	O
store	O
that	O
is	O
not	O
cached	O
or	O
write-combined	O
with	O
other	O
stores	O
)	O
.	O
</s>
<s>
Ice	B-Device
Lake	I-Device
,	O
Tremont	B-Device
66	O
0F	O
38	O
F8	O
/r	O
Move	O
64	O
bytes	O
of	O
data	O
from	O
m512	O
to	O
address	O
given	O
by	O
ES:reg	O
.	O
</s>
<s>
Ice	B-Device
Lake	I-Device
,	O
Tremont	B-Device
PCONFIG	O
NP	O
0F	O
01	O
C5	O
Perform	O
a	O
platform	O
feature	O
configuration	O
function.The	O
function	O
to	O
perform	O
is	O
specified	O
in	O
EAX	O
.	O
</s>
<s>
Ice	B-Device
Lake-SP	I-Device
CLDEMOTE	O
m8	O
NP	O
0F	O
1C	O
/0	O
Move	O
cache	O
line	O
containing	O
m8	O
from	O
CPU	O
L1	O
cache	O
to	O
a	O
more	O
distant	O
level	O
of	O
the	O
cache	B-General_Concept
hierarchy	I-General_Concept
.	O
</s>
<s>
(	O
Tremont	B-Device
)	O
,	O
(	O
Alder	B-Device
Lake	I-Device
)	O
,	O
UMONITOR	O
r16/32/64	O
F3	O
0F	O
AE	O
/6	O
Start	O
monitoring	O
a	O
memory	O
location	O
for	O
memory	O
writes	O
.	O
</s>
<s>
Tremont	B-Device
,	O
Alder	B-Device
Lake	I-Device
UMWAIT	O
r32UMWAIT	O
r32	O
,	O
EDX	O
,	O
EAX	O
F2	O
0F	O
AE	O
/6	O
Timed	O
wait	O
for	O
a	O
write	O
to	O
a	O
monitored	O
memory	O
location	O
previously	O
specified	O
with	O
UMONITOR	O
.	O
</s>
<s>
rowspan	O
=	O
"	O
2	O
"	O
TPAUSE	O
r32TPAUSE	O
r32	O
,	O
EDX	O
,	O
EAX	O
66	O
0F	O
AE	O
/6	O
Wait	O
until	O
the	O
Time	B-Device
Stamp	I-Device
Counter	I-Device
reaches	O
the	O
value	O
specified	O
in	O
EDX:EAX.The	O
register	O
argument	O
to	O
the	O
instruction	O
specifies	O
extra	O
flags	B-General_Concept
to	O
control	O
the	O
operation	O
of	O
the	O
instruction	O
.	O
</s>
<s>
Alder	B-Device
Lake	I-Device
HRESET	O
imm8	O
F3	O
0F	O
3A	O
F0	O
C0	O
ib	O
Request	O
that	O
the	O
processor	O
reset	O
selected	O
components	O
of	O
hardware-maintained	O
prediction	O
history	O
.	O
</s>
<s>
Alder	B-Device
Lake	I-Device
SENDUIPI	O
reg	O
F3	O
0F	O
C7	O
/6	O
Send	O
Interprocessor	O
User	O
Interrupt	B-Application
.	O
</s>
<s>
rowspan	O
=	O
"	O
5	O
"	O
Sapphire	B-Device
Rapids	I-Device
UIRET	O
F3	O
0F	O
01	O
EC	O
User	O
Interrupt	B-Application
Return	O
.	O
</s>
<s>
TESTUI	O
F3	O
0F	O
01	O
ED	O
Test	B-Device
User	O
Interrupt	O
Flag.Copies	O
UIF	O
to	O
EFLAGS.CF	O
.	O
</s>
<s>
CLUI	O
F3	O
0F	O
01	O
EE	O
Clear	O
User	O
Interrupt	B-Device
Flag	I-Device
.	O
</s>
<s>
STUI	O
F3	O
0F	O
01	O
EF	O
Set	O
User	O
Interrupt	B-Device
Flag	I-Device
.	O
</s>
<s>
Instruction	B-General_Concept
Set	I-General_Concept
Extension	O
Instructionmnemonics	O
Opcode	B-Language
Instruction	O
description	O
Ring	B-Operating_System
Added	O
in	O
MOV	O
reg	O
,	O
CR8	O
F0	O
0F	O
20	O
/0	O
Read	O
the	O
CR8	O
register	O
.	O
</s>
<s>
rowspan	O
=	O
"	O
2	O
"	O
K8	B-Device
Write	O
to	O
the	O
CR8	O
register	O
.	O
</s>
<s>
The	O
value	O
of	O
the	O
MSR	B-General_Concept
is	O
returned	O
in	O
EDX:EAX	O
.	O
</s>
<s>
The	O
set	O
of	O
errors	O
that	O
can	O
be	O
reported	O
and	O
the	O
logging	O
mechanism	O
are	O
platform-specific.Sets	O
EFLAGS.CF	O
to	O
0	O
if	O
any	O
errors	O
occurred	O
,	O
1	O
otherwise	O
.	O
</s>
<s>
Zen	O
2	O
INVLPGB	O
NP	O
0F	O
01	O
FE	O
Invalidate	O
TLB	B-Architecture
Entries	O
for	O
a	O
range	O
of	O
pages	O
,	O
with	O
broadcast	O
.	O
</s>
<s>
The	O
invalidation	O
is	O
performed	O
on	O
the	O
processor	O
executing	O
the	O
instruction	O
,	O
and	O
also	O
broadcast	O
to	O
all	O
other	O
processors	O
in	O
the	O
system.rAX	O
takes	O
the	O
virtual	O
address	O
to	O
invalidate	O
and	O
some	O
additional	O
flags	B-General_Concept
,	O
ECX	O
takes	O
the	O
number	O
of	O
pages	O
to	O
invalidate	O
,	O
and	O
EDX	O
specifies	O
ASID	O
and	O
PCID	O
to	O
perform	O
TLB	B-Architecture
invalidation	O
for	O
.	O
</s>
<s>
rowspan	O
=	O
"	O
2	O
"	O
Zen	O
3	O
TLBSYNC	O
NP	O
0F	O
01	O
FF	O
Synchronize	O
TLB	B-Architecture
invalidations.Wait	O
until	O
all	O
TLB	B-Architecture
invalidations	O
signalled	O
by	O
preceding	O
invocations	O
of	O
the	O
INVLPGB	O
instruction	O
on	O
the	O
same	O
logical	O
processor	O
have	O
been	O
responded	O
to	O
by	O
all	O
processors	O
in	O
the	O
system	O
.	O
</s>
<s>
The	O
x87	B-Application
coprocessor	O
,	O
if	O
present	O
,	O
provides	O
support	O
for	O
floating-point	B-Algorithm
arithmetic	I-Algorithm
.	O
</s>
<s>
The	O
coprocessor	O
provides	O
eight	O
data	O
registers	B-General_Concept
,	O
each	O
holding	O
one	O
80-bit	O
floating-point	B-Algorithm
value	O
(	O
1	O
sign	O
bit	O
,	O
15	O
exponent	O
bits	O
,	O
64	O
mantissa	O
bits	O
)	O
-	O
these	O
registers	B-General_Concept
are	O
organized	O
as	O
a	O
stack	B-Application
,	O
with	O
the	O
top-of-stack	O
register	O
referred	O
to	O
as	O
"	O
st	O
"	O
or	O
"	O
st(0 )	O
"	O
,	O
and	O
the	O
other	O
registers	B-General_Concept
referred	O
to	O
as	O
st(1 )	O
,	O
st(2 )	O
,...	O
st(7 )	O
.	O
</s>
<s>
It	O
additionally	O
provides	O
a	O
number	O
of	O
control	O
and	O
status	O
registers	B-General_Concept
,	O
including	O
"	O
PC	O
"	O
(	O
precision	O
control	O
,	O
to	O
control	O
whether	O
floating-point	B-Algorithm
operations	O
should	O
be	O
rounded	O
to	O
24	O
,	O
53	O
or	O
64	O
mantissa	O
bits	O
)	O
and	O
"	O
RC	O
"	O
(	O
rounding	O
control	O
,	O
to	O
pick	O
rounding-mode	O
:	O
round-to-zero	O
,	O
round-to-positive-infinity	O
,	O
round-to-negative-infinity	O
,	O
round-to-nearest-even	O
)	O
and	O
a	O
4-bit	O
condition	O
code	O
register	O
"	O
CC	O
"	O
,	O
whose	O
four	O
bits	O
are	O
individually	O
referred	O
to	O
as	O
C0	O
,	O
C1	O
,	O
C2	O
and	O
C3	O
)	O
.	O
</s>
<s>
Not	O
all	O
of	O
the	O
arithmetic	O
instructions	O
provided	O
by	O
x87	B-Application
obey	O
PC	O
and	O
RC	O
.	O
</s>
<s>
Same	O
operation	O
as	O
subtract	O
,	O
except	O
that	O
it	O
updates	O
the	O
x87	B-Application
CC	O
status	O
register	O
instead	O
of	O
any	O
of	O
the	O
FPU	O
stack	B-Application
registers	B-General_Concept
m32	O
D8	O
/2	O
rowspan	O
=	O
"	O
4	O
"	O
rowspan	O
=	O
"	O
4	O
"	O
m64	O
/2	O
st(i )	O
D8	O
D0+i	O
x87	B-Application
Basic	O
Arithmetic	O
Instructions	O
with	O
Stack	B-Application
Pop	O
precisioncontrol	O
roundingcontrol	O
Floating-point	B-Algorithm
add	O
and	O
pop	O
st(i )	O
,	O
st	O
C0+i	O
Floating-point	B-Algorithm
multiply	O
and	O
pop	O
st(i )	O
,	O
st	O
C8+i	O
Floating-point	B-Algorithm
subtract	O
and	O
pop	O
st(i )	O
,	O
st	O
E8+i	O
Floating-point	B-Algorithm
reverse-subtract	O
and	O
pop	O
st(i )	O
,	O
st	O
E0+i	O
Floating-point	B-Algorithm
divide	O
and	O
pop	O
st(i )	O
,	O
st	O
F8+i	O
Floating-point	B-Algorithm
reverse-divide	O
and	O
pop	O
st(i )	O
,	O
st	O
F0+i	O
Floating-point	B-Algorithm
compare	O
and	O
pop	O
m32	O
D8	O
/3	O
rowspan	O
=	O
"	O
5	O
"	O
rowspan	O
=	O
"	O
5	O
"	O
m64	O
/3	O
st(i )	O
D8	O
D8+i	O
Floating-point	B-Algorithm
compare	O
to	O
st(1 )	O
,	O
then	O
pop	O
twice	O
D9	O
x87	B-Application
Basic	O
Arithmetic	O
Instructions	O
with	O
Integer	O
Source	O
Argument	O
precisioncontrol	O
roundingcontrol	O
Floating-point	B-Algorithm
add	O
by	O
integer	O
m16	O
/0	O
rowspan	O
=	O
"	O
2	O
"	O
rowspan	O
=	O
"	O
2	O
"	O
m32	O
/0	O
Floating-point	B-Algorithm
multiply	O
by	O
integer	O
m16	O
/1	O
rowspan	O
=	O
"	O
2	O
"	O
rowspan	O
=	O
"	O
2	O
"	O
m32	O
/1	O
Floating-point	B-Algorithm
subtract	O
by	O
integer	O
m16	O
/4	O
rowspan	O
=	O
"	O
2	O
"	O
rowspan	O
=	O
"	O
2	O
"	O
m32	O
/4	O
Floating-point	B-Algorithm
reverse-subtract	O
by	O
integer	O
m16	O
/5	O
rowspan	O
=	O
"	O
2	O
"	O
rowspan	O
=	O
"	O
2	O
"	O
m32	O
/5	O
Floating-point	B-Algorithm
divide	O
by	O
integer	O
m16	O
/6	O
rowspan	O
=	O
"	O
2	O
"	O
rowspan	O
=	O
"	O
2	O
"	O
m32	O
/6	O
Floating-point	B-Algorithm
reverse-divide	O
by	O
integer	O
m16	O
/7	O
rowspan	O
=	O
"	O
2	O
"	O
rowspan	O
=	O
"	O
2	O
"	O
m32	O
/7	O
Floating-point	B-Algorithm
compare	O
to	O
integer	O
m16	O
/2	O
rowspan	O
=	O
"	O
2	O
"	O
rowspan	O
=	O
"	O
2	O
"	O
m32	O
/2	O
Floating-point	B-Algorithm
compare	O
to	O
integer	O
,	O
and	O
stack	B-Application
pop	O
m16	O
/3	O
rowspan	O
=	O
"	O
2	O
"	O
rowspan	O
=	O
"	O
2	O
"	O
m32	O
/3	O
x87	B-Application
Additional	O
Arithmetic	O
Instructions	O
precisioncontrol	O
roundingcontrol	O
Floating-point	B-Algorithm
change	O
sign	O
D9	O
E0	O
Floating-point	B-Algorithm
absolute	O
value	O
D9	O
E1	O
Floating-point	B-Algorithm
compare	O
top-of-stack	O
value	O
to	O
0	O
D9	O
E4	O
Classify	O
top-of-stack	O
st(0 )	O
register	O
value.The	O
classification	O
result	O
is	O
stored	O
in	O
the	O
x87	B-Application
CC	O
register	O
.	O
</s>
<s>
st(0 )	O
is	O
then	O
replaced	O
with	O
,	O
after	O
which	O
is	O
pushed	O
onto	O
the	O
stack	B-Application
.	O
</s>
<s>
D9	O
F4	O
Floating-point	B-Algorithm
partial	O
remainder	O
(	O
not	O
IEEE	O
754	O
compliant	O
)	O
:	O
</s>
<s>
D9	O
F8	O
Floating-point	B-Algorithm
square	O
root	O
D9	O
FA	O
Floating-point	B-Algorithm
round	O
to	O
integer	O
D9	O
FC	O
Floating-point	B-Algorithm
power-of-2	O
scaling	O
.	O
</s>
<s>
Instruction	O
description	O
Mnemonic	O
Opcode	B-Language
Additional	O
items	O
x87	B-Application
Non-Waiting	O
Control	O
Instructions	O
added	O
in	O
80287	O
Waitingmnemonic	O
Notify	O
FPU	O
of	O
entry	O
into	O
Protected	B-Application
Mode	I-Application
FNSETPM	O
DB	O
E4	O
FSETPM	O
Store	O
x87	B-Application
Status	O
Word	O
to	O
AX	O
FNSTSW	O
AX	O
DF	O
E0	O
FSTSW	O
AX	O
x87	B-Application
Instructions	O
added	O
in	O
80387	O
Floating-point	B-Algorithm
unordered	O
compare.Similar	O
to	O
the	O
regular	O
floating-point	B-Algorithm
compare	O
instruction	O
FCOM	O
,	O
except	O
will	O
not	O
produce	O
an	O
exception	O
in	O
response	O
to	O
any	O
qNaN	O
operands	O
.	O
</s>
<s>
FUCOM	O
st(i )	O
DD	O
E0+i	O
no	O
restrictions	O
Floating-point	B-Algorithm
unordered	O
compare	O
and	O
pop	O
FUCOMP	O
st(i )	O
DD	O
E8+i	O
Floating-point	B-Algorithm
unordered	O
compare	O
to	O
st(1 )	O
,	O
then	O
pop	O
twice	O
FUCOMPP	O
DA	O
E9	O
IEEE	O
754	O
compliant	O
floating-point	B-Algorithm
partial	O
remainder	O
.	O
</s>
<s>
FPREM1	O
D9	O
F5	O
Floating-point	B-Algorithm
sine	O
and	O
cosine.Computes	O
two	O
values	O
and	O
Top-of-stack	O
st(0 )	O
is	O
replaced	O
with	O
,	O
after	O
which	O
is	O
pushed	O
onto	O
the	O
stack	B-Application
.	O
</s>
<s>
FSINCOS	O
D9	O
FB	O
Floating-point	B-Algorithm
sine	O
.	O
</s>
<s>
FSIN	O
D9	O
FE	O
Floating-point	B-Algorithm
cosine	O
.	O
</s>
<s>
FCOS	O
D9	O
FF	O
x87	B-Application
Instructions	O
added	O
in	O
Pentium	B-Device
Pro	I-Device
Floating-point	B-Algorithm
conditional	O
move	O
to	O
st(0 )	O
based	O
on	O
EFLAGS	B-General_Concept
FCMOVB	O
st(0 )	O
,	O
st(i )	O
DA	O
C0+i	O
below	O
(	O
CF	O
=	O
1	O
)	O
FCMOVE	O
st(0 )	O
,	O
st(i )	O
DA	O
C8+i	O
equal	O
(	O
ZF	O
=	O
1	O
)	O
FCMOVBE	O
st(0 )	O
,	O
st(i )	O
DA	O
D0+i	O
below	O
or	O
equal( CF	O
=	O
1	O
or	O
ZF	O
=	O
1	O
)	O
FCMOVU	O
st(0 )	O
,	O
st(i )	O
DA	O
D8+i	O
unordered	O
(	O
PF	O
=	O
1	O
)	O
FCMOVNB	O
st(0 )	O
,	O
st(i )	O
DB	O
C0+i	O
not	O
below	O
(	O
CF	O
=	O
0	O
)	O
FCMOVNE	O
st(0 )	O
,	O
st(i )	O
DB	O
C8+i	O
not	O
equal	O
(	O
ZF	O
=	O
0	O
)	O
DB	O
D0+i	O
not	O
below	O
or	O
equal( CF	O
=	O
0	O
and	O
ZF	O
=	O
0	O
)	O
FCMOVNU	O
st(0 )	O
,	O
st(i )	O
DB	O
D8+i	O
not	O
unordered	O
(	O
PF	O
=	O
0	O
)	O
Floating-point	B-Algorithm
compare	B-Operating_System
and	I-Operating_System
set	I-Operating_System
EFLAGS.Differs	O
from	O
the	O
older	O
FCOM	O
floating-point	B-Algorithm
compare	O
instruction	O
in	O
that	O
it	O
puts	O
its	O
result	O
in	O
the	O
integer	O
EFLAGS	B-General_Concept
register	I-General_Concept
rather	O
than	O
the	O
x87	B-Application
CC	O
register	O
.	O
</s>
<s>
MMX	B-Architecture
instructions	O
operate	O
on	O
the	O
mm	O
registers	B-General_Concept
,	O
which	O
are	O
64	O
bits	O
wide	O
.	O
</s>
<s>
They	O
are	O
shared	O
with	O
the	O
FPU	O
registers	B-General_Concept
.	O
</s>
<s>
The	O
following	O
MMX	B-Architecture
instruction	O
were	O
added	O
with	O
SSE	B-General_Concept
.	O
</s>
<s>
They	O
are	O
also	O
available	O
on	O
the	O
Athlon	B-Architecture
under	O
the	O
name	O
MMX+	B-Device
.	O
</s>
<s>
The	O
following	O
MMX	B-Architecture
instructions	O
were	O
added	O
with	O
SSE2	B-General_Concept
:	O
</s>
<s>
Instruction	O
Opcode	B-Language
Meaning	O
PSIGNB	O
mm1	O
,	O
mm2/m64	O
0F	O
38	O
08	O
/r	O
Negate/zero/preserve	O
packed	O
byte	O
integers	O
depending	O
on	O
corresponding	O
sign	O
PSIGNW	O
mm1	O
,	O
mm2/m64	O
0F	O
38	O
09	O
/r	O
Negate/zero/preserve	O
packed	O
word	O
integers	O
depending	O
on	O
corresponding	O
sign	O
PSIGND	O
mm1	O
,	O
mm2/m64	O
0F	O
38	O
0A	O
/r	O
Negate/zero/preserve	O
packed	O
doubleword	O
integers	O
depending	O
on	O
corresponding	O
sign	O
PSHUFB	O
mm1	O
,	O
mm2/m64	O
0F	O
38	O
00	O
/r	O
Shuffle	O
bytes	O
PMULHRSW	O
mm1	O
,	O
mm2/m64	O
0F	O
38	O
0B	O
/r	O
Multiply	O
16-bit	O
signed	O
words	O
,	O
scale	O
and	O
round	O
signed	O
doublewords	O
,	O
pack	O
high	O
16	O
bits	O
PMADDUBSW	O
mm1	O
,	O
mm2/m64	O
0F	O
38	O
04	O
/r	O
Multiply	O
signed	O
and	O
unsigned	O
bytes	O
,	O
add	O
horizontal	O
pair	O
of	O
signed	O
words	O
,	O
pack	O
saturated	O
signed-words	O
PHSUBW	O
mm1	O
,	O
mm2/m64	O
0F	O
38	O
05	O
/r	O
Subtract	O
and	O
pack	O
16-bit	O
signed	O
integers	O
horizontally	O
PHSUBSW	O
mm1	O
,	O
mm2/m64	O
0F	O
38	O
07	O
/r	O
Subtract	O
and	O
pack	O
16-bit	O
signed	O
integer	O
horizontally	O
with	O
saturation	O
PHSUBD	O
mm1	O
,	O
mm2/m64	O
0F	O
38	O
06	O
/r	O
Subtract	O
and	O
pack	O
32-bit	O
signed	O
integers	O
horizontally	O
PHADDSW	O
mm1	O
,	O
mm2/m64	O
0F	O
38	O
03	O
/r	O
Add	O
and	O
pack	O
16-bit	O
signed	O
integers	O
horizontally	O
,	O
pack	O
saturated	O
integers	O
to	O
mm1	O
.	O
</s>
<s>
SSE	B-General_Concept
instructions	I-General_Concept
operate	O
on	O
xmm	O
registers	B-General_Concept
,	O
which	O
are	O
128	O
bit	O
wide	O
.	O
</s>
<s>
SSE	B-General_Concept
consists	O
of	O
the	O
following	O
SSE	B-General_Concept
SIMD	B-Device
floating-point	B-Algorithm
instructions	O
:	O
</s>
<s>
Instruction	O
Opcode	B-Language
Meaning	O
ANDPS*	O
xmm1	O
,	O
xmm2/m128	O
0F	O
54	O
/r	O
Bitwise	O
Logical	O
AND	O
of	O
Packed	O
Single-Precision	O
Floating-Point	B-Algorithm
Values	O
ANDNPS*	O
xmm1	O
,	O
xmm2/m128	O
0F	O
55	O
/r	O
Bitwise	O
Logical	O
AND	O
NOT	O
of	O
Packed	O
Single-Precision	O
Floating-Point	B-Algorithm
Values	O
ORPS*	O
xmm1	O
,	O
xmm2/m128	O
0F	O
56	O
/r	O
Bitwise	O
Logical	O
OR	O
of	O
Single-Precision	O
Floating-Point	B-Algorithm
Values	O
XORPS*	O
xmm1	O
,	O
xmm2/m128	O
0F	O
57	O
/r	O
Bitwise	O
Logical	O
XOR	O
for	O
Single-Precision	O
Floating-Point	B-Algorithm
Values	O
MOVUPS	O
xmm1	O
,	O
xmm2/m128	O
0F	O
10	O
/r	O
Move	O
Unaligned	O
Packed	O
Single-Precision	O
Floating-Point	B-Algorithm
Values	O
MOVSS	O
xmm1	O
,	O
xmm2/m32	O
F3	O
0F	O
10	O
/r	O
Move	O
Scalar	O
Single-Precision	O
Floating-Point	B-Algorithm
Values	O
MOVUPS	O
xmm2/m128	O
,	O
xmm1	O
0F	O
11	O
/r	O
Move	O
Unaligned	O
Packed	O
Single-Precision	O
Floating-Point	B-Algorithm
Values	O
MOVSS	O
xmm2/m32	O
,	O
xmm1	O
F3	O
0F	O
11	O
/r	O
Move	O
Scalar	O
Single-Precision	O
Floating-Point	B-Algorithm
Values	O
MOVLPS	O
xmm	O
,	O
m64	O
0F	O
12	O
/r	O
Move	O
Low	O
Packed	O
Single-Precision	O
Floating-Point	B-Algorithm
Values	O
MOVHLPS	O
xmm1	O
,	O
xmm2	O
0F	O
12	O
/r	O
Move	O
Packed	O
Single-Precision	O
Floating-Point	B-Algorithm
Values	O
High	O
to	O
Low	O
MOVLPS	O
m64	O
,	O
xmm	O
0F	O
13	O
/r	O
Move	O
Low	O
Packed	O
Single-Precision	O
Floating-Point	B-Algorithm
Values	O
UNPCKLPS	O
xmm1	O
,	O
xmm2/m128	O
0F	O
14	O
/r	O
Unpack	O
and	O
Interleave	O
Low	O
Packed	O
Single-Precision	O
Floating-Point	B-Algorithm
Values	O
UNPCKHPS	O
xmm1	O
,	O
xmm2/m128	O
0F	O
15	O
/r	O
Unpack	O
and	O
Interleave	O
High	O
Packed	O
Single-Precision	O
Floating-Point	B-Algorithm
Values	O
MOVHPS	O
xmm	O
,	O
m64	O
0F	O
16	O
/r	O
Move	O
High	O
Packed	O
Single-Precision	O
Floating-Point	B-Algorithm
Values	O
MOVLHPS	O
xmm1	O
,	O
xmm2	O
0F	O
16	O
/r	O
Move	O
Packed	O
Single-Precision	O
Floating-Point	B-Algorithm
Values	O
Low	O
to	O
High	O
MOVHPS	O
m64	O
,	O
xmm	O
0F	O
17	O
/r	O
Move	O
High	O
Packed	O
Single-Precision	O
Floating-Point	B-Algorithm
Values	O
MOVAPS	O
xmm1	O
,	O
xmm2/m128	O
0F	O
28	O
/r	O
Move	O
Aligned	O
Packed	O
Single-Precision	O
Floating-Point	B-Algorithm
Values	O
MOVAPS	O
xmm2/m128	O
,	O
xmm1	O
0F	O
29	O
/r	O
Move	O
Aligned	O
Packed	O
Single-Precision	O
Floating-Point	B-Algorithm
Values	O
MOVNTPS	O
m128	O
,	O
xmm1	O
0F	O
2B	O
/r	O
Move	O
Aligned	O
Four	O
Packed	O
Single-FP	O
Non	O
Temporal	O
MOVMSKPS	O
reg	O
,	O
xmm	O
0F	O
50	O
/r	O
Extract	O
Packed	O
Single-Precision	O
Floating-Point	B-Algorithm
4-bit	O
Sign	O
Mask	O
.	O
</s>
<s>
The	O
floating	B-Algorithm
point	I-Algorithm
single	O
bitwise	O
operations	O
ANDPS	O
,	O
ANDNPS	O
,	O
ORPS	O
and	O
XORPS	O
produce	O
the	O
same	O
result	O
as	O
the	O
SSE2	B-General_Concept
integer	O
(	O
PAND	O
,	O
PANDN	O
,	O
POR	O
,	O
PXOR	O
)	O
and	O
double	O
ones	O
(	O
ANDPD	O
,	O
ANDNPD	O
,	O
ORPD	O
,	O
XORPD	O
)	O
,	O
but	O
can	O
introduce	O
extra	O
latency	O
for	O
domain	O
changes	O
when	O
applied	O
values	O
of	O
the	O
wrong	O
type	O
.	O
</s>
<s>
CMPSD	O
and	O
MOVSD	O
have	O
the	O
same	O
name	O
as	O
the	O
string	O
instruction	O
mnemonics	O
CMPSD	O
(	O
CMPS	O
)	O
and	O
MOVSD	O
(	O
MOVS	O
)	O
;	O
however	O
,	O
the	O
former	O
refer	O
to	O
scalar	O
double-precision	O
floating-points	B-Algorithm
whereas	O
the	O
latters	O
refer	O
to	O
doubleword	O
strings	O
.	O
</s>
<s>
SSE2	B-General_Concept
allows	O
execution	O
of	O
MMX	B-Architecture
instructions	O
on	O
SSE	B-General_Concept
registers	B-General_Concept
,	O
processing	O
twice	O
the	O
amount	O
of	O
data	O
at	O
once	O
.	O
</s>
<s>
Instruction	O
Opcode	B-Language
Meaning	O
Move	O
doubleword	O
Move	O
doubleword	O
Move	O
quadword	O
Move	O
quadword	O
66	O
REX.W	O
0F	O
7E	O
/r	O
Move	O
quadword	O
Move	O
quadword	O
Move	O
a	O
byte	O
mask	O
,	O
zeroing	O
the	O
upper	O
bits	O
of	O
the	O
register	O
Extract	O
specified	O
word	O
and	O
move	O
it	O
to	O
reg	O
,	O
setting	O
bits	O
15-0	O
and	O
zeroing	O
the	O
rest	O
Move	O
low	O
word	O
at	O
the	O
specified	O
word	O
position	O
Converts	O
4	O
packed	O
signed	O
doubleword	O
integers	O
into	O
8	O
packed	O
signed	O
word	O
integers	O
with	O
saturation	O
Converts	O
8	O
packed	O
signed	O
word	O
integers	O
into	O
16	O
packed	O
signed	O
byte	O
integers	O
with	O
saturation	O
Converts	O
8	O
signed	O
word	O
integers	O
into	O
16	O
unsigned	O
byte	O
integers	O
with	O
saturation	O
Add	O
packed	O
byte	O
integers	O
Add	O
packed	O
word	O
integers	O
Add	O
packed	O
doubleword	O
integers	O
Add	O
packed	O
quadword	O
integers	O
.	O
</s>
<s>
Instruction	O
Opcode	B-Language
Meaning	O
MASKMOVDQU	O
xmm1	O
,	O
xmm2	O
66	O
0F	O
F7	O
/r	O
Non-Temporal	O
Store	O
of	O
Selected	O
Bytes	O
from	O
an	O
XMM	O
Register	O
into	O
Memory	O
MOVDQ2Q	O
mm	O
,	O
xmm	O
F2	O
0F	O
D6	O
/r	O
Move	O
low	O
quadword	O
from	O
XMM	O
to	O
MMX	B-Architecture
register	O
.	O
</s>
<s>
MOVDQA	O
xmm1	O
,	O
xmm2/m128	O
66	O
0F	O
6F	O
/r	O
Move	O
aligned	O
double	O
quadword	O
MOVDQA	O
xmm2/m128	O
,	O
xmm1	O
66	O
0F	O
7F	O
/r	O
Move	O
aligned	O
double	O
quadword	O
MOVDQU	O
xmm1	O
,	O
xmm2/m128	O
F3	O
0F	O
6F	O
/r	O
Move	O
unaligned	O
double	O
quadword	O
MOVDQU	O
xmm2/m128	O
,	O
xmm1	O
F3	O
0F	O
7F	O
/r	O
Move	O
unaligned	O
double	O
quadword	O
MOVQ2DQ	O
xmm	O
,	O
mm	O
F3	O
0F	O
D6	O
/r	O
Move	O
quadword	O
from	O
MMX	B-Architecture
register	O
to	O
low	O
quadword	O
of	O
XMM	O
register	O
MOVNTDQ	O
m128	O
,	O
xmm1	O
66	O
0F	O
E7	O
/r	O
Store	O
Packed	O
Integers	O
Using	O
Non-Temporal	O
Hint	O
PSHUFHW	O
xmm1	O
,	O
xmm2/m128	O
,	O
imm8	O
F3	O
0F	O
70	O
/r	O
ib	O
Shuffle	O
packed	O
high	O
words	O
.	O
</s>
<s>
Instruction	O
Opcode	B-Language
Meaning	O
Notes	O
LDDQU	O
xmm1	O
,	O
mem	O
F2	O
0F	O
F0	O
/r	O
Load	O
unaligned	O
data	O
and	O
return	O
double	O
quadword	O
Instructionally	O
equivalent	O
to	O
MOVDQU	O
.	O
</s>
<s>
Instruction	O
Opcode	B-Language
Meaning	O
MPSADBW	O
xmm1	O
,	O
xmm2/m128	O
,	O
imm8	O
66	O
0F	O
3A	O
42	O
/r	O
ib	O
Sums	O
absolute	O
8-bit	O
integer	O
difference	O
of	O
adjacent	O
groups	O
of	O
4	O
byte	O
integers	O
with	O
starting	O
offset	O
PHMINPOSUW	O
xmm1	O
,	O
xmm2/m128	O
66	O
0F	O
38	O
41	O
/r	O
Find	O
the	O
minimum	O
unsigned	O
word	O
PMULLD	O
xmm1	O
,	O
xmm2/m128	O
66	O
0F	O
38	O
40	O
/r	O
Multiply	O
the	O
packed	O
dword	O
signed	O
integers	O
and	O
store	O
the	O
low	O
32	O
bits	O
PMULDQ	O
xmm1	O
,	O
xmm2/m128	O
66	O
0F	O
38	O
28	O
/r	O
Multiply	O
packed	O
signed	O
doubleword	O
integers	O
and	O
store	O
quadword	O
result	O
PBLENDVB	O
xmm1	O
,	O
xmm2/m128	O
,	O
<XMM0>	O
66	O
0F	O
38	O
10	O
/r	O
Select	O
byte	O
values	O
from	O
specified	O
mask	O
PBLENDW	O
xmm1	O
,	O
xmm2/m128	O
,	O
imm8	O
66	O
0F	O
3A	O
0E	O
/r	O
ib	O
Select	O
words	O
from	O
specified	O
mask	O
PMINSB	O
xmm1	O
,	O
xmm2/m128	O
66	O
0F	O
38	O
38	O
/r	O
Compare	O
packed	O
signed	O
byte	O
integers	O
PMINUW	O
xmm1	O
,	O
xmm2/m128	O
66	O
0F	O
38	O
3A/r	O
Compare	O
packed	O
unsigned	O
word	O
integers	O
PMINSD	O
xmm1	O
,	O
xmm2/m128	O
66	O
0F	O
38	O
39	O
/r	O
Compare	O
packed	O
signed	O
dword	O
integers	O
PMINUD	O
xmm1	O
,	O
xmm2/m128	O
66	O
0F	O
38	O
3B	O
/r	O
Compare	O
packed	O
unsigned	O
dword	O
integers	O
PMAXSB	O
xmm1	O
,	O
xmm2/m128	O
66	O
0F	O
38	O
3C	O
/r	O
Compare	O
packed	O
signed	O
byte	O
integers	O
PMAXUW	O
xmm1	O
,	O
xmm2/m128	O
66	O
0F	O
38	O
3E/r	O
Compare	O
packed	O
unsigned	O
word	O
integers	O
PMAXSD	O
xmm1	O
,	O
xmm2/m128	O
66	O
0F	O
38	O
3D	O
/r	O
Compare	O
packed	O
signed	O
dword	O
integers	O
PMAXUD	O
xmm1	O
,	O
xmm2/m128	O
66	O
0F	O
38	O
3F	O
/r	O
Compare	O
packed	O
unsigned	O
dword	O
integers	O
PINSRB	O
xmm1	O
,	O
r32/m8	O
,	O
imm8	O
66	O
0F	O
3A	O
20	O
/r	O
ib	O
Insert	O
a	O
byte	O
integer	O
value	O
at	O
specified	O
destination	O
element	O
PINSRD	O
xmm1	O
,	O
r/m32	O
,	O
imm8	O
66	O
0F	O
3A	O
22	O
/r	O
ib	O
Insert	O
a	O
dword	O
integer	O
value	O
at	O
specified	O
destination	O
element	O
PINSRQ	O
xmm1	O
,	O
r/m64	O
,	O
imm8	O
66	O
REX.W	O
0F	O
3A	O
22	O
/r	O
ib	O
Insert	O
a	O
qword	O
integer	O
value	O
at	O
specified	O
destination	O
element	O
PEXTRB	O
reg/m8	O
,	O
xmm2	O
,	O
imm8	O
66	O
0F	O
3A	O
14	O
/r	O
ib	O
Extract	O
a	O
byte	O
integer	O
value	O
at	O
source	O
byte	O
offset	O
,	O
upper	O
bits	O
are	O
zeroed	O
.	O
</s>
<s>
Instruction	O
Opcode	B-Language
Meaning	O
PCMPESTRI	O
xmm1	O
,	O
xmm2/m128	O
,	O
imm8	O
66	O
0F	O
3A	O
61	O
/r	O
imm8	O
Packed	O
comparison	O
of	O
string	O
data	O
with	O
explicit	O
lengths	O
,	O
generating	O
an	O
index	O
PCMPESTRM	O
xmm1	O
,	O
xmm2/m128	O
,	O
imm8	O
66	O
0F	O
3A	O
60	O
/r	O
imm8	O
Packed	O
comparison	O
of	O
string	O
data	O
with	O
explicit	O
lengths	O
,	O
generating	O
a	O
mask	O
PCMPISTRI	O
xmm1	O
,	O
xmm2/m128	O
,	O
imm8	O
66	O
0F	O
3A	O
63	O
/r	O
imm8	O
Packed	O
comparison	O
of	O
string	O
data	O
with	O
implicit	O
lengths	O
,	O
generating	O
an	O
index	O
PCMPISTRM	O
xmm1	O
,	O
xmm2/m128	O
,	O
imm8	O
66	O
0F	O
3A	O
62	O
/r	O
imm8	O
Packed	O
comparison	O
of	O
string	O
data	O
with	O
implicit	O
lengths	O
,	O
generating	O
a	O
mask	O
PCMPGTQ	O
xmm1	O
,	O
xmm2/m128	O
66	O
0F	O
38	O
37	O
/r	O
Compare	O
packed	O
signed	O
qwords	O
for	O
greater	O
than	O
.	O
</s>
<s>
Half-precision	O
floating-point	B-Algorithm
conversion	O
.	O
</s>
<s>
Supported	O
in	O
AMD	O
processors	O
starting	O
with	O
the	O
Piledriver	O
architecture	O
and	O
Intel	O
starting	O
with	O
Haswell	B-Device
processors	O
and	O
Broadwell	B-General_Concept
processors	O
since	O
2014	O
.	O
</s>
<s>
Fused	O
multiply-add	O
(	O
floating-point	B-Algorithm
vector	O
multiply	O
–	O
accumulate	O
)	O
with	O
three	O
operands	O
.	O
</s>
<s>
AVX	B-General_Concept
were	O
first	O
supported	O
by	O
Intel	O
with	O
Sandy	B-Device
Bridge	I-Device
and	O
by	O
AMD	O
with	O
Bulldozer	O
.	O
</s>
<s>
Vector	O
operations	O
on	O
256	O
bit	O
registers	B-General_Concept
.	O
</s>
<s>
VMASKMOVPS	O
Conditionally	O
reads	O
any	O
number	O
of	O
elements	O
from	O
a	O
SIMD	B-Device
vector	O
memory	O
operand	O
into	O
a	O
destination	O
register	O
,	O
leaving	O
the	O
remaining	O
vector	O
elements	O
unread	O
and	O
setting	O
the	O
corresponding	O
elements	O
in	O
the	O
destination	O
register	O
to	O
zero	O
.	O
</s>
<s>
Alternatively	O
,	O
conditionally	O
writes	O
any	O
number	O
of	O
elements	O
from	O
a	O
SIMD	B-Device
vector	O
register	O
operand	O
to	O
a	O
vector	O
memory	O
operand	O
,	O
leaving	O
the	O
remaining	O
elements	O
of	O
the	O
memory	O
operand	O
unchanged	O
.	O
</s>
<s>
VZEROALL	O
Set	O
all	O
YMM	O
registers	B-General_Concept
to	O
zero	O
and	O
tag	O
them	O
as	O
unused	O
.	O
</s>
<s>
VZEROUPPER	O
Set	O
the	O
upper	O
half	O
of	O
all	O
YMM	O
registers	B-General_Concept
to	O
zero	O
.	O
</s>
<s>
Introduced	O
in	O
Intel	O
's	O
Haswell	B-Device
microarchitecture	I-Device
and	O
AMD	O
's	O
Excavator	O
.	O
</s>
<s>
VGATHERDPD	O
Gathers	B-General_Concept
single	O
or	O
double	O
precision	O
floating	B-Algorithm
point	I-Algorithm
values	I-Algorithm
using	O
either	O
32	O
or	O
64-bit	O
indices	O
and	O
scale	O
.	O
</s>
<s>
VGATHERQPD	O
VGATHERDPS	O
VGATHERQPS	O
VPGATHERDD	O
Gathers	B-General_Concept
32	O
or	O
64-bit	O
integer	O
values	O
using	O
either	O
32	O
or	O
64-bit	O
indices	O
and	O
scale	O
.	O
</s>
<s>
VPGATHERDQ	O
VPGATHERQD	O
VPGATHERQQ	O
VPMASKMOVD	O
Conditionally	O
reads	O
any	O
number	O
of	O
elements	O
from	O
a	O
SIMD	B-Device
vector	O
memory	O
operand	O
into	O
a	O
destination	O
register	O
,	O
leaving	O
the	O
remaining	O
vector	O
elements	O
unread	O
and	O
setting	O
the	O
corresponding	O
elements	O
in	O
the	O
destination	O
register	O
to	O
zero	O
.	O
</s>
<s>
Alternatively	O
,	O
conditionally	O
writes	O
any	O
number	O
of	O
elements	O
from	O
a	O
SIMD	B-Device
vector	O
register	O
operand	O
to	O
a	O
vector	O
memory	O
operand	O
,	O
leaving	O
the	O
remaining	O
elements	O
of	O
the	O
memory	O
operand	O
unchanged	O
.	O
</s>
<s>
VPBLENDD	O
Doubleword	O
immediate	O
version	O
of	O
the	O
PBLEND	O
instructions	O
from	O
SSE4	B-General_Concept
.	O
</s>
<s>
AVX-512	B-General_Concept
,	O
introduced	O
in	O
2014	O
,	O
adds	O
512-bit	O
wide	O
vector	O
registers	B-General_Concept
(	O
extending	O
the	O
256-bit	O
registers	B-General_Concept
,	O
which	O
become	O
the	O
new	O
registers	B-General_Concept
 '	O
lower	O
halves	O
)	O
and	O
doubles	O
their	O
count	O
to	O
32	O
;	O
the	O
new	O
registers	B-General_Concept
are	O
thus	O
named	O
zmm0	O
through	O
zmm31	O
.	O
</s>
<s>
It	O
adds	O
eight	O
mask	O
registers	B-General_Concept
,	O
named	O
k0	O
through	O
k7	B-Architecture
,	O
which	O
may	O
be	O
used	O
to	O
restrict	O
operations	O
to	O
specific	O
parts	O
of	O
a	O
vector	O
register	O
.	O
</s>
<s>
Unlike	O
previous	O
instruction	B-General_Concept
set	I-General_Concept
extensions	O
,	O
AVX-512	B-General_Concept
is	O
implemented	O
in	O
several	O
groups	O
;	O
only	O
the	O
foundation	O
(	O
"	O
AVX-512F	O
"	O
)	O
extension	O
is	O
mandatory	O
.	O
</s>
<s>
Most	O
of	O
the	O
added	O
instructions	O
may	O
also	O
be	O
used	O
with	O
the	O
256	O
-	O
and	O
128-bit	O
registers	B-General_Concept
.	O
</s>
<s>
Instruction	O
Opcode	B-Language
Description	O
66	O
0f	O
3a	O
44	O
/r	O
ib	O
Perform	O
a	O
carry-less	O
multiplication	O
of	O
two	O
64-bit	O
polynomials	O
over	O
the	O
finite	O
field	O
GF(2k )	O
.	O
</s>
<s>
PCLMULLQLQDQ	B-Device
xmmreg	O
,	O
xmmrm	O
Multiply	O
the	O
low	O
halves	O
of	O
the	O
two	O
registers	B-General_Concept
.	O
</s>
<s>
PCLMULHQLQDQ	B-Device
xmmreg	O
,	O
xmmrm	O
66	O
0f	O
3a	O
44	O
/r	O
01	O
Multiply	O
the	O
high	O
half	O
of	O
the	O
destination	O
register	O
by	O
the	O
low	O
half	O
of	O
the	O
source	O
register	O
.	O
</s>
<s>
PCLMULHQHQDQ	O
xmmreg	O
,	O
xmmrm	O
66	O
0f	O
3a	O
44	O
/r	O
11	O
Multiply	O
the	O
high	O
halves	O
of	O
the	O
two	O
registers	B-General_Concept
.	O
</s>
<s>
These	O
instructions	O
,	O
available	O
in	O
Tiger	B-Device
Lake	I-Device
and	O
later	O
Intel	O
processors	O
,	O
are	O
designed	O
to	O
enable	O
encryption/decryption	O
with	O
an	O
AES	B-Algorithm
key	I-Algorithm
without	O
having	O
access	O
to	O
any	O
unencrypted	O
copies	O
of	O
the	O
key	O
during	O
the	O
actual	O
encryption/decryption	O
process	O
.	O
</s>
<s>
EAX	O
contains	O
flags	B-General_Concept
controlling	O
operation	O
of	O
instruction.After	O
being	O
loaded	O
,	O
the	O
IWKey	O
cannot	O
be	O
directly	O
read	O
from	O
software	O
,	O
but	O
is	O
used	O
for	O
the	O
key	O
wrapping	O
done	O
byENCODEKEY128/256	O
and	O
checked	O
by	O
the	O
Key	O
Locker	O
encode/decode	O
instructions.LOADIWKEY	O
is	O
privileged	O
and	O
can	O
run	O
in	O
Ring	B-Operating_System
0	I-Operating_System
only	O
.	O
</s>
<s>
ENCODEKEY128	O
r32	O
,	O
r32	O
F3	O
0F	O
38	O
FA	O
/r	O
Wrap	O
a	O
128-bit	O
AES	B-Algorithm
key	I-Algorithm
from	O
XMM0	O
into	O
a	O
384-bit	O
key	O
handle	O
and	O
output	O
handle	O
in	O
XMM0-2	O
.	O
</s>
<s>
ENCODEKEY256	O
r32	O
,	O
32	O
F3	O
0F	O
3A	O
FB	O
/r	O
Wrap	O
a	O
256-bit	O
AES	B-Algorithm
key	I-Algorithm
from	O
XMM1:XMM0	O
into	O
a	O
512-bit	O
key	O
handle	O
and	O
output	O
handle	O
in	O
XMM0-3	O
.	O
</s>
<s>
AESENC128KL	O
xmm	O
,	O
m384	O
F3	O
0F	O
38	O
DC	O
/r	O
Encrypt	O
xmm	O
using	O
128-bit	O
AES	B-Algorithm
key	I-Algorithm
indicated	O
by	O
handle	O
at	O
m384	O
and	O
store	O
result	O
in	O
xmm	O
.	O
</s>
<s>
F3	O
0F	O
38	O
DD	O
/r	O
Decrypt	O
xmm	O
using	O
128-bit	O
AES	B-Algorithm
key	I-Algorithm
indicated	O
by	O
handle	O
at	O
m384	O
and	O
store	O
result	O
in	O
xmm	O
.	O
</s>
<s>
AESENC256KL	O
xmm	O
,	O
m512	O
F3	O
0F	O
38	O
DE	O
/r	O
Encrypt	O
xmm	O
using	O
256-bit	O
AES	B-Algorithm
key	I-Algorithm
indicated	O
by	O
handle	O
at	O
m512	O
and	O
store	O
result	O
in	O
xmm	O
.	O
</s>
<s>
AESDEC256KL	O
xmm	O
,	O
m512	O
F3	O
0F	O
38	O
DF	O
/r	O
Decrypt	O
xmm	O
using	O
256-bit	O
AES	B-Algorithm
key	I-Algorithm
indicated	O
by	O
handle	O
at	O
m512	O
and	O
store	O
result	O
in	O
xmm	O
.	O
</s>
<s>
AESENCWIDE128KL	O
m384	O
F3	O
0F	O
38	O
D8	O
/0	O
Encrypt	O
XMM0-7	O
using	O
128-bit	O
AES	B-Algorithm
key	I-Algorithm
indicated	O
by	O
handle	O
at	O
m384	O
and	O
store	O
each	O
resultant	O
block	O
back	O
to	O
its	O
corresponding	O
register	O
.	O
</s>
<s>
F3	O
0F	O
38	O
D8	O
/1	O
Decrypt	O
XMM0-7	O
using	O
128-bit	O
AES	B-Algorithm
key	I-Algorithm
indicated	O
by	O
handle	O
at	O
m384	O
and	O
store	O
each	O
resultant	O
block	O
back	O
to	O
its	O
corresponding	O
register	O
.	O
</s>
<s>
AESENCWIDE256KL	O
m512	O
F3	O
0F	O
38	O
D8	O
/2	O
Encrypt	O
XMM0-7	O
using	O
256-bit	O
AES	B-Algorithm
key	I-Algorithm
indicated	O
by	O
handle	O
at	O
m512	O
and	O
store	O
each	O
resultant	O
block	O
back	O
to	O
its	O
corresponding	O
register	O
.	O
</s>
<s>
AESDECWIDE256KL	O
m512	O
F3	O
0F	O
38	O
D8	O
/3	O
Decrypt	O
XMM0-7	O
using	O
256-bit	O
AES	B-Algorithm
key	I-Algorithm
indicated	O
by	O
handle	O
at	O
m512	O
and	O
store	O
each	O
resultant	O
block	O
back	O
to	O
its	O
corresponding	O
register	O
.	O
</s>
<s>
The	O
VIA	B-Device
PadLock	I-Device
instructions	O
are	O
instructions	O
designed	O
to	O
apply	O
cryptographic	O
primitives	O
in	O
bulk	O
,	O
similar	O
to	O
the	O
8086	O
repeated	O
string	O
instructions	O
.	O
</s>
<s>
Nehemiah	B-Device
REP	O
XSTORE	O
REP	O
XCRYPTECB	O
F3	O
0F	O
A7	O
C8	O
Encrypt/Decrypt	O
data	O
,	O
using	O
the	O
AES	B-Algorithm
cipher	I-Algorithm
in	O
various	O
block	B-Algorithm
modes	I-Algorithm
(	O
ECB	O
,	O
CBC	O
,	O
CFB	O
,	O
OFB	O
and	O
CTR	O
,	O
respectively	O
)	O
.	O
</s>
<s>
rCX	O
contains	O
the	O
number	O
of	O
16-byte	O
blocks	O
to	O
encrypt/decrypt	O
,	O
rBX	O
contains	O
a	O
pointer	O
to	O
an	O
encryption	O
key	O
,	O
rAX	O
a	O
pointer	O
to	O
an	O
initialization	O
vector	O
for	O
block	B-Algorithm
modes	I-Algorithm
that	O
need	O
it	O
,	O
and	O
rDX	O
a	O
pointer	O
to	O
a	O
control	O
word	O
.	O
</s>
<s>
Nehemiah	B-Device
F3	O
0F	O
A7	O
D0	O
REP	O
XCRYPTCFB	O
F3	O
0F	O
A7	O
E0	O
REP	O
XCRYPTOFB	O
F3	O
0F	O
A7	O
E8	O
REP	O
XCRYPTCTR	O
F3	O
0F	O
A7	O
D8	O
REP	O
XSHA1	O
F3	O
0F	O
A6	O
C8	O
Compute	O
a	O
cryptographic	O
hash	O
(	O
using	O
the	O
SHA-1	B-Algorithm
and	O
SHA-256	B-Algorithm
functions	O
,	O
respectively	O
)	O
.	O
</s>
<s>
Esther	B-Device
REP	O
XSHA256	O
F3	O
0F	O
A6	O
D0	O
REP	O
MONTMUL	O
F3	O
0F	O
A6	O
C0	O
Perform	O
Montgomery	B-Algorithm
Multiplication	I-Algorithm
.	O
</s>
<s>
Esther	B-Device
CCS_HASH	O
F3	O
0F	O
A6	O
E8	O
Compute	O
SM3	B-Algorithm
hash	O
,	O
similar	O
to	O
the	O
REP	O
XSHA*	O
instructions	O
.	O
</s>
<s>
The	O
rBX	O
register	O
is	O
used	O
to	O
specify	O
hash	O
function	O
(	O
20h	O
for	O
SM3	B-Algorithm
being	O
the	O
only	O
documented	O
value	O
)	O
.	O
</s>
<s>
ZhangJiang	B-Device
CCS_ENCRYPT	O
F3	O
0F	O
A7	O
F0	O
Encrypt/Decrypt	O
data	O
,	O
using	O
the	O
SM4	B-Algorithm
cipher	O
in	O
various	O
block	B-Algorithm
modes	I-Algorithm
.	O
</s>
<s>
rCX	O
contains	O
the	O
number	O
of	O
16-byte	O
blocks	O
to	O
encrypt/decrypt	O
,	O
rBX	O
contains	O
a	O
pointer	O
to	O
an	O
encryption	O
key	O
,	O
rDX	O
a	O
pointer	O
to	O
an	O
initialization	O
vector	O
for	O
block	B-Algorithm
modes	I-Algorithm
that	O
need	O
it	O
,	O
and	O
rAX	O
contains	O
a	O
control	O
word	O
.	O
</s>
<s>
x86	B-Operating_System
also	O
includes	O
discontinued	O
instruction	B-General_Concept
sets	I-General_Concept
which	O
are	O
no	O
longer	O
supported	O
by	O
Intel	O
and	O
AMD	O
,	O
and	O
undocumented	B-Language
instructions	I-Language
which	O
execute	O
but	O
are	O
not	O
officially	O
documented	O
.	O
</s>
<s>
Instruction	O
Opcode	B-Language
Instruction	O
Description	O
Used	O
by	O
Added	O
in	O
Basic	O
SVM	O
(	O
Secure	O
Virtual	O
Machine	O
)	O
instructionsAMD	O
,	O
AMD64	B-Device
Virtualization	O
Codenamed	O
“	O
Pacifica	O
”	O
Technology	O
,	O
publication	O
no	O
.	O
</s>
<s>
0F	O
01	O
DF	O
Invalidate	O
TLB	B-Architecture
mappings	O
for	O
the	O
virtual	O
page	O
specified	O
in	O
RAX	O
and	O
the	O
ASID	O
(	O
Address	O
Space	O
IDentifier	O
)	O
specified	O
in	O
ECX	O
.	O
</s>
<s>
rowspan	O
=	O
"	O
2	O
"	O
K8	B-Device
VMRUN	O
rAX	O
0F	O
01	O
D8	O
Run	O
virtual	O
machine	O
managed	O
by	O
the	O
VMCB	O
(	O
Virtual	O
Machine	O
Control	O
Block	O
)	O
specified	O
by	O
physical	O
address	O
in	O
rAX	O
.	O
</s>
<s>
STGI	O
0F	O
01	O
DC	O
Set	O
GIF	O
(	O
Global	O
Interrupt	B-Device
Flag	I-Device
)	O
.	O
</s>
<s>
Turion	O
"	O
Lion	O
"	O
,	O
CPU-World	O
,	O
CPUID	B-Architecture
for	O
AMD	O
Turion	O
64	O
X2	O
RM-75	O
,	O
2022-03-05.	O
,	O
Secure	O
Encrypted	O
Virtualization	O
(	O
SEV	O
)	O
:	O
Encrypted	O
State	O
(	O
SEV-ES	O
)	O
instructions	O
VMGEXIT	O
SEV-ES	O
Exit	O
to	O
VMM.Explicit	O
communication	O
with	O
the	O
VMM	B-Operating_System
for	O
SEV-ES	O
VMs	O
.	O
</s>
<s>
Zen	O
1	O
Secure	O
Nested	B-Device
Paging	I-Device
(	O
SEV-SNP	O
)	O
:	O
Reverse-Map	O
Table	O
(	O
RMP	O
)	O
instructions	O
PSMASH	O
F3	O
0F	O
01	O
FF	O
Page	O
Smash	O
:	O
expands	O
a	O
2MB-page	O
RMP	O
entry	O
into	O
a	O
corresponding	O
set	O
of	O
contiguous	O
4KB-page	O
RMP	O
entries	O
.	O
</s>
<s>
VT-x	O
is	O
also	O
supported	O
on	O
some	O
processors	O
from	O
VIA	O
and	O
Zhaoxin	B-Device
.	O
</s>
<s>
Instruction	O
Opcode	B-Language
Instruction	O
Description	O
Used	O
by	O
Added	O
in	O
Basic	O
VMX	O
(	O
Virtual	O
Machine	O
Extensions	O
)	O
instructions	O
VMXON	O
m64	O
F3	O
0F	O
C7	O
/6	O
Enter	O
VMX	O
Operation	O
-	O
enters	O
hardware	O
supported	O
virtualisation	O
environment	O
.	O
</s>
<s>
rowspan	O
=	O
"	O
7	O
"	O
,	O
Yonah	B-Device
,	O
Centerton	O
,	O
Nano	B-Device
3000	I-Device
VMXOFF	O
NP	O
0F	O
01	O
C4	O
Leave	O
VMX	O
Operation	O
-	O
stops	O
hardware	O
supported	O
virtualisation	O
environment	O
.	O
</s>
<s>
Extended	B-Device
Page	I-Device
Tables	I-Device
(	O
EPT	O
)	O
instructions	O
INVEPT	O
reg	O
,	O
m128	O
Invalidates	O
EPT-derived	O
entries	O
in	O
the	O
TLBs	O
and	O
paging-structure	O
caches	O
.	O
</s>
<s>
rowspan	O
=	O
"	O
2	O
"	O
Nehalem	B-Device
,	O
Centerton	O
,	O
Intel	O
,	O
Intel®	O
Atom™	O
Processor	O
S1200	O
Product	O
Family	O
for	O
Microserver	O
Datasheet	O
,	O
Volume	O
1	O
of	O
2	O
,	O
order	O
no	O
.	O
</s>
<s>
}}	O
Haswell	B-Device
,	O
Silvermont	B-Device
Trust	O
Domain	O
Extensions	O
(	O
TDX	O
)	O
:	O
Secure	O
Arbitration	O
Mode	O
(	O
SEAM	O
)	O
instructions	O
SEAMOPS	O
66	O
0F	O
01	O
CE	O
Invoke	O
SEAM	O
specific	O
operations	O
.	O
</s>
<s>
The	O
x86	B-Operating_System
CPUs	O
contain	O
undocumented	B-Language
instructions	I-Language
which	O
are	O
implemented	O
on	O
the	O
chips	O
but	O
not	O
listed	O
in	O
some	O
official	O
documents	O
.	O
</s>
<s>
Some	O
of	O
these	O
instructions	O
are	O
widely	O
available	O
across	O
many/most	O
x86	B-Operating_System
CPUs	O
,	O
while	O
others	O
are	O
specific	O
to	O
a	O
narrow	O
range	O
of	O
CPUs	O
.	O
</s>
<s>
Mnemonics	O
Opcodes	B-Language
Description	O
Status	O
AAM	O
imm8	O
ASCII-Adjust-after-Multiply	O
.	O
</s>
<s>
The	O
actual	O
operation	O
is	O
for	O
any	O
imm8	O
value	O
(	O
except	O
zero	O
,	O
which	O
produces	O
a	O
divide-by-zero	O
exception	O
)	O
.Robert	O
Collins	O
,	O
Undocumented	B-Language
OpCodes	I-Language
:	O
AAM	O
Available	O
beginning	O
with	O
8086	O
,	O
documented	O
for	O
imm8	O
values	O
other	O
than	O
0Ah	O
since	O
Pentium	B-General_Concept
(	O
earlier	O
documentation	O
lists	O
no	O
arguments	O
)	O
.	O
</s>
<s>
SETALC	O
D6	O
Set	O
AL	O
depending	O
on	O
the	O
value	O
of	O
the	O
Carry	B-Algorithm
Flag	I-Algorithm
(	O
a	O
1-byte	O
alternative	O
of	O
)	O
Available	O
beginning	O
with	O
8086	O
,	O
but	O
only	O
documented	O
since	O
Pentium	B-Device
Pro	I-Device
.	O
</s>
<s>
TEST	B-Device
,	O
Undocumented	O
variants	O
of	O
the	O
TEST	B-Device
instruction.Frank	O
van	O
Gilluwe	O
,	O
"	O
The	O
Undocumented	O
PC	O
-	O
Second	O
Edition	O
"	O
,	O
p	O
.	O
93-95	O
Performs	O
the	O
same	O
operation	O
as	O
the	O
documented	O
F6	O
/0	O
and	O
F7	O
/0	O
variants	O
,	O
respectively	O
.	O
</s>
<s>
Unavailable	O
on	O
some	O
80486	B-General_Concept
steppings.Michal	O
Necasek	O
,	O
Intel	B-General_Concept
486	I-General_Concept
Errata	O
?	O
Robert	O
Hummel	O
,	O
"	O
PC	O
Magazine	O
Programmer	O
's	O
Technical	O
Reference	O
"	O
(	O
)	O
p.728	O
SHL	O
,	O
</s>
<s>
Available	O
since	O
the	O
80186	B-Device
(	O
performs	O
different	O
operation	O
on	O
the	O
8086	O
)	O
Raúl	O
Gutiérrez	O
Sanz	O
,	O
Undocumented	O
8086	O
Opcodes	B-Language
,	O
Part	O
I	O
(	O
multiple	O
)	O
Alias	O
of	O
opcode	B-Language
80	O
,	O
which	O
provides	O
variants	O
of	O
8-bit	O
integer	O
instructions	O
(	O
ADD	O
,	O
OR	O
,	O
ADC	O
,	O
SBB	O
,	O
AND	O
,	O
SUB	O
,	O
XOR	O
,	O
CMP	O
)	O
with	O
an	O
8-bit	O
immediate	O
argument	O
.	O
</s>
<s>
Available	O
on	O
8086	O
,	O
but	O
only	O
documented	O
from	O
80386	B-General_Concept
onwards.Intel	O
,	O
The	O
8086	O
Family	O
User	O
's	O
Manual	O
,	O
October	O
1979	O
,	O
opcodes	B-Language
omitted	O
on	O
pages	O
4-25	O
and	O
4-31Retrocomputing	O
StackExchange	O
,	O
Undocumented	B-Language
instructions	I-Language
in	O
x86	B-Operating_System
CPU	O
prior	O
to	O
80386	B-General_Concept
?	O
</s>
<s>
However	O
,	O
AMD	O
's	O
optimization	O
guide	O
for	O
the	O
AMD-K8	O
describes	O
the	O
encoding	O
as	O
a	O
way	O
to	O
encode	O
a	O
two-byte	O
RET	O
instruction	O
-	O
this	O
is	O
the	O
recommended	O
workaround	O
for	O
an	O
issue	O
in	O
the	O
AMD-K8	O
'	O
s	O
branch	O
predictor	O
that	O
can	O
cause	O
branch	O
prediction	O
to	O
fail	O
for	O
some	O
1-byte	O
RET	O
instructions.AMD	O
,	O
Software	O
Optimization	O
Guide	O
for	O
AMD64	B-Device
Processors	O
(	O
publication	O
25112	O
,	O
revision	O
3.06	O
,	O
sep	O
2005	O
)	O
,	O
section	O
6.2	O
,	O
p.128	O
At	O
least	O
some	O
versions	O
of	O
gcc	O
are	O
known	O
to	O
use	O
this	O
encoding.Bug	O
48227	O
-	O
"	O
rep	O
ret	O
"	O
generated	O
for	O
-march	O
=	O
core2	O
Executes	O
as	O
RET	O
on	O
all	O
known	O
x86	B-Operating_System
CPUs	O
.	O
</s>
<s>
NOP	B-Language
67	O
90	O
NOP	B-Language
with	O
address-size	O
override	O
prefix	O
.	O
</s>
<s>
The	O
use	O
of	O
the	O
67	O
prefix	O
for	O
instructions	O
without	O
memory	O
operands	O
is	O
listed	O
by	O
the	O
Intel	O
SDM	O
(	O
vol	O
2	O
,	O
section	O
2.1.1	O
)	O
as	O
"	O
reserved	O
"	O
,	O
but	O
it	O
is	O
used	O
in	O
Microsoft	O
Windows	O
95	O
as	O
a	O
workaround	O
for	O
a	O
bug	O
in	O
the	O
B1	O
stepping	O
of	O
Intel	O
80386.Raymond	O
Chen	O
,	O
My	O
,	O
what	O
strange	O
NOPs	B-Language
you	O
have	O
!	O
Jeff	O
Parsons	O
,	O
Intel	B-General_Concept
80386	I-General_Concept
CPU	O
information	O
(	O
B1	O
errata	O
section	O
,	O
item	O
#7	O
)	O
Executes	O
as	O
NOP	B-Language
on	O
80386	B-General_Concept
and	O
later	O
.	O
</s>
<s>
INT1	O
F1	O
Single	O
byte	O
single-step	O
exception	O
/	O
Invoke	O
ICE	B-Application
Available	O
beginning	O
with	O
80386	B-General_Concept
,	O
documented	O
(	O
as	O
INT1	O
)	O
since	O
Pentium	B-Device
Pro	I-Device
.	O
</s>
<s>
Treated	O
as	O
undocumented	B-Language
instruction	I-Language
prefix	O
on	O
8086	O
and	O
80286.Retrocomputing	O
StackExchange	O
,	O
0F1h	O
opcode-prefix	O
on	O
i80286	B-General_Concept
NOP	B-Language
r/m	O
0F	O
1F	O
/0	O
Official	O
long	O
NOP	B-Language
.	O
</s>
<s>
Introduced	O
in	O
the	O
Pentium	B-Device
Pro	I-Device
in	O
1995	O
,	O
but	O
remained	O
undocumented	O
until	O
March	O
2006.Intel	O
Community	O
:	O
Multibyte	O
NOP	B-Language
Made	O
Official	O
.	O
</s>
<s>
Archived	O
on	O
7	O
Apr	O
2022.Intel	O
Software	O
Developers	O
Manual	O
,	O
volume	O
2B	O
(	O
Jan	O
2006	O
,	O
order	O
no	O
235667-018	O
,	O
does	O
not	O
have	O
long	O
NOP	B-Language
)	O
Intel	O
Software	O
Developers	O
Manual	O
,	O
volume	O
2B	O
(	O
March	O
2006	O
,	O
order	O
no	O
235667-019	O
,	O
has	O
long	O
NOP	B-Language
)	O
Available	O
on	O
Pentium	B-Device
Pro	I-Device
and	O
AMD	O
K7Agner	O
Fog	O
,	O
Instruction	O
Tables	O
,	O
AMD	B-Architecture
K7	I-Architecture
section	O
.	O
</s>
<s>
Unavailable	O
on	O
AMD	B-Architecture
K6	I-Architecture
,	O
AMD	B-Device
Geode	I-Device
LX	O
,	O
VIA	O
Nehemiah	B-Device
.	O
</s>
<s>
NOP	B-Language
r/m	O
0F	O
0D	O
/r	O
Reserved-NOP	O
.	O
</s>
<s>
Introduced	O
in	O
Pentium	B-General_Concept
4	I-General_Concept
.	O
</s>
<s>
Intel	O
documentation	O
lists	O
this	O
opcode	B-Language
as	O
NOP	B-Language
in	O
opcode	B-Language
tables	O
but	O
not	O
instruction	O
listings	O
since	O
June	O
2005.Intel	O
Software	O
Developers	O
Manual	O
,	O
volume	O
2B	O
(	O
April	O
2005	O
,	O
order	O
no	O
235667-015	O
,	O
does	O
not	O
list	O
0F0D-nop	O
)	O
Intel	O
Software	O
Developers	O
Manual	O
,	O
volume	O
2B	O
(	O
June	O
2005	O
,	O
order	O
no	O
235667-016	O
,	O
lists	O
0F0D-nop	O
in	O
opcode	B-Language
table	O
but	O
not	O
under	O
NOP	B-Language
instruction	O
description	O
.	O
)	O
</s>
<s>
From	O
Broadwell	B-General_Concept
onwards	O
,	O
0F	O
0D	O
/1	O
has	O
been	O
documented	O
as	O
PREFETCHW	O
.	O
</s>
<s>
On	O
AMD	O
CPUs	O
,	O
0F	O
0D	O
with	O
a	O
memory	O
argument	O
is	O
documented	O
as	O
PREFETCH/PREFETCHW	O
since	O
K6-2	O
-	O
originally	O
as	O
part	O
of	O
3dnow	O
!,	O
but	O
has	O
been	O
kept	O
in	O
later	O
AMD	O
CPUs	O
even	O
after	O
the	O
rest	O
of	O
3dnow	B-General_Concept
!	I-General_Concept
</s>
<s>
Microsoft	O
Windows	O
95	O
Setup	O
is	O
known	O
to	O
depend	O
on	O
0F	O
FF	O
being	O
invalid	O
-	O
it	O
is	O
used	O
as	O
a	O
self	O
check	O
to	O
test	B-Device
that	O
its	O
#UD	O
exception	O
handler	O
is	O
working	O
properly	O
.	O
</s>
<s>
Other	O
invalid	B-Language
opcodes	I-Language
that	O
are	O
being	O
relied	O
on	O
by	O
commercial	O
software	O
to	O
produce	O
#UD	O
exceptions	O
include	O
(	O
DIF-2	O
,	O
LaserLok	O
)	O
and	O
(	O
"	O
BOP	O
"	O
)	O
,	O
however	O
as	O
of	O
January	O
2022	O
they	O
are	O
not	O
published	O
as	O
intentionally	O
invalid	B-Language
opcodes	I-Language
.	O
</s>
<s>
All	O
of	O
these	O
opcodes	B-Language
produce	O
#UD	O
exceptions	O
on	O
80186	B-Device
and	O
later	O
(	O
except	O
on	O
NEC	B-Device
V20/V30	I-Device
,	O
which	O
assign	O
at	O
least	O
0F	O
FF	O
to	O
the	O
BRKEM	O
instruction	O
.	O
)	O
</s>
<s>
Mnemonics	O
Opcodes	B-Language
Description	O
Status	O
REP	O
IMUL	O
F3	O
F6	O
/5	O
,	O
F3	O
F7	O
/5	O
A	O
REP	O
or	O
REPNZ	O
prefix	O
on	O
an	O
IMUL	O
instruction	O
causes	O
the	O
result	O
to	O
be	O
negated	O
.	O
</s>
<s>
STOREALL	O
0F	O
04	O
Exact	O
purpose	O
unknown	O
,	O
causes	O
CPU	O
hang	O
(	O
HCF	B-Language
)	O
.	O
</s>
<s>
The	O
only	O
way	O
out	O
is	O
CPU	B-Operating_System
reset	I-Operating_System
.	O
</s>
<s>
In	O
some	O
implementations	O
,	O
emulated	O
through	O
BIOS	B-Operating_System
as	O
a	O
halting	O
sequence	O
.	O
</s>
<s>
It	O
interacts	O
with	O
ICE	B-Application
mode	O
.	O
</s>
<s>
Only	O
available	O
on	O
80286	B-General_Concept
LOADALL	B-Device
0F	O
05	O
Loads	O
All	O
Registers	B-General_Concept
from	O
Memory	O
Address	O
0x000800H	O
Only	O
available	O
on	O
80286	B-General_Concept
.	O
</s>
<s>
Opcode	B-Language
reused	O
for	O
SYSCALL	B-Operating_System
in	O
AMD	O
K6-2	O
and	O
later	O
CPUs	O
.	O
</s>
<s>
LOADALLD	O
0F	O
07	O
Loads	O
All	O
Registers	B-General_Concept
from	O
Memory	O
Address	O
ES:EDI	O
Only	O
available	O
on	O
80386	B-General_Concept
.	O
</s>
<s>
Opcode	B-Language
reused	O
for	O
SYSRET	O
in	O
AMD	O
K6-2	O
and	O
later	O
CPUs	O
.	O
</s>
<s>
CL1INVMB	O
0F	O
0AIntel	O
's	O
RCCE	O
library	O
for	O
the	O
SCC	O
uses	O
opcode	B-Language
0F	O
0A	O
for	O
SCC	O
's	O
message	O
invalidation	O
instruction	O
.	O
</s>
<s>
On	O
the	O
Intel	O
SCC	O
(	O
Single-chip	B-General_Concept
Cloud	I-General_Concept
Computer	I-General_Concept
)	O
,	O
invalidate	O
all	O
message	O
buffers	O
.	O
</s>
<s>
UMOV	O
r/m	O
,	O
r	O
0F	O
(	O
10	O
..	O
13	O
)	O
/r	O
Moves	O
data	O
to/from	O
user	O
memory	O
when	O
operating	O
in	O
ICE	B-Application
HALT	B-Language
mode.Robert	O
R	O
.	O
Collins	O
,	O
Undocumented	B-Language
OpCodes	I-Language
:	O
UMOV	O
Acts	O
as	O
regular	O
MOV	O
otherwise	O
.	O
</s>
<s>
Available	O
on	O
some	O
386	B-General_Concept
and	O
486	B-General_Concept
processors	I-General_Concept
only	O
.	O
</s>
<s>
Opcodes	B-Language
reused	O
for	O
SSE	B-General_Concept
instructions	I-General_Concept
in	O
later	O
CPUs	O
.	O
</s>
<s>
NXOP	O
0F	O
55	O
NexGen	O
hypercode	O
interface.Herbert	O
Oppmann	O
,	O
NXOP	O
(	O
Opcode	B-Language
0Fh	O
55h	O
)	O
Available	O
on	O
NexGen	O
Nx586	O
only	O
.	O
</s>
<s>
The	O
NexGen	O
Nx586	O
CPU	O
uses	O
"	O
hyper	O
code	O
"	O
Herbert	O
Oppmann	O
,	O
Inside	O
the	O
NexGen	O
Nx586	O
System	B-Operating_System
BIOS	I-Operating_System
(	O
x86	B-Operating_System
code	O
sequences	O
unpacked	O
at	O
boot	O
time	O
and	O
only	O
accessible	O
in	O
a	O
special	O
"	O
hyper	O
mode	O
"	O
operation	O
mode	O
,	O
similar	O
to	O
DEC	O
Alpha	O
's	O
PALcode	B-General_Concept
)	O
for	O
many	O
complicated	O
operations	O
that	O
are	O
implemented	O
with	O
microcode	O
in	O
most	O
other	O
x86	B-Operating_System
CPUs	O
.	O
</s>
<s>
The	O
Nx586	O
provides	O
a	O
large	O
number	O
of	O
undocumented	B-Language
instructions	I-Language
to	O
assist	O
hyper	O
mode	O
operation	O
.	O
</s>
<s>
0F	O
0F	O
/r	O
BB	O
Undocumented	O
AMD	O
3DNow	B-General_Concept
!	I-General_Concept
</s>
<s>
instruction	O
on	O
K6-2	O
and	O
K6-3	O
.	O
</s>
<s>
Swaps	O
16-bit	O
words	O
within	O
64-bit	O
MMX	B-Architecture
register.Grzegorz	O
Mazur	O
,	O
AMD	O
3DNow	B-General_Concept
!	I-General_Concept
</s>
<s>
Instruction	O
known	O
to	O
be	O
recognized	O
by	O
MASM	B-Application
6.13	O
and	O
6.14	O
.	O
</s>
<s>
Available	O
on	O
K6-2	O
and	O
K6-3	O
only	O
.	O
</s>
<s>
Opcode	B-Language
reused	O
for	O
documented	O
PSWAPD	O
instruction	O
from	O
AMD	B-Architecture
K7	I-Architecture
onwards	O
.	O
</s>
<s>
mnemonic	O
64	O
D6	O
Using	O
the	O
64h	O
(	O
FS	O
:	O
segment	O
)	O
prefix	O
with	O
the	O
undocumented	O
D6	O
(	O
SALC/SETALC	O
)	O
instruction	O
will	O
,	O
on	O
UMC	O
CPUs	O
only	O
,	O
cause	O
EAX	O
to	O
be	O
set	O
to	O
0xAB6B1B07.Potemkin	O
'	O
s	O
Hacker	O
Group	O
's	O
OPCODE.LST	O
,	O
v4.51	O
Available	O
on	O
the	O
UMC	B-Device
Green	I-Device
CPU	I-Device
only	O
.	O
</s>
<s>
64	O
0F	O
(	O
80	O
..	O
8F	O
)	O
rel16/32	O
On	O
Intel	B-Device
NetBurst	I-Device
(	O
Pentium	B-General_Concept
4	I-General_Concept
)	O
CPUs	O
,	O
the	O
64h	O
(	O
FS	O
:	O
segment	O
)	O
instruction	O
prefix	O
will	O
,	O
when	O
used	O
with	O
conditional	B-General_Concept
branch	I-General_Concept
instructions	O
,	O
act	O
as	O
a	O
branch	O
hint	O
to	O
indicate	O
that	O
the	O
branch	O
will	O
be	O
alternating	O
between	O
taken	O
and	O
not-taken.Agner	O
Fog	O
,	O
The	O
Microarchitecture	O
of	O
Intel	O
,	O
AMD	O
and	O
VIA	O
CPUs	O
,	O
section	O
3.4	O
"	O
Branch	O
Prediction	O
in	O
P4	O
and	O
P4E	O
"	O
.	O
</s>
<s>
Unlike	O
other	O
NetBurst	B-Device
branch	O
hints	O
(	O
CS	O
:	O
and	O
DS	O
:	O
segment	O
prefixes	O
)	O
,	O
this	O
hint	O
is	O
not	O
documented	O
.	O
</s>
<s>
Available	O
on	O
NetBurst	B-Device
CPUs	O
only	O
.	O
</s>
<s>
Segment	O
prefixes	O
on	O
conditional	B-General_Concept
branches	I-General_Concept
are	O
accepted	O
but	O
ignored	O
by	O
non-NetBurst	O
CPUs	O
.	O
</s>
<s>
ALTINST	B-Device
0F	O
3F	O
Jump	O
and	O
execute	O
instructions	O
in	O
the	O
undocumented	O
Alternate	B-Device
Instruction	I-Device
Set	I-Device
.	O
</s>
<s>
Only	O
available	O
on	O
some	O
x86	B-Operating_System
processors	O
made	O
by	O
VIA	O
Technologies	O
.	O
</s>
<s>
(	O
FMA4	B-General_Concept
)	O
VEX.66.0F38	O
(	O
5C	O
..	O
5F	O
,	O
68	O
..	O
6F	O
,	O
78	O
..	O
7F	O
)	O
/r	O
imm8	O
On	O
AMD	O
Zen1	O
,	O
FMA4	B-General_Concept
instructions	O
are	O
present	O
but	O
undocumented	O
(	O
missing	O
CPUID	B-Architecture
flag	O
)	O
.	O
</s>
<s>
The	O
reason	O
for	O
leaving	O
the	O
feature	O
undocumented	O
may	O
or	O
may	O
not	O
have	O
been	O
due	O
to	O
a	O
buggy	O
implementation.Reddit	O
/r/Amd	O
discussion	O
thread	O
:	O
Ryzen	O
has	O
undocumented	O
support	O
for	O
FMA4	B-General_Concept
Removed	O
from	O
Zen2	O
onwards	O
.	O
</s>
<s>
REP	O
XSHA512	O
Perform	O
SHA-512	B-Algorithm
hashing	O
.	O
</s>
<s>
Supported	O
by	O
OpenSSL	O
as	O
part	O
of	O
its	O
VIA	B-Device
PadLock	I-Device
support	O
,	O
but	O
not	O
documented	O
by	O
the	O
VIA	B-Device
PadLock	I-Device
Programming	O
Guide	O
.	O
</s>
<s>
Only	O
available	O
on	O
some	O
x86	B-Operating_System
processors	O
made	O
by	O
VIA	O
Technologies	O
and	O
Zhaoxin	B-Device
.	O
</s>
<s>
Listed	O
in	O
a	O
VIA-supplied	O
patch	O
to	O
add	O
support	O
for	O
VIA	O
Nano-specific	O
PadLock	O
instructions	O
to	O
OpenSSL	O
,	O
PATCH	O
:	O
Update	O
PadLock	O
engine	O
for	O
VIA	B-Device
C7	I-Device
and	O
Nano	B-Device
CPUs	O
but	O
not	O
documented	O
by	O
the	O
VIA	B-Device
PadLock	I-Device
Programming	O
Guide	O
.	O
</s>
<s>
The	O
whitepapers	O
for	O
SandSifter	O
and	O
UISFuzz	O
report	O
the	O
detection	O
of	O
large	O
numbers	O
of	O
undocumented	B-Language
instructions	I-Language
in	O
the	O
3DNow	B-General_Concept
!	I-General_Concept
</s>
<s>
opcode	B-Language
range	O
on	O
several	O
different	O
AMD	O
CPUs	O
(	O
at	O
least	O
Geode	B-Device
NX	I-Device
and	O
C-50	O
)	O
.	O
</s>
<s>
On	O
at	O
least	O
AMD	O
K6-2	O
,	O
all	O
of	O
the	O
unassigned	O
3DNow	B-General_Concept
!	I-General_Concept
</s>
<s>
opcodes	B-Language
(	O
other	O
than	O
the	O
undocumented	O
PF2IW	O
,	O
PI2FW	O
and	O
PSWAPW	O
instructions	O
)	O
execute	O
as	O
equivalents	O
of	O
POR	O
(	O
MMX	B-Architecture
bitwise-OR	O
instruction	O
)	O
.	O
</s>
<s>
Present	O
on	O
some	O
AMD	O
CPUs	O
with	O
3DNow	B-General_Concept
!	I-General_Concept
.	O
</s>
<s>
MONTMUL2	O
Zhaoxin	B-Device
RSA/	O
"	O
xmodx	O
"	O
instructions	O
.	O
</s>
<s>
Mnemonics	O
and	O
CPUID	B-Architecture
flags	B-General_Concept
are	O
listed	O
in	O
a	O
Linux	O
kernel	O
patch	O
for	O
OpenEuler	O
,	O
OpenEuler	O
mailing	O
list	O
,	O
PATCH	O
kernel-4.19	O
v2	O
5/6	O
:	O
x86/cpufeatures	O
:	O
Add	O
Zhaoxin	B-Device
feature	O
bits	O
.	O
</s>
<s>
Archived	O
on	O
9	O
Apr	O
2022	O
.	O
but	O
opcodes	B-Language
and	O
instruction	O
descriptions	O
are	O
not	O
available	O
.	O
</s>
<s>
Some	O
Zhaoxin	B-Device
CPUsCPUID	O
dump	O
for	O
Zhaoxin	B-Device
KaiXian-U6870	O
,	O
see	O
C0000001	O
line	O
.	O
</s>
<s>
Archived	O
on	O
9	O
Apr	O
2022	O
.	O
have	O
the	O
CPUID	B-Architecture
flags	B-General_Concept
for	O
these	O
instructions	O
set	O
.	O
</s>
<s>
GP2MEM	O
Microprocessor	B-Architecture
Report	O
's	O
article	O
"	O
MediaGX	B-Device
Targets	O
Low-Cost	O
PCs	O
"	O
from	O
1997	O
,	O
covering	O
the	O
introduction	O
of	O
the	O
Cyrix	O
MediaGX	B-Device
processor	O
,	O
lists	O
several	O
new	O
instructions	O
that	O
are	O
said	O
to	O
have	O
been	O
added	O
to	O
this	O
processor	O
in	O
order	O
to	O
support	O
its	O
new	O
"	O
Virtual	O
System	O
Architecture	O
"	O
features	O
,	O
including	O
MOVDB	O
and	O
GP2MEM	O
-	O
and	O
also	O
mentions	O
that	O
Cyrix	O
did	O
not	O
intend	O
to	O
publish	O
specifications	O
for	O
these	O
instructions.Microprocessor	O
Report	O
,	O
MediaGX	B-Device
Targets	O
Low-Cost	O
PCs	O
(	O
vol	O
11	O
,	O
no	O
.	O
</s>
<s>
Mnemonics	O
Opcodes	B-Language
Description	O
Status	O
FENI	O
,	O
</s>
<s>
FENI8087_NOP	O
DB	O
E0	O
FPU	O
Enable	O
Interrupts	B-Application
(	O
8087	B-Device
)	O
Documented	O
for	O
the	O
Intel	O
80287	O
.	O
</s>
<s>
Present	O
on	O
all	O
Intel	O
x87	B-Application
FPUs	I-Application
from	O
80287	O
onwards	O
.	O
</s>
<s>
For	O
FPUs	O
other	O
than	O
the	O
ones	O
where	O
they	O
were	O
introduced	O
on	O
(	O
8087	B-Device
for	O
FENI/FDISI	O
and	O
80287	O
for	O
FSETPM	O
)	O
,	O
they	O
act	O
as	O
NOPs	B-Language
.	O
</s>
<s>
These	O
instructions	O
and	O
their	O
operation	O
on	O
modern	O
CPUs	O
are	O
commonly	O
mentioned	O
in	O
later	O
Intel	O
documentation	O
,	O
but	O
with	O
opcodes	B-Language
omitted	O
and	O
opcode	B-Language
table	O
entries	O
left	O
blank	O
(	O
e.g.	O
</s>
<s>
Intel	O
SDM	O
325462-077	O
,	O
April	O
2022	O
mentions	O
them	O
twice	O
without	O
opcodes	B-Language
)	O
.	O
</s>
<s>
The	O
opcodes	B-Language
are	O
,	O
however	O
,	O
recognized	O
by	O
Intel	O
XED.ISA	O
datafile	O
for	O
Intel	O
XED	O
(	O
April	O
17	O
,	O
2022	O
)	O
,	O
lines	O
916-944	O
FDISI	O
,	O
</s>
<s>
FDISI8087_NOP	O
DB	O
E1	O
FPU	O
Disable	O
Interrupts	B-Application
(	O
8087	B-Device
)	O
FSETPM	O
,	O
</s>
<s>
FSETPM287_NOP	O
DB	O
E4	O
FPU	O
Set	O
Protected	B-Application
Mode	I-Application
(	O
80287	O
)	O
(	O
no	O
mnemonic	O
)	O
"	O
Reserved	O
by	O
Cyrix	O
"	O
opcodes	B-Language
These	O
opcodes	B-Language
are	O
listed	O
as	O
reserved	B-Language
opcodes	I-Language
that	O
will	O
produce	O
"	O
unpredictable	O
results	O
"	O
without	O
generating	O
exceptions	O
on	O
at	O
least	O
Cyrix	B-General_Concept
6x86	I-General_Concept
,	O
Cyrix	B-General_Concept
6x86	I-General_Concept
processor	O
data	O
book	O
,	O
page	O
6-34	O
6x86MX	B-General_Concept
,	O
MII	O
,	O
MediaGX	B-Device
,	O
and	O
AMD	B-Device
Geode	I-Device
GX/LX.AMD	O
Geode	O
LX	O
Processors	O
Data	O
Book	O
,	O
publication	O
33234H	O
,	O
p.670	O
(	O
The	O
documentation	O
for	O
these	O
CPUs	O
all	O
list	O
the	O
same	O
ten	O
opcodes	B-Language
.	O
)	O
</s>
