<s>
Volatile	B-General_Concept
memory	I-General_Concept
,	O
in	O
contrast	O
to	O
non-volatile	B-General_Concept
memory	I-General_Concept
,	O
is	O
computer	B-General_Concept
memory	I-General_Concept
that	O
requires	O
power	O
to	O
maintain	O
the	O
stored	O
information	O
;	O
it	O
retains	O
its	O
contents	O
while	O
powered	O
on	O
but	O
when	O
the	O
power	O
is	O
interrupted	O
,	O
the	O
stored	O
data	O
is	O
quickly	O
lost	O
.	O
</s>
<s>
Volatile	B-General_Concept
memory	I-General_Concept
has	O
several	O
uses	O
including	O
as	O
primary	O
storage	O
.	O
</s>
<s>
In	O
addition	O
to	O
usually	O
being	O
faster	O
than	O
forms	O
of	O
mass	B-Device
storage	I-Device
such	O
as	O
a	O
hard	B-Device
disk	I-Device
drive	I-Device
,	O
volatility	O
can	O
protect	O
sensitive	O
information	O
,	O
as	O
it	O
becomes	O
unavailable	O
on	O
power-down	O
.	O
</s>
<s>
Most	O
general-purpose	O
random-access	B-Architecture
memory	I-Architecture
(	O
RAM	B-Architecture
)	O
is	O
volatile	O
.	O
</s>
<s>
There	O
are	O
two	O
kinds	O
of	O
volatile	O
RAM	B-Architecture
:	O
dynamic	O
and	O
static	B-Architecture
.	O
</s>
<s>
Dynamic	O
RAM	B-Architecture
(	O
DRAM	O
)	O
is	O
very	O
popular	O
due	O
to	O
its	O
cost-effectiveness	O
.	O
</s>
<s>
The	O
main	O
advantage	O
of	O
static	B-Architecture
RAM	I-Architecture
(	O
SRAM	O
)	O
is	O
that	O
it	O
is	O
much	O
faster	O
than	O
dynamic	O
RAM	B-Architecture
.	O
</s>
<s>
Every	O
single	O
bit	O
in	O
a	O
static	B-Architecture
RAM	I-Architecture
chip	O
needs	O
a	O
cell	O
of	O
six	O
transistors	O
,	O
whereas	O
dynamic	O
RAM	B-Architecture
requires	O
only	O
one	O
capacitor	O
and	O
one	O
transistor	O
.	O
</s>
<s>
SRAM	O
is	O
commonly	O
used	O
as	O
CPU	B-General_Concept
cache	I-General_Concept
and	O
for	O
processor	B-General_Concept
registers	I-General_Concept
and	O
in	O
networking	O
devices	O
.	O
</s>
