<s>
The	O
VEX	B-General_Concept
prefix	I-General_Concept
(	O
from	O
"	O
vector	B-Operating_System
extensions	O
"	O
)	O
and	O
VEX	B-General_Concept
coding	I-General_Concept
scheme	I-General_Concept
are	O
an	O
extension	O
to	O
the	O
x86	B-Operating_System
and	O
x86-64	B-Device
instruction	B-General_Concept
set	I-General_Concept
architecture	I-General_Concept
for	O
microprocessors	B-Architecture
from	O
Intel	O
,	O
AMD	O
and	O
others	O
.	O
</s>
<s>
The	O
VEX	B-General_Concept
coding	I-General_Concept
scheme	I-General_Concept
allows	O
the	O
definition	O
of	O
new	O
instructions	O
and	O
the	O
extension	O
or	O
modification	O
of	O
previously	O
existing	O
instruction	B-Language
codes	I-Language
.	O
</s>
<s>
The	O
opcode	B-Language
map	O
is	O
extended	O
to	O
make	O
space	O
for	O
future	O
instructions	O
.	O
</s>
<s>
It	O
allows	O
instruction	B-Language
codes	I-Language
to	O
have	O
up	O
to	O
four	O
operands	O
(	O
plus	O
immediate	O
)	O
,	O
where	O
the	O
original	O
scheme	O
allows	O
only	O
two	O
operands	O
(	O
plus	O
immediate	O
)	O
.	O
</s>
<s>
It	O
allows	O
the	O
size	O
of	O
SIMD	B-Device
vector	B-Operating_System
registers	B-General_Concept
to	O
be	O
extended	O
from	O
the	O
128-bit	O
XMM	O
registers	B-General_Concept
to	O
the	O
256-bit	O
YMM	O
registers	B-General_Concept
.	O
</s>
<s>
It	O
allows	O
existing	O
two-operand	O
instructions	O
to	O
be	O
modified	O
into	O
non-destructive	O
three-operand	O
forms	O
where	O
the	O
destination	O
register	O
is	O
different	O
from	O
both	O
source	O
registers	B-General_Concept
.	O
</s>
<s>
The	O
VEX	B-General_Concept
prefix	I-General_Concept
replaces	O
the	O
most	O
commonly	O
used	O
instruction	O
prefix	O
bytes	B-Application
and	O
escape	O
codes	O
.	O
</s>
<s>
In	O
many	O
cases	O
,	O
the	O
number	O
of	O
prefix	O
bytes	B-Application
and	O
escape	O
bytes	B-Application
that	O
are	O
replaced	O
is	O
the	O
same	O
as	O
the	O
number	O
of	O
bytes	B-Application
in	O
the	O
VEX	B-General_Concept
prefix	I-General_Concept
,	O
so	O
that	O
the	O
total	O
length	O
of	O
the	O
VEX-encoded	O
instruction	O
is	O
the	O
same	O
as	O
the	O
length	O
of	O
the	O
legacy	O
instruction	B-Language
code	I-Language
.	O
</s>
<s>
In	O
32-bit	O
mode	O
VEX	O
encoded	O
instructions	O
can	O
only	O
access	O
the	O
first	O
8	O
YMM/XMM	O
registers	B-General_Concept
;	O
the	O
encodings	O
for	O
the	O
other	O
registers	B-General_Concept
would	O
be	O
interpreted	O
as	O
the	O
legacy	O
LDS	O
and	O
LES	O
instructions	O
that	O
are	O
not	O
supported	O
in	O
64-bit	O
mode	O
.	O
</s>
<s>
The	O
two-byte	O
VEX	B-General_Concept
prefix	I-General_Concept
contains	O
the	O
following	O
components	O
:	O
</s>
<s>
The	O
R̅	O
bit	O
,	O
similar	O
to	O
the	O
REX.R	O
prefix	O
bit	O
used	O
in	O
the	O
x86-64	B-Device
instruction	B-General_Concept
set	I-General_Concept
extension	O
.	O
</s>
<s>
An	O
L	O
bit	O
,	O
specifying	O
256-bit	O
vector	B-Operating_System
length	O
.	O
</s>
<s>
The	O
three-byte	O
VEX	B-General_Concept
prefix	I-General_Concept
additionally	O
contains	O
:	O
</s>
<s>
The	O
remaining	O
three	O
m	O
bits	O
are	O
reserved	O
for	O
future	O
use	O
,	O
such	O
as	O
specifying	O
vector	B-Operating_System
lengths	O
>256	O
bits	O
,	O
specifying	O
different	O
instruction	O
lengths	O
,	O
or	O
extending	O
the	O
opcode	B-Language
space	O
;	O
however	O
,	O
as	O
of	O
2013	O
,	O
Intel	O
decided	O
to	O
introduce	O
a	O
new	O
encoding	O
scheme	O
,	O
the	O
EVEX	B-General_Concept
prefix	I-General_Concept
,	O
rather	O
than	O
expand	O
the	O
remaining	O
m	O
bits	O
.	O
</s>
<s>
The	O
VEX	B-General_Concept
coding	I-General_Concept
scheme	I-General_Concept
uses	O
a	O
code	O
prefix	O
consisting	O
of	O
two	O
or	O
three	O
bytes	B-Application
,	O
which	O
may	O
be	O
added	O
to	O
existing	O
or	O
new	O
instruction	B-Language
codes	I-Language
.	O
</s>
<s>
In	O
x86	B-Operating_System
architecture	I-Operating_System
,	O
instructions	O
with	O
a	O
memory	O
operand	O
may	O
use	O
the	O
ModR/M	O
byte	B-Application
which	O
specifies	O
the	O
addressing	O
mode	O
.	O
</s>
<s>
This	O
byte	B-Application
has	O
three	O
bit	O
fields	O
:	O
</s>
<s>
mod	O
,	O
bits	O
 [ 7:6 ] 	O
-	O
combined	O
with	O
the	O
r/m	O
field	O
,	O
encodes	O
either	O
8	O
registers	B-General_Concept
or	O
24	O
addressing	O
modes	O
.	O
</s>
<s>
Also	O
encodes	O
opcode	B-Language
information	O
for	O
some	O
instructions	O
.	O
</s>
<s>
reg/opcode	O
,	O
bits	O
 [ 5:3 ] 	O
-	O
depending	O
on	O
primary	O
opcode	B-Language
byte	B-Application
,	O
specifies	O
either	O
a	O
register	O
or	O
three	O
more	O
bits	O
of	O
opcode	B-Language
information	O
.	O
</s>
<s>
The	O
base-plus-index	O
and	O
scale-plus-index	O
forms	O
of	O
32-bit	O
addressing	O
(	O
encoded	O
with	O
r/m	O
=	O
100	O
and	O
mod	O
≠	O
11	O
)	O
require	O
another	O
addressing	O
byte	B-Application
,	O
the	O
SIB	O
byte	B-Application
.	O
</s>
<s>
To	O
use	O
64-bit	O
addressing	O
and	O
additional	O
registers	B-General_Concept
present	O
in	O
the	O
x86-64	B-Device
architecture	O
,	O
the	O
REX	O
prefix	O
has	O
been	O
introduced	O
which	O
provides	O
additional	O
space	O
for	O
encoding	O
addressing	O
modes	O
.	O
</s>
<s>
Bit-field	O
W	O
changes	O
the	O
operand	O
size	O
to	O
64	O
bits	O
,	O
R	O
expands	O
reg	O
to	O
4	O
bits	O
,	O
B	O
expands	O
r/m	O
(	O
or	O
opreg	O
in	O
the	O
few	O
opcodes	B-Language
that	O
encode	O
the	O
register	O
in	O
the	O
3	O
lowest	O
opcode	B-Language
bits	O
,	O
such	O
as	O
"	O
POP	O
reg	O
"	O
)	O
,	O
and	O
X	O
and	O
B	O
expand	O
index	O
and	O
base	O
in	O
the	O
SIB	O
byte	B-Application
.	O
</s>
<s>
The	O
VEX	B-General_Concept
prefix	I-General_Concept
provides	O
a	O
compact	O
representation	O
of	O
the	O
REX	O
prefix	O
,	O
as	O
well	O
as	O
various	O
other	O
prefixes	O
,	O
to	O
expand	O
the	O
addressing	O
mode	O
,	O
register	O
enumeration	O
and	O
operand	O
size	O
and	O
width	O
:	O
</s>
<s>
R̅	O
,	O
X̅	O
and	O
B̅	O
bits	O
are	O
inversions	O
of	O
the	O
REX	O
prefix	O
's	O
R	O
,	O
X	O
and	O
B	O
bits	O
;	O
these	O
provide	O
a	O
fourth	O
(	O
high	O
)	O
bit	O
for	O
register	O
index	O
fields	O
(	O
ModRM	O
reg	O
,	O
SIB	O
index	O
,	O
and	O
ModRM	O
r/m	O
;	O
SIB	O
base	O
;	O
or	O
opcode	B-Language
reg	O
fields	O
,	O
respectively	O
)	O
allowing	O
access	O
to	O
16	O
instead	O
of	O
8	O
registers	B-General_Concept
.	O
</s>
<s>
The	O
W	O
bit	O
is	O
equivalent	O
to	O
the	O
REX	O
prefix	O
's	O
W	O
bit	O
,	O
and	O
specifies	O
a	O
64-bit	O
operand	O
;	O
for	O
non-integer	O
instructions	O
,	O
it	O
is	O
a	O
general	O
opcode	B-Language
extension	O
bit	O
.	O
</s>
<s>
m	O
replaces	O
leading	O
opcode	B-Language
prefix	O
bytes	B-Application
.	O
</s>
<s>
The	O
values	O
1	O
,	O
2	O
and	O
3	O
are	O
equivalent	O
to	O
opcode	B-Language
prefixes	O
0x0F	O
,	O
0x0F0x38	O
and	O
0x0F0x3A	O
;	O
all	O
other	O
values	O
are	O
reserved	O
.	O
</s>
<s>
The	O
2-byte	O
VEX	B-General_Concept
prefix	I-General_Concept
always	O
corresponds	O
to	O
the	O
0x0F	O
prefix	O
.	O
</s>
<s>
L	O
indicates	O
the	O
vector	B-Operating_System
length	O
;	O
0	O
for	O
128-bit	O
SSE	O
(	O
XMM	O
)	O
registers	B-General_Concept
,	O
and	O
1	O
for	O
256-bit	O
AVX	B-General_Concept
(	O
YMM	O
)	O
registers	B-General_Concept
.	O
</s>
<s>
p	O
encodes	O
additional	O
prefix	O
bytes	B-Application
.	O
</s>
<s>
These	O
encode	O
the	O
operand	O
type	O
for	O
SSE	B-General_Concept
instructions	I-General_Concept
:	O
packed	O
single	O
,	O
packed	O
double	O
,	O
scalar	O
single	O
and	O
scalar	O
double	O
,	O
respectively	O
.	O
</s>
<s>
Instructions	O
coded	O
with	O
the	O
VEX	B-General_Concept
prefix	I-General_Concept
can	O
have	O
up	O
to	O
four	O
variable	O
operands	O
(	O
in	O
registers	B-General_Concept
or	O
memory	O
)	O
and	O
one	O
constant	O
operand	O
(	O
immediate	O
value	O
)	O
.	O
</s>
<s>
The	O
remaining	O
operands	O
are	O
registers	B-General_Concept
.	O
</s>
<s>
The	O
AVX	B-General_Concept
instruction	B-General_Concept
set	I-General_Concept
is	O
the	O
first	O
instruction	B-General_Concept
set	I-General_Concept
extension	O
to	O
use	O
the	O
VEX	B-General_Concept
coding	I-General_Concept
scheme	I-General_Concept
.	O
</s>
<s>
The	O
AVX	B-General_Concept
instruction	B-General_Concept
set	I-General_Concept
uses	O
VEX	B-General_Concept
prefix	I-General_Concept
only	O
for	O
instructions	O
using	O
the	O
SIMD	B-General_Concept
XMM	I-General_Concept
registers	B-General_Concept
.	O
</s>
<s>
However	O
,	O
the	O
VEX	B-General_Concept
coding	I-General_Concept
scheme	I-General_Concept
has	O
been	O
used	O
for	O
other	O
instruction	O
types	O
as	O
well	O
in	O
subsequent	O
expansion	O
of	O
instruction	B-General_Concept
set	I-General_Concept
.	O
</s>
<s>
For	O
example	O
,	O
BMI	B-Device
introduced	O
VEX	O
coded	O
arithmetic	O
and	O
bit	B-Device
manipulation	I-Device
instructions	I-Device
that	O
operate	O
on	O
general	O
purpose	O
registers	B-General_Concept
.	O
</s>
<s>
AVX-512	B-General_Concept
introduced	O
8	O
mask	O
registers	B-General_Concept
and	O
added	O
instructions	O
to	O
manipulate	O
them	O
.	O
</s>
<s>
The	O
VEX	B-General_Concept
prefix	I-General_Concept
's	O
initial-byte	O
values	O
,	O
0xC4	O
and	O
0xC5	O
,	O
are	O
the	O
same	O
as	O
the	O
opcodes	B-Language
of	O
the	O
LDS	O
and	O
LES	O
instructions	O
.	O
</s>
<s>
Not	O
supported	O
in	O
64-bit	O
mode	O
,	O
the	O
ambiguity	O
is	O
resolved	O
in	O
32-bit	O
mode	O
by	O
exploiting	O
the	O
fact	O
that	O
a	O
legal	O
LDS	O
or	O
LES	O
's	O
ModRM	O
byte	B-Application
can	O
not	O
specify	O
a	O
register	O
operand	O
;	O
i.e.	O
,	O
be	O
of	O
the	O
form	O
11xxxxxx	O
.	O
</s>
<s>
Various	O
bit-fields	O
in	O
the	O
VEX	B-General_Concept
prefix	I-General_Concept
's	O
second	O
byte	B-Application
are	O
inverted	O
to	O
ensure	O
that	O
the	O
byte	B-Application
is	O
always	O
of	O
this	O
form	O
.	O
</s>
<s>
Similarly	O
,	O
the	O
REX	O
prefix	O
's	O
one-byte	O
form	O
has	O
the	O
four	O
high-order	O
bits	O
set	O
to	O
four	O
,	O
which	O
replaces	O
sixteen	O
opcodes	B-Language
numbered	O
0x40	O
–	O
0x4F	O
.	O
</s>
<s>
Previously	O
,	O
those	O
opcodes	B-Language
were	O
individual	O
INC	O
and	O
DEC	O
instructions	O
for	O
the	O
eight	O
standard	O
processor	B-General_Concept
registers	I-General_Concept
;	O
x86-64	B-Device
code	O
must	O
use	O
ModR/M	O
INC	O
and	O
DEC	O
instructions	O
.	O
</s>
<s>
Legacy	O
SIMD	B-Device
instructions	O
with	O
a	O
VEX	B-General_Concept
prefix	I-General_Concept
added	O
are	O
equivalent	O
to	O
the	O
same	O
instructions	O
without	O
VEX	B-General_Concept
prefix	I-General_Concept
with	O
the	O
following	O
differences	O
:	O
</s>
<s>
A	O
128-bit	O
XMM	O
instruction	O
without	O
VEX	B-General_Concept
prefix	I-General_Concept
leaves	O
the	O
upper	O
half	O
of	O
the	O
full	O
256-bit	O
YMM	O
register	O
unchanged	O
,	O
while	O
the	O
VEX-encoded	O
version	O
sets	O
the	O
upper	O
half	O
to	O
zero	O
.	O
</s>
<s>
In	O
August	O
2007	O
,	O
AMD	O
proposed	O
the	O
SSE5	B-General_Concept
instruction	B-General_Concept
set	I-General_Concept
extension	O
which	O
includes	O
a	O
new	O
coding	O
scheme	O
for	O
instructions	O
with	O
three	O
operands	O
,	O
using	O
an	O
extra	O
byte	B-Application
named	O
DREX	O
intended	O
for	O
the	O
Bulldozer	O
processor	O
core	O
,	O
due	O
to	O
begin	O
production	O
in	O
2011	O
.	O
</s>
<s>
In	O
March	O
2008	O
,	O
Intel	O
proposed	O
the	O
AVX	B-General_Concept
instruction	B-General_Concept
set	I-General_Concept
,	O
using	O
the	O
new	O
VEX	B-General_Concept
coding	I-General_Concept
scheme	I-General_Concept
.	O
</s>
<s>
In	O
August	O
2008	O
,	O
commentators	O
deplored	O
the	O
expected	O
incompatibility	O
between	O
AMD	O
and	O
Intel	O
instruction	B-General_Concept
sets	I-General_Concept
,	O
and	O
proposed	O
that	O
AMD	O
revise	O
their	O
plans	O
and	O
replace	O
the	O
DREX	O
scheme	O
with	O
the	O
more	O
flexible	O
and	O
extensible	O
VEX	O
scheme	O
.	O
</s>
<s>
In	O
May	O
2009	O
,	O
AMD	O
announced	O
a	O
revision	O
of	O
the	O
proposed	O
SSE5	B-General_Concept
instruction	B-General_Concept
set	I-General_Concept
to	O
make	O
it	O
compatible	O
with	O
the	O
AVX	B-General_Concept
instruction	B-General_Concept
set	I-General_Concept
and	O
the	O
VEX	B-General_Concept
coding	I-General_Concept
scheme	I-General_Concept
.	O
</s>
<s>
The	O
revised	O
SSE5	B-General_Concept
is	O
called	O
XOP	B-General_Concept
.	O
</s>
<s>
The	O
AVX	B-General_Concept
instruction	B-General_Concept
set	I-General_Concept
is	O
supported	O
in	O
Intel	O
's	O
Sandy	B-Device
Bridge	I-Device
microprocessor	I-Device
architecture	I-Device
.	O
</s>
<s>
The	O
AVX	B-General_Concept
,	O
XOP	B-General_Concept
and	O
FMA4	B-General_Concept
instruction	I-General_Concept
sets	I-General_Concept
,	O
all	O
using	O
the	O
VEX	O
scheme	O
,	O
are	O
supported	O
in	O
the	O
AMD	O
Bulldozer	O
processor	O
.	O
</s>
<s>
The	O
FMA3	B-General_Concept
instruction	I-General_Concept
set	I-General_Concept
is	O
supported	O
in	O
Intel	O
Haswell	O
processors	O
.	O
</s>
