<s>
The	O
VAX	B-Device
8000	I-Device
is	O
a	O
discontinued	O
family	O
of	O
superminicomputers	B-Device
developed	O
and	O
manufactured	O
by	O
Digital	O
Equipment	O
Corporation	O
(	O
DEC	O
)	O
using	O
processors	O
implementing	O
the	O
VAX	B-Device
instruction	B-General_Concept
set	I-General_Concept
architecture	I-General_Concept
(	O
ISA	O
)	O
.	O
</s>
<s>
The	O
8000	O
series	O
was	O
introduced	O
in	O
October	O
1984	O
with	O
the	O
8600	O
,	O
taking	O
over	O
the	O
high-end	O
of	O
the	O
VAX	B-Device
lineup	O
.	O
</s>
<s>
As	O
with	O
other	O
VAX	B-Device
systems	O
,	O
they	O
were	O
sold	O
with	O
either	O
the	O
VMS	B-Operating_System
or	O
Ultrix	B-Operating_System
operating	O
systems	O
.	O
</s>
<s>
It	O
was	O
intended	O
that	O
the	O
8800	O
was	O
to	O
have	O
been	O
replaced	O
by	O
the	O
VAX	B-Device
9000	I-Device
on	O
the	O
high	O
end	O
,	O
but	O
the	O
VAX	B-Device
6000	I-Device
,	O
originally	O
a	O
mid-range	O
model	O
replacing	O
the	O
8700/8500	O
,	O
was	O
upgraded	O
to	O
provide	O
almost	O
the	O
same	O
level	O
of	O
performance	O
of	O
the	O
8800	O
but	O
at	O
half	O
the	O
cost	O
.	O
</s>
<s>
All	O
of	O
these	O
were	O
replaced	O
by	O
the	O
VAX	B-Device
7000/10000	I-Device
in	O
July	O
1992	O
.	O
</s>
<s>
These	O
are	O
single-chip	O
implementations	O
based	O
on	O
the	O
NVAX	B-Device
CPU	O
and	O
are	O
the	O
final	O
dedicated	O
VAX	B-Device
machines	O
.	O
</s>
<s>
The	O
VAX	B-Device
8600	I-Device
,	O
code-named	O
"	O
Venus	O
"	O
,	O
introduced	O
in	O
October	O
1984	O
,	O
is	O
the	O
successor	O
of	O
the	O
VAX-11/785	O
.	O
</s>
<s>
It	O
was	O
originally	O
to	O
be	O
named	O
"	O
VAX-11/790	O
"	O
,	O
but	O
was	O
renamed	O
before	O
launch	O
.	O
</s>
<s>
The	O
VAX	B-Device
8600	I-Device
was	O
a	O
successful	O
model	O
and	O
at	O
the	O
time	O
was	O
the	O
best	O
selling	O
high-end	O
VAX	B-Device
.	O
</s>
<s>
It	O
was	O
succeeded	O
by	O
the	O
VAX	B-Device
8800	I-Device
family	O
in	O
1987	O
.	O
</s>
<s>
The	O
VAX	B-Device
8600	I-Device
has	O
a	O
CPU	O
with	O
an	O
80	O
ns	O
cycle	O
time	O
(	O
12.5MHz	O
)	O
implemented	O
with	O
emitter	B-General_Concept
coupled	I-General_Concept
logic	I-General_Concept
(	O
ECL	O
)	O
macrocell	O
arrays	O
(	O
MCAs	O
)	O
.	O
</s>
<s>
The	O
E	O
Box	O
executes	O
all	O
instructions	O
,	O
including	O
floating-point	O
instructions	O
through	O
microcode	B-Device
.	O
</s>
<s>
It	O
has	O
an	O
arithmetic	B-General_Concept
logic	I-General_Concept
unit	I-General_Concept
(	O
ALU	O
)	O
and	O
barrel	O
shifter	O
.	O
</s>
<s>
They	O
are	O
packaged	O
in	O
68-pin	O
leadless	O
chip	O
carriers	O
or	O
pin	B-Algorithm
grid	I-Algorithm
arrays	I-Algorithm
and	O
are	O
mounted	O
onto	O
the	O
printed	O
circuit	O
board	O
in	O
sockets	O
or	O
soldered	O
in	O
place	O
.	O
</s>
<s>
These	O
ICs	O
are	O
spread	O
out	O
over	O
17	O
modules	O
plugged	O
into	O
a	O
backplane	B-Architecture
.	O
</s>
<s>
The	O
VAX	B-Device
8600	I-Device
supports	O
4	O
to	O
256MB	O
of	O
ECC	B-Error_Name
memory	O
and	O
has	O
eight	O
slots	O
on	O
the	O
backplane	B-Architecture
for	O
memory	O
modules	O
.	O
</s>
<s>
The	O
system	O
originally	O
used	O
4MB	O
memory	O
modules	O
populated	O
by	O
256KBit	O
metal	B-Architecture
oxide	I-Architecture
semiconductor	I-Architecture
(	O
MOS	O
)	O
RAMs	B-Architecture
,	O
which	O
limits	O
capacity	O
to	O
32MB	O
.	O
</s>
<s>
This	O
dedicated	O
bus	O
,	O
which	O
has	O
an	O
80	O
ns	O
(	O
12.5MHz	O
)	O
cycle	O
time	O
,	O
contributes	O
to	O
the	O
improved	O
performance	O
the	O
VAX	B-Device
8600	I-Device
has	O
over	O
the	O
VAX-11/780	O
,	O
which	O
access	O
memory	O
via	O
the	O
Synchronous	B-Architecture
Backplane	I-Architecture
Interconnect	I-Architecture
(	O
SBI	O
)	O
shared	O
with	O
I/O	O
devices	O
.	O
</s>
<s>
The	O
VAX	B-Device
8600	I-Device
features	O
one	O
SBI	O
but	O
could	O
be	O
configured	O
with	O
two	O
.	O
</s>
<s>
Unibus	B-Device
and	O
Massbus	B-Architecture
are	O
also	O
supported	O
,	O
provided	O
by	O
adapters	O
that	O
plug	O
into	O
the	O
SBI	O
.	O
</s>
<s>
The	O
VAX	B-Device
8600	I-Device
I/O	O
cabinet	O
contains	O
a	O
PDP-11	B-Device
computer	O
serving	O
as	O
the	O
console	B-Device
,	O
a	O
Unibus	B-Device
card	O
cage	O
and	O
provisions	O
for	O
mounting	O
disk	O
drives	O
.	O
</s>
<s>
The	O
VAX	B-Device
8650	I-Device
,	O
code-named	O
"	O
Morningstar	O
"	O
,	O
is	O
a	O
faster	O
version	O
of	O
the	O
VAX	B-Device
8600	I-Device
introduced	O
on	O
4	O
December	O
1985	O
.	O
</s>
<s>
It	O
was	O
originally	O
to	O
be	O
named	O
"	O
VAX-11/795	O
"	O
,	O
but	O
was	O
renamed	O
before	O
launch	O
.	O
</s>
<s>
The	O
VAX	B-Device
8600	I-Device
is	O
the	O
last	O
VAX	B-Device
to	O
be	O
100%	O
compatible	O
with	O
the	O
VAX-11/780	O
and	O
VAX-11/785	O
,	O
to	O
have	O
the	O
PDP-11	B-Device
compatibility	O
mode	O
,	O
and	O
to	O
use	O
the	O
SBI	O
also	O
used	O
by	O
the	O
VAX-11/78x	O
.	O
</s>
<s>
The	O
VAX	B-Device
8200	O
and	O
VAX	B-Device
8300	O
,	O
code	O
named	O
"	O
Scorpio	O
"	O
,	O
are	O
mid-range	O
minicomputers	O
introduced	O
on	O
29	O
January	O
1986	O
.	O
</s>
<s>
The	O
VAX	B-Device
8300	O
is	O
a	O
dual-processor	O
variant	O
of	O
the	O
VAX	B-Device
8200	O
and	O
,	O
with	O
the	O
VAX	B-Device
8800	I-Device
introduced	O
on	O
the	O
same	O
date	O
,	O
are	O
among	O
the	O
first	O
multiprocessor	B-Operating_System
VAX	B-Device
computers	O
.	O
</s>
<s>
They	O
use	O
the	O
KA820	O
CPU	O
module	O
containing	O
a	O
V-11	B-Device
microprocessor	O
operating	O
at	O
5MHz	O
(	O
200	O
ns	O
cycle	O
)	O
and	O
support	O
a	O
maximum	O
of	O
128MB	O
of	O
ECC	B-Error_Name
memory	O
.	O
</s>
<s>
It	O
has	O
one	O
VAXBI	B-Architecture
bus	I-Architecture
and	O
support	O
for	O
an	O
optional	O
Unibus	B-Device
.	O
</s>
<s>
The	O
VAX	B-Device
8250	O
and	O
VAX	B-Device
8350	O
are	O
faster	O
models	O
of	O
the	O
VAX	B-Device
8200	O
and	O
VAX	B-Device
8300	O
introduced	O
in	O
early	O
March	O
1987	O
.	O
</s>
<s>
They	O
use	O
the	O
KA825	O
CPU	O
module	O
containing	O
a	O
V-11	B-Device
microprocessor	O
operating	O
at	O
6.25MHz	O
(	O
160	O
ns	O
cycle	O
)	O
.	O
</s>
<s>
Code-named	O
"	O
Nautilus	O
"	O
,	O
this	O
is	O
the	O
high-end	O
model	O
in	O
the	O
VAX	B-Device
8800	I-Device
family	O
.	O
</s>
<s>
It	O
features	O
two	O
CPUs	O
and	O
two	O
VAXBI	B-Architecture
buses	O
as	O
standard	O
.	O
</s>
<s>
The	O
VAX	B-Device
8800	I-Device
CPU	O
is	O
a	O
heavily	O
pipelined	O
design	O
,	O
slightly	O
predating	O
the	O
first	O
commercial	O
MIPS	O
and	O
SPARC	O
designs	O
.	O
</s>
<s>
Development	O
of	O
the	O
VAX	B-Device
8800	I-Device
began	O
in	O
August	O
–	O
November	O
1982	O
and	O
it	O
was	O
introduced	O
on	O
29	O
January	O
1986	O
.	O
</s>
<s>
When	O
"	O
Polarstar	O
"	O
systems	O
and	O
a	O
new	O
naming	O
convention	O
were	O
introduced	O
,	O
the	O
VAX	B-Device
8800	I-Device
was	O
renamed	O
to	O
VAX	B-Device
8820N	O
to	O
distinguish	O
it	O
from	O
the	O
VAX	B-Device
8820	O
"	O
Polarstar	O
"	O
.	O
</s>
<s>
After	O
the	O
name	O
adjustments	O
and	O
upgrading	O
to	O
full	O
SMP	O
capability	O
,	O
the	O
former	O
VAX	B-Device
8700	O
and	O
VAX	B-Device
8800	I-Device
models	O
became	O
VAX	B-Device
88x0	O
machines	O
,	O
where	O
"	O
x	O
"	O
represented	O
the	O
number	O
of	O
CPUs	O
,	O
i.e.	O
</s>
<s>
VAX	B-Device
8810	O
,	O
8820	O
,	O
8830	O
and	O
8840	O
.	O
</s>
<s>
The	O
VAX	B-Device
8700	O
,	O
code-named	O
"	O
Nautilus	O
"	O
,	O
was	O
introduced	O
in	O
early	O
August	O
1986	O
.	O
</s>
<s>
It	O
is	O
similar	O
to	O
the	O
VAX	B-Device
8800	I-Device
,	O
but	O
with	O
one	O
CPU	O
and	O
VAXBI	B-Architecture
bus	I-Architecture
.	O
</s>
<s>
It	O
is	O
upgradable	O
to	O
a	O
VAX	B-Device
8800	I-Device
.	O
</s>
<s>
It	O
became	O
a	O
VAX	B-Device
8810	O
after	O
the	O
SMP	O
upgrade	O
and	O
revised	O
naming	O
convention	O
.	O
</s>
<s>
The	O
VAX	B-Device
8550	O
,	O
code-named	O
"	O
Skipjack	O
"	O
,	O
was	O
introduced	O
in	O
early	O
August	O
1986	O
.	O
</s>
<s>
It	O
is	O
similar	O
to	O
the	O
VAX	B-Device
8700	O
,	O
but	O
is	O
not	O
upgradable	O
to	O
the	O
VAX	B-Device
8800	I-Device
.	O
</s>
<s>
The	O
VAX	B-Device
8500	O
,	O
code-named	O
"	O
Flounder	O
"	O
,	O
is	O
a	O
lower-performance	O
variant	O
of	O
the	O
VAX	B-Device
8550	O
,	O
with	O
microcode	B-Device
used	O
to	O
insert	O
NOPs	B-Language
during	O
operation	O
to	O
limit	O
performance	O
.	O
</s>
<s>
The	O
VAX	B-Device
8530	O
,	O
code-named	O
"	O
Skipjack	O
"	O
,	O
is	O
an	O
upgraded	O
VAX	B-Device
8500	O
with	O
the	O
nops	B-Language
removed	O
for	O
improved	O
performance	O
.	O
</s>
<s>
Polarstar	O
is	O
a	O
variant	O
of	O
Nautilus	O
with	O
one	O
to	O
four	O
processors	O
and	O
an	O
updated	O
console	B-Device
processor	O
.	O
</s>
<s>
The	O
VAX	B-Device
8800	I-Device
family	O
is	O
based	O
on	O
the	O
NMI	O
bus	O
,	O
which	O
connects	O
the	O
CPU	O
,	O
memory	B-General_Concept
controller	I-General_Concept
and	O
I/O	O
adapters	O
.	O
</s>
<s>
The	O
VAX	B-Device
8800	I-Device
family	O
central	B-General_Concept
processing	I-General_Concept
unit	I-General_Concept
(	O
CPU	O
)	O
operates	O
at	O
22.22MHz	O
(	O
45	O
ns	O
cycle	O
time	O
)	O
and	O
is	O
implemented	O
with	O
discrete	O
emitter-coupled	B-General_Concept
logic	I-General_Concept
(	O
ECL	O
)	O
devices	O
spread	O
over	O
eight	O
modules	O
.	O
</s>
<s>
The	O
CPU	O
has	O
64KB	O
of	O
cache	O
implemented	O
with	O
10	O
ns	O
and	O
15	O
ns	O
ECL	O
random	B-Architecture
access	I-Architecture
memory	I-Architecture
devices	O
.	O
</s>
<s>
The	O
VAX	B-Device
8800	I-Device
and	O
8700	O
support	O
one	O
to	O
eight	O
memory	O
array	O
modules	O
;	O
the	O
VAX	B-Device
8550	O
and	O
8500	O
,	O
one	O
to	O
five	O
.	O
</s>
<s>
The	O
memory	O
array	O
modules	O
are	O
installed	O
in	O
a	O
dedicated	O
backplane	B-Architecture
separate	O
from	O
the	O
NMI	O
backplane	B-Architecture
.	O
</s>
<s>
The	O
VAX	B-Device
8800	I-Device
and	O
VAX	B-Device
8700	O
support	O
4	O
to	O
32MB	O
of	O
memory	O
,	O
the	O
VAX	B-Device
8500	O
and	O
VAX	B-Device
8550	O
4	O
to	O
20MB	O
,	O
using	O
the	O
4MB	O
memory	O
module	O
.	O
</s>
<s>
When	O
the	O
16MB	O
memory	O
module	O
was	O
introduced	O
,	O
the	O
memory	O
capacity	O
of	O
the	O
VAX	B-Device
8800	I-Device
and	O
8700	O
increased	O
to	O
128MB	O
,	O
and	O
that	O
of	O
the	O
VAX	B-Device
8550	O
and	O
8500	O
to	O
80MB	O
.	O
</s>
<s>
Additionally	O
when	O
the	O
64	O
MB	O
memory	O
module	O
was	O
introduced	O
,	O
the	O
memory	O
capacity	O
of	O
the	O
VAX	B-Device
8800	I-Device
and	O
8700	O
increased	O
to	O
512	O
MB	O
and	O
that	O
of	O
the	O
VAX	B-Device
8550	O
and	O
8500	O
to	O
320MB	O
.	O
</s>
<s>
The	O
memory	O
system	O
consists	O
of	O
three	O
major	O
parts	O
,	O
a	O
memory	B-General_Concept
controller	I-General_Concept
,	O
a	O
transistor-transistor	B-General_Concept
logic	I-General_Concept
(	O
TTL	B-General_Concept
)	O
bus	O
and	O
one	O
to	O
eight	O
memory	O
array	O
modules	O
.	O
</s>
<s>
The	O
memory	B-General_Concept
controller	I-General_Concept
is	O
implemented	O
with	O
ECL	O
gate	O
arrays	O
and	O
resides	O
on	O
an	O
NMI	O
bus	O
module	O
.	O
</s>
<s>
It	O
implements	O
a	O
TTL	B-General_Concept
bus	O
to	O
which	O
memory	O
array	O
modules	O
are	O
connected	O
.	O
</s>
<s>
Three	O
memory	O
modules	O
were	O
available	O
for	O
the	O
VAX	B-Device
8800	I-Device
:	O
a	O
4MB	O
module	O
,	O
a	O
16MB	O
module	O
and	O
a	O
64	O
MB	O
module	O
.	O
</s>
<s>
The	O
4MB	O
array	O
module	O
is	O
an	O
eight-layer	O
printed	O
circuit	O
board	O
populated	O
by	O
metal	B-Architecture
oxide	I-Architecture
semiconductor	I-Architecture
(	O
MOS	O
)	O
dynamic	O
random	B-Architecture
access	I-Architecture
memory	I-Architecture
(	O
DRAM	O
)	O
devices	O
and	O
medium-scale	O
integration	O
(	O
MSI	O
)	O
FAST	O
transistor-transistor	B-General_Concept
logic	I-General_Concept
(	O
TTL	B-General_Concept
)	O
devices	O
in	O
roughly	O
equal	O
numbers	O
.	O
</s>
<s>
The	O
VAX	B-Device
8800	I-Device
uses	O
the	O
VAXBI	B-Architecture
bus	I-Architecture
for	O
input/output	O
.	O
</s>
<s>
The	O
VAX	B-Device
8800	I-Device
supports	O
up	O
to	O
four	O
VAXBI	B-Architecture
buses	O
,	O
with	O
each	O
bus	O
supporting	O
up	O
to	O
16	O
I/O	O
devices	O
.	O
</s>
<s>
The	O
VAXBI	B-Architecture
bus	I-Architecture
is	O
interfaced	O
to	O
the	O
NMI	O
bus	O
by	O
a	O
NBI	O
adapter	O
containing	O
a	O
chip	O
implementing	O
the	O
VAXBI	B-Architecture
bus	I-Architecture
protocol	O
.	O
</s>
<s>
The	O
NBI	O
adapter	O
handles	O
all	O
CPU	O
references	O
and	O
direct	B-General_Concept
memory	I-General_Concept
access	I-General_Concept
(	O
DMA	O
)	O
transactions	O
to	O
and	O
from	O
the	O
I/O	O
devices	O
.	O
</s>
<s>
The	O
NBIA	O
is	O
the	O
NMI	O
side	O
of	O
the	O
adapter	O
,	O
and	O
the	O
NBIB	O
the	O
VAXBI	B-Architecture
side	O
.	O
</s>
<s>
The	O
VAX	B-Device
Console	B-Device
is	O
a	O
DEC	B-Device
Professional	I-Device
Series	I-Device
PC-38N	O
.	O
</s>
<s>
This	O
is	O
a	O
PRO-380	B-Device
with	O
a	O
real-time	O
interface	O
(	O
RTI	O
)	O
that	O
is	O
used	O
as	O
the	O
console	B-Device
for	O
the	O
Nautilus	O
family	O
of	O
processors	O
.	O
</s>
<s>
The	O
RTI	O
has	O
two	O
serial	O
line	O
units	O
:	O
one	O
connects	O
to	O
the	O
VAX	B-Device
environmental	O
monitoring	O
module	O
(	O
EMM	O
)	O
and	O
the	O
other	O
is	O
a	O
spare	O
that	O
can	O
be	O
used	O
for	O
data	O
transfer	O
.	O
</s>
<s>
The	O
RTI	O
's	O
programmable	O
24	O
bit	O
peripheral	O
interface	O
(	O
PPI	O
)	O
is	O
configured	O
as	O
three	O
8-bit	O
ports	O
for	O
data	O
,	O
address	O
,	O
and	O
control	O
signals	O
between	O
the	O
Nautilus	O
system	B-Device
console	I-Device
interface	O
and	O
the	O
VAX	B-Device
console	B-Device
.	O
</s>
<s>
The	O
console	B-Device
's	O
primary	O
function	O
is	O
to	O
bootstrap	O
the	O
system	O
.	O
</s>
<s>
The	O
Nautilus	O
family	O
of	O
processors	O
has	O
no	O
non-volatile	B-General_Concept
memory	I-General_Concept
.	O
</s>
<s>
The	O
console	B-Device
sets	O
configuration	O
registers	O
,	O
loads	O
CPU	O
microcode	B-Device
into	O
the	O
writeable	O
controls	O
store	O
,	O
performs	O
processor	O
module	O
diagnostic	O
tests	O
,	O
resets	O
the	O
TOY	O
clock	O
(	O
time-of-year	O
clock	O
)	O
,	O
logs	O
certain	O
types	O
of	O
errors	O
,	O
performs	O
other	O
supervisory	O
functions	O
,	O
and	O
is	O
the	O
interface	O
for	O
field	O
service	O
diagnosis	O
and	O
testing	O
.	O
</s>
