<s>
V-by-One	B-Algorithm
US	I-Algorithm
is	O
an	O
electrical	O
digital	O
signaling	O
standard	O
developed	O
by	O
THine	O
Electronics	O
.	O
</s>
<s>
THine	O
announced	O
the	O
development	O
of	O
the	O
transmission	O
lines	O
for	O
V-by-One	B-Algorithm
US	I-Algorithm
on	O
June	O
5	O
,	O
2017	O
.	O
</s>
<s>
It	O
enables	O
4K	B-Architecture
60Hz	O
displays	O
over	O
2	O
lanes	O
and	O
8K	B-Architecture
60Hz	O
displays	O
over	O
8	O
lanes	O
.	O
</s>
<s>
On	O
September	O
21	O
,	O
2018	O
,	O
the	O
company	O
announced	O
it	O
had	O
working	O
samples	O
of	O
the	O
V-by-One	B-Algorithm
US	I-Algorithm
chipset	O
ready	O
.	O
</s>
<s>
The	O
chipset	O
supports	O
two	O
16	O
Gbit/s	O
signalling	O
lanes	O
,	O
which	O
enables	O
a	O
4K	B-Architecture
display	I-Architecture
or	O
four	O
1080p	O
displays	O
at	O
60Hz	O
.	O
</s>
<s>
The	O
chipset	O
is	O
able	O
to	O
data	O
between	O
8-lane	O
V-by-One	O
HS	O
and	O
2-lane	O
V-by-One	B-Algorithm
US	I-Algorithm
.	O
</s>
<s>
August	O
13	O
,	O
2020	O
,	O
Silicon	O
Creations	O
announced	O
that	O
its	O
Deserializer	B-Application
PMA	O
was	O
used	O
as	O
a	O
V-by-One	O
HS	O
receiver	O
in	O
a	O
12nm	B-Algorithm
SoC	B-Architecture
aimed	O
at	O
8K	B-Architecture
TV	O
's	O
designed	O
by	O
Novatek	O
Microelectronics	O
.	O
</s>
