<s>
UltraRAM	B-General_Concept
is	O
a	O
novel	O
storage	B-General_Concept
device	I-General_Concept
that	O
is	O
under	O
development	O
.	O
</s>
<s>
The	O
Physics	O
and	O
Engineering	O
department	O
of	O
Lancaster	O
University	O
in	O
collaboration	O
with	O
Department	O
of	O
Physics	O
at	O
Warwick	O
published	O
a	O
paper	O
in	O
the	O
journal	O
of	O
suggesting	O
a	O
breakthrough	O
in	O
the	O
possibility	O
of	O
mass	O
production	O
of	O
UltraRAM	B-General_Concept
.	O
</s>
<s>
It	O
has	O
been	O
described	O
as	O
a	O
memory	O
storage	O
technology	O
that	O
"	O
combines	O
the	O
non-volatility	B-General_Concept
of	O
a	O
data	O
storage	B-General_Concept
memory	I-General_Concept
,	O
like	O
flash	B-Device
,	O
with	O
the	O
speed	O
,	O
energy-efficiency	O
,	O
and	O
endurance	O
of	O
a	O
working	O
memory	O
,	O
like	O
DRAM	O
"	O
.	O
</s>
<s>
While	O
the	O
Lancaster	O
team	O
performed	O
some	O
basic	O
experiments	O
to	O
demonstrate	O
the	O
principles	O
in	O
action	O
,	O
UltraRAM	B-General_Concept
remains	O
mostly	O
theoretical	O
at	O
the	O
moment	O
.	O
</s>
<s>
The	O
Lancaster	O
University	O
researchers	O
say	O
that	O
further	O
work	O
is	O
ongoing	O
to	O
improve	O
quality	O
,	O
fine-tune	O
the	O
fabrication	O
process	O
,	O
and	O
implement	O
and	O
scale	O
UltraRAM	B-General_Concept
devices	O
.	O
</s>
<s>
ULTRARAM	B-General_Concept
is	O
a	O
charge-based	O
memory	O
where	O
the	O
logic	O
state	O
is	O
determined	O
by	O
the	O
presence	O
or	O
absence	O
of	O
electrons	O
in	O
an	O
FG(Front Gate )	O
.	O
</s>
<s>
Due	O
to	O
the	O
low	O
voltages	O
required	O
and	O
the	O
low	O
capacitance	O
per	O
unit	O
area	O
of	O
the	O
device	O
compared	O
to	O
DRAM	O
,	O
ultralow	O
logic	O
state	O
switching	O
energies	O
of	O
10−17	O
J	O
are	O
predicted	O
for	O
20nm	O
feature	O
size	O
ULTRARAM	B-General_Concept
memories	O
,	O
which	O
is	O
two	O
and	O
three	O
orders	O
of	O
magnitude	O
lower	O
than	O
DRAM	O
and	O
flash	B-Device
respectively	O
.	O
</s>
<s>
ULTRARAM	B-General_Concept
prototype	O
devices	O
grown	O
on	O
GaAs	O
substrates	O
have	O
previously	O
exhibited	O
experiment-limited	O
,	O
not	O
device-limited	O
,	O
nonvolatile	O
retention	O
of	O
105	O
s	O
and	O
an	O
endurance	O
of	O
106	O
program-erase	O
cycles	O
.	O
</s>
<s>
InAs	O
channel	O
transistors	B-Application
with	O
submicrometer	O
feature	O
sizes	O
and	O
a	O
subthreshold	O
swing	O
of	O
<	O
100	O
mV/dec	O
have	O
previously	O
been	O
demonstrated	O
.	O
</s>
<s>
Consequently	O
,	O
due	O
to	O
the	O
threshold	O
voltage	O
window	O
of	O
350	O
mV	O
in	O
the	O
devices	O
designed	O
by	O
the	O
Lancaster	O
team	O
,	O
one	O
can	O
expect	O
the	O
0/1	O
current	O
contrast	O
of	O
ULTRARAM	B-General_Concept
to	O
improve	O
to	O
three	O
decades	O
with	O
the	O
implementation	O
of	O
a	O
normally-off	O
channel	O
.	O
</s>
<s>
Such	O
an	O
improvement	O
of	O
the	O
0/1	O
contrast	O
through	O
careful	O
modification	O
of	O
the	O
channel	O
will	O
allow	O
memory	O
arrays	O
to	O
be	O
built	O
with	O
a	O
novel	O
high-density	O
RAM	B-Architecture
architecture	O
.	O
</s>
<s>
The	O
ULTRARAM	B-General_Concept
on	O
silicon	O
devices	O
actually	O
outperform	O
previous	O
incarnations	O
of	O
the	O
technology	O
on	O
GaAs	O
compound	O
semiconductor	O
wafers	O
,	O
demonstrating	O
(	O
extrapolated	O
)	O
data	O
storage	O
times	O
of	O
at	O
least	O
1000	O
years	O
,	O
fast	O
switching	O
speed	O
(	O
for	O
device	O
size	O
)	O
and	O
program-erase	O
cycling	O
endurance	O
of	O
at	O
least	O
10	O
million	O
,	O
which	O
is	O
one	O
hundred	O
to	O
one	O
thousand	O
times	O
better	O
than	O
flash	B-Device
.	O
</s>
<s>
Professor	O
Manus	O
Hayne	O
of	O
the	O
Department	O
of	O
Physics	O
at	O
Lancaster	O
,	O
who	O
leads	O
the	O
work	O
said	O
,	O
"	O
ULTRARAM™	O
on	O
silicon	O
is	O
a	O
huge	O
advance	O
for	O
our	O
research	O
,	O
overcoming	O
very	O
significant	O
materials	O
challenges	O
of	O
large	O
crystalline	O
lattice	O
mismatch	O
,	O
the	O
change	O
from	O
elemental	O
to	O
compound	O
semiconductor	O
and	O
differences	O
in	O
thermal	O
contraction.	O
"	O
</s>
