<s>
The	O
Time	B-Device
Stamp	I-Device
Counter	I-Device
(	O
TSC	O
)	O
is	O
a	O
64-bit	O
register	B-General_Concept
present	O
on	O
all	O
x86	B-Operating_System
processors	O
since	O
the	O
Pentium	B-General_Concept
.	O
</s>
<s>
The	O
instruction	O
RDTSC	B-Device
returns	O
the	O
TSC	O
in	O
EDX:EAX	O
.	O
</s>
<s>
In	O
x86-64	B-Device
mode	O
,	O
RDTSC	B-Device
also	O
clears	O
the	O
upper	O
32	O
bits	O
of	O
RAX	O
and	O
RDX	O
.	O
</s>
<s>
Its	O
opcode	B-Language
is	O
0F	O
31	O
.	O
</s>
<s>
Pentium	B-General_Concept
competitors	O
such	O
as	O
the	O
Cyrix	B-General_Concept
6x86	I-General_Concept
did	O
not	O
always	O
have	O
a	O
TSC	O
and	O
may	O
consider	O
RDTSC	B-Device
an	O
illegal	O
instruction	O
.	O
</s>
<s>
Cyrix	O
included	O
a	O
Time	B-Device
Stamp	I-Device
Counter	I-Device
in	O
their	O
MII	O
.	O
</s>
<s>
The	O
Time	B-Device
Stamp	I-Device
Counter	I-Device
was	O
once	O
an	O
excellent	O
high-resolution	O
,	O
low-overhead	O
way	O
for	O
a	O
program	O
to	O
get	O
CPU	O
timing	O
information	O
.	O
</s>
<s>
With	O
the	O
advent	O
of	O
multi-core/hyper	O
-threaded	O
CPUs	O
,	O
systems	O
with	O
multiple	O
CPUs	O
,	O
and	O
hibernating	O
operating	B-General_Concept
systems	I-General_Concept
,	O
the	O
TSC	O
cannot	O
be	O
relied	O
upon	O
to	O
provide	O
accurate	O
results	O
—	O
unless	O
great	O
care	O
is	O
taken	O
to	O
correct	O
the	O
possible	O
flaws	O
:	O
rate	O
of	O
tick	O
and	O
whether	O
all	O
cores	O
(	O
processors	O
)	O
have	O
identical	O
values	O
in	O
their	O
time-keeping	O
registers	O
.	O
</s>
<s>
Even	O
then	O
,	O
the	O
CPU	O
speed	O
may	O
change	O
because	O
of	O
power-saving	O
measures	O
taken	O
by	O
the	O
OS	O
or	O
BIOS	B-Operating_System
,	O
or	O
the	O
system	O
may	O
be	O
hibernated	O
and	O
later	O
resumed	O
,	O
resetting	O
the	O
TSC	O
.	O
</s>
<s>
Recent	O
Intel	O
processors	O
include	O
a	O
constant	O
rate	O
TSC	O
(	O
identified	O
by	O
the	O
kern.timecounter.invariant_tsc	O
sysctl	O
on	O
FreeBSD	O
or	O
by	O
the	O
"	O
constant_tsc	O
"	O
flag	O
in	O
Linux	B-Application
's	O
/proc/cpuinfo	O
)	O
.	O
</s>
<s>
On	O
Windows	O
platforms	O
,	O
Microsoft	O
strongly	O
discourages	O
using	O
the	O
TSC	O
for	O
high-resolution	O
timing	O
for	O
exactly	O
these	O
reasons	O
,	O
providing	O
instead	O
the	O
Windows	B-Library
APIs	I-Library
QueryPerformanceCounter	O
and	O
QueryPerformanceFrequency	O
(	O
which	O
itself	O
uses	O
RDTSCP	O
if	O
the	O
system	O
has	O
an	O
invariant	O
TSC	O
,	O
i.e.	O
</s>
<s>
On	O
Linux	B-Application
systems	O
,	O
a	O
program	O
can	O
get	O
similar	O
function	O
by	O
reading	O
the	O
value	O
of	O
CLOCK_MONOTONIC_RAW	O
clock	O
using	O
the	O
clock_gettime	O
function	O
.	O
</s>
<s>
Starting	O
with	O
the	O
Pentium	B-Device
Pro	I-Device
,	O
Intel	O
processors	O
have	O
practiced	O
out-of-order	B-General_Concept
execution	I-General_Concept
,	O
where	O
instructions	O
are	O
not	O
necessarily	O
performed	O
in	O
the	O
order	O
they	O
appear	O
in	O
the	O
program	O
.	O
</s>
<s>
This	O
can	O
cause	O
the	O
processor	O
to	O
execute	O
RDTSC	B-Device
earlier	O
than	O
a	O
simple	O
program	O
expects	O
,	O
producing	O
a	O
misleading	O
cycle	O
count	O
.	O
</s>
<s>
The	O
programmer	O
can	O
solve	O
this	O
problem	O
by	O
inserting	O
a	O
serializing	O
instruction	O
,	O
such	O
as	O
CPUID	B-Architecture
,	O
to	O
force	O
every	O
preceding	O
instruction	O
to	O
complete	O
before	O
allowing	O
the	O
program	O
to	O
continue	O
.	O
</s>
<s>
The	O
RDTSCP	O
instruction	O
is	O
a	O
variant	O
of	O
RDTSC	B-Device
that	O
features	O
partial	O
serialization	O
of	O
the	O
instruction	O
stream	O
,	O
but	O
should	O
not	O
be	O
considered	O
as	O
serializing	O
.	O
</s>
<s>
For	O
Pentium	B-Architecture
M	I-Architecture
processors	O
(	O
family	O
[06H],	O
models	O
[	O
09H	O
,	O
0DH ]	O
)	O
;	O
for	O
Pentium	B-General_Concept
4	I-General_Concept
processors	O
,	O
Intel	B-Device
Xeon	I-Device
processors	O
(	O
family	O
[0FH],	O
models	O
[	O
00H	O
,	O
01H	O
,	O
or	O
02H ]	O
)	O
;	O
and	O
for	O
P6	O
family	O
processors	O
:	O
the	O
time-stamp	O
counter	O
increments	O
with	O
every	O
internal	O
processor	O
clock	O
cycle	O
.	O
</s>
<s>
For	O
Pentium	B-General_Concept
4	I-General_Concept
processors	O
,	O
Intel	B-Device
Xeon	I-Device
processors	O
(	O
family	O
[0FH],	O
models	O
[	O
03H	O
and	O
higher ]	O
)	O
;	O
for	O
Intel	O
Core	O
Solo	O
and	O
Intel	O
Core	O
Duo	O
processors	O
(	O
family	O
[06H],	O
model	O
 [ 0EH ] 	O
)	O
;	O
for	O
the	O
Intel	B-Device
Xeon	I-Device
processor	O
5100	O
series	O
and	O
Intel	O
Core	O
2	O
Duo	O
processors	O
(	O
family	O
[06H],	O
model	O
 [ 0FH ] 	O
)	O
;	O
for	O
Intel	O
Core	O
2	O
and	O
Intel	B-Device
Xeon	I-Device
processors	O
(	O
family	O
[06H],	O
display_model	O
 [ 17H ] 	O
)	O
;	O
for	O
Intel	B-Device
Atom	I-Device
processors	O
(	O
family	O
[06H],	O
display_model	O
 [ 1CH ] 	O
)	O
:	O
the	O
time-stamp	O
counter	O
increments	O
at	O
a	O
constant	O
rate	O
.	O
</s>
<s>
AMD	O
processors	O
up	O
to	O
the	O
K8	B-Device
core	O
always	O
incremented	O
the	O
time-stamp	O
counter	O
every	O
clock	O
cycle	O
.	O
</s>
<s>
Since	O
the	O
family	O
10h	O
(	O
Barcelona/Phenom	O
)	O
,	O
AMD	O
chips	O
feature	O
a	O
constant	O
TSC	O
,	O
which	O
can	O
be	O
driven	O
either	O
by	O
the	O
HyperTransport	B-Device
speed	O
or	O
the	O
highest	O
P	O
state	O
.	O
</s>
<s>
A	O
CPUID	B-Architecture
bit	O
(	O
Fn8000_0007:EDX_8	O
)	O
advertises	O
this	O
;	O
Intel-CPUs	O
also	O
report	O
their	O
invariant	O
TSC	O
on	O
that	O
bit	O
.	O
</s>
<s>
An	O
operating	B-General_Concept
system	I-General_Concept
may	O
provide	O
methods	O
that	O
both	O
use	O
and	O
do	O
n't	O
use	O
the	O
RDTSC	B-Device
instruction	O
for	O
time	O
keeping	O
,	O
under	O
administrator	O
control	O
.	O
</s>
<s>
For	O
example	O
,	O
on	O
some	O
versions	O
of	O
the	O
Linux	B-Application
kernel	O
,	O
seccomp	B-Application
sandboxing	I-Application
mode	I-Application
disables	O
RDTSC	B-Device
.	O
</s>
<s>
The	O
time	B-Device
stamp	I-Device
counter	I-Device
can	O
be	O
used	O
to	O
time	O
instructions	O
accurately	O
which	O
can	O
be	O
exploited	O
in	O
the	O
Meltdown	B-Architecture
and	O
Spectre	B-Error_Name
security	O
vulnerabilities	O
.	O
</s>
<s>
However	O
if	O
this	O
is	O
not	O
available	O
other	O
counters	O
or	O
timers	O
can	O
be	O
used	O
,	O
as	O
is	O
the	O
case	O
with	O
the	O
ARM	B-Architecture
processors	I-Architecture
vulnerable	O
to	O
this	O
type	O
of	O
attack	O
.	O
</s>
<s>
For	O
instance	O
,	O
on	O
the	O
AVR32	B-Device
,	O
it	O
is	O
called	O
the	O
Performance	O
Clock	O
Counter	O
(	O
PCCNT	O
)	O
register	B-General_Concept
.	O
</s>
<s>
SPARC	B-Architecture
V9	I-Architecture
provides	O
the	O
TICK	O
register	B-General_Concept
.	O
</s>
<s>
PowerPC	B-Architecture
provides	O
the	O
64-bit	O
TBR	O
register	B-General_Concept
.	O
</s>
<s>
ARMv7	O
provides	O
the	O
Cycle	O
Counter	O
Register	B-General_Concept
(	O
CCNT	O
instruction	O
)	O
to	O
read	O
and	O
write	O
the	O
counter	O
,	O
but	O
the	O
instruction	O
is	O
privileged	O
.	O
</s>
