<s>
Introduced	O
in	O
June	O
1976	O
,	O
the	O
TMS9900	B-General_Concept
was	O
one	O
of	O
the	O
first	O
commercially	O
available	O
,	O
single-chip	O
16-bit	B-Device
microprocessors	B-Architecture
.	O
</s>
<s>
It	O
implemented	O
Texas	O
Instruments	O
 '	O
TI-990	B-Device
minicomputer	B-Architecture
architecture	O
in	O
a	O
single-chip	O
format	O
,	O
and	O
was	O
initially	O
used	O
for	O
low-end	O
models	O
of	O
that	O
lineup	O
.	O
</s>
<s>
Its	O
64-pin	O
DIP	B-Algorithm
format	O
made	O
it	O
more	O
expensive	O
to	O
implement	O
in	O
smaller	O
machines	O
than	O
the	O
more	O
common	O
40-pin	O
format	O
,	O
and	O
it	O
saw	O
relatively	O
few	O
design	O
wins	O
outside	O
TI	O
's	O
own	O
use	O
.	O
</s>
<s>
Among	O
those	O
uses	O
was	O
their	O
TI-99/4	B-Device
and	I-Device
TI-99/4A	I-Device
home	O
computers	O
,	O
which	O
ultimately	O
sold	O
about	O
2.8	O
million	O
units	O
.	O
</s>
<s>
The	O
TMS99105/10	O
was	O
the	O
last	O
iteration	O
of	O
the	O
9900	O
in	O
1981	O
and	O
incorporated	O
features	O
of	O
TI	O
's	O
990/10	O
minicomputer	B-Architecture
.	O
</s>
<s>
By	O
the	O
mid-1980s	O
the	O
microcomputer	O
field	O
was	O
moving	O
to	O
16-bit	B-Device
systems	O
like	O
the	O
Intel	B-Device
8088	I-Device
and	O
newer	O
16/32	O
-bit	O
designs	O
like	O
the	O
Motorola	B-Device
68000	I-Device
.	O
</s>
<s>
With	O
no	O
obvious	O
future	O
for	O
the	O
chip	O
,	O
TI	O
turned	O
its	O
attention	O
to	O
special-purpose	O
processors	O
like	O
the	O
Texas	B-Architecture
Instruments	I-Architecture
TMS320	I-Architecture
,	O
introduced	O
in	O
1983	O
.	O
</s>
<s>
The	O
TMS9900	B-General_Concept
was	O
designed	O
as	O
a	O
single	O
chip	O
version	O
of	O
the	O
TI	B-Device
990	I-Device
minicomputer	B-Architecture
series	O
,	O
much	O
like	O
the	O
Intersil	B-General_Concept
6100	I-General_Concept
was	O
a	O
single	O
chip	O
PDP-8	B-Device
(	O
12	O
bit	O
)	O
,	O
and	O
the	O
Fairchild	B-General_Concept
9440	I-General_Concept
and	O
Data	O
General	O
mN601	O
were	O
both	O
one-chip	O
versions	O
of	O
Data	O
General	O
's	O
Nova	B-Device
.	O
</s>
<s>
Unlike	O
multi-chip	O
16-bit	B-Device
microprocessors	B-Architecture
such	O
as	O
the	O
National	B-Device
Semiconductor	I-Device
IMP-16	I-Device
or	O
DEC	O
LSI-11	O
,	O
some	O
of	O
which	O
predated	O
the	O
TMS9900	B-General_Concept
,	O
the	O
9900	O
was	O
a	O
single-chip	O
,	O
self-contained	O
16-bit	B-Device
microprocessor	B-Architecture
.	O
</s>
<s>
The	O
minicomputer	B-Architecture
roots	O
of	O
the	O
TMS9900	B-General_Concept
give	O
rise	O
to	O
a	O
number	O
of	O
architectural	O
features	O
that	O
are	O
not	O
commonly	O
found	O
on	O
designs	O
that	O
started	O
from	O
a	O
blank	O
sheet	O
.	O
</s>
<s>
Notable	O
among	O
these	O
was	O
the	O
TMS9900	B-General_Concept
's	O
use	O
of	O
processor	B-General_Concept
registers	I-General_Concept
that	O
are	O
mapped	O
into	O
main	O
memory	O
.	O
</s>
<s>
This	O
allows	O
for	O
fast	O
context	B-Operating_System
switching	I-Operating_System
,	O
which	O
can	O
be	O
accomplished	O
by	O
changing	O
a	O
single	O
register	B-General_Concept
,	O
the	O
Workspace	O
Pointer	O
,	O
to	O
point	O
to	O
the	O
first	O
entry	O
in	O
a	O
list	O
of	O
register	B-General_Concept
values	O
.	O
</s>
<s>
In	O
a	O
minicomputer	B-Architecture
implementation	O
with	O
fast	O
memory	O
,	O
the	O
effect	O
is	O
relatively	O
small	O
and	O
the	O
upside	O
in	O
a	O
real-time	O
or	O
multi-tasking	O
environment	O
is	O
significant	O
as	O
context	B-Operating_System
switches	I-Operating_System
are	O
common	O
.	O
</s>
<s>
The	O
40-pin	O
implementations	O
of	O
the	O
9900	O
included	O
128	O
or	O
256	O
bytes	O
of	O
fast	O
onboard	O
RAM	B-Architecture
for	O
registers	O
.	O
</s>
<s>
In	O
the	O
late	O
1970s	O
Walden	O
C	B-Algorithm
.	O
Rhines	O
gave	O
a	O
presentation	O
of	O
the	O
TMS99110	O
,	O
then	O
code-named	O
“	O
Alpha	O
”	O
,	O
to	O
an	O
IBM	O
group	O
developing	O
a	O
personal	O
computer	O
.	O
</s>
<s>
"	O
We	O
would	O
n't	O
know	O
until	O
1981	O
just	O
what	O
we	O
had	O
lost	O
"	O
because	O
IBM	O
chose	O
the	O
Intel	B-Device
8088	I-Device
for	O
the	O
IBM	B-Device
PC	I-Device
,	O
he	O
recalled	O
.	O
</s>
<s>
After	O
dropping	O
out	O
of	O
the	O
personal	O
computer	O
market	O
with	O
products	O
such	O
as	O
TI-99/4A	B-Device
,	O
the	O
company	O
microprocessor	B-Architecture
division	O
eventually	O
switched	O
focus	O
to	O
the	O
TMS320	B-Architecture
special-purpose	O
processor	O
series	O
.	O
</s>
<s>
The	O
TMS9900	B-General_Concept
has	O
three	O
internal	O
16-bit	B-Device
registers	O
—	O
Program	B-General_Concept
counter	I-General_Concept
(	O
PC	O
)	O
,	O
Status	B-General_Concept
register	I-General_Concept
(	O
ST	O
)	O
,	O
and	O
Workspace	O
Pointer	B-General_Concept
register	I-General_Concept
(	O
WP	O
)	O
.	O
</s>
<s>
The	O
WP	O
register	B-General_Concept
points	O
to	O
a	O
base	O
address	O
in	O
external	O
RAM	B-Architecture
where	O
the	O
processor	O
's	O
16	O
general	O
purpose	O
user	O
registers	O
(	O
each	O
16bits	O
wide	O
)	O
are	O
kept	O
.	O
</s>
<s>
This	O
architecture	O
allows	O
for	O
quick	O
context	B-Operating_System
switching	I-Operating_System
;	O
e.g.	O
</s>
<s>
when	O
a	O
subroutine	O
is	O
entered	O
,	O
only	O
the	O
single	O
workspace	O
register	B-General_Concept
needs	O
to	O
be	O
changed	O
instead	O
of	O
requiring	O
registers	O
to	O
be	O
saved	O
individually	O
.	O
</s>
<s>
The	O
TMS9900	B-General_Concept
is	O
a	O
classic	O
16	B-Device
bit	I-Device
machine	O
with	O
an	O
address	O
space	O
of	O
216	O
bytes	O
(	O
65,536	O
bytes	O
or	O
32,768	O
words	O
)	O
.	O
</s>
<s>
There	O
is	O
no	O
concept	O
of	O
a	O
stack	O
and	O
no	O
stack	O
pointer	B-General_Concept
register	I-General_Concept
.	O
</s>
<s>
Instead	O
,	O
branch	O
instructions	O
exist	O
that	O
save	O
the	O
program	B-General_Concept
counter	I-General_Concept
to	O
a	O
register	B-General_Concept
and	O
change	O
the	O
register	B-General_Concept
context	O
.	O
</s>
<s>
The	O
16	O
hardware	O
and	O
16	O
software	O
interrupt	O
vectors	O
each	O
consist	O
of	O
a	O
pair	O
of	O
PC	O
and	O
WP	O
values	O
,	O
so	O
the	O
register	B-General_Concept
context	B-Operating_System
switch	I-Operating_System
is	O
automatically	O
performed	O
by	O
an	O
interrupt	O
as	O
well	O
.	O
</s>
<s>
The	O
TMS9900	B-General_Concept
has	O
69	O
instructions	O
which	O
are	O
one	O
,	O
two	O
or	O
three	O
words	O
long	O
and	O
always	O
word-aligned	O
in	O
memory	O
.	O
</s>
<s>
The	O
instruction	O
set	O
is	O
fairly	O
orthogonal	B-General_Concept
,	O
meaning	O
that	O
with	O
few	O
exceptions	O
,	O
instructions	O
can	O
use	O
all	O
methods	O
of	O
accessing	O
operands	O
(	O
addressing	O
modes	O
)	O
.	O
</s>
<s>
Addressing	O
modes	O
include	O
Immediate	O
(	O
operand	O
in	O
instruction	O
)	O
,	O
Direct	O
or	O
"	O
Symbolic	O
"	O
(	O
operand	O
address	O
in	O
instruction	O
)	O
,	O
Register	B-General_Concept
(	O
operand	O
in	O
workspace	O
register	B-General_Concept
)	O
,	O
Register	B-General_Concept
Indirect	O
(	O
operand	O
address	O
in	O
workspace	O
register	B-General_Concept
)	O
with	O
or	O
without	O
auto-increment	O
,	O
Indexed	O
(	O
operand	O
address	O
in	O
instruction	O
indexed	O
with	O
workspace	O
register	B-General_Concept
content	O
)	O
,	O
and	O
Program	B-General_Concept
Counter	I-General_Concept
Relative	O
.	O
</s>
<s>
contain	O
2-bit	O
addressing	O
mode	O
and	O
4-bit	O
register	B-General_Concept
selector	O
fields	O
for	O
both	O
source	O
and	O
destination	O
operands	O
.	O
</s>
<s>
In	O
the	O
opcode	O
,	O
"	O
Symbolic	O
"	O
mode	O
is	O
represented	O
as	O
Indexed	O
mode	O
with	O
the	O
register	B-General_Concept
field	O
set	O
to	O
0	O
,	O
therefore	O
workspace	O
register	B-General_Concept
0	O
(	O
WR0	O
)	O
cannot	O
be	O
used	O
in	O
Indexed	O
mode	O
.	O
</s>
<s>
In	O
less	O
frequently	O
used	O
dual-operand	O
instructions	O
like	O
XOR	O
,	O
the	O
destination	O
operand	O
must	O
be	O
a	O
workspace	O
register	B-General_Concept
(	O
or	O
workspace	O
register	B-General_Concept
pair	O
in	O
the	O
case	O
of	O
multiply	O
and	O
divide	O
instructions	O
)	O
.	O
</s>
<s>
Using	O
BLWP/RTWP	O
,	O
it	O
is	O
possible	O
to	O
nest	O
subroutine	O
calls	O
despite	O
the	O
absence	O
of	O
a	O
stack	O
,	O
however	O
,	O
the	O
programmer	O
needs	O
to	O
assign	O
the	O
appropriate	O
register	B-General_Concept
workspace	O
explicitly	O
.	O
</s>
<s>
The	O
instruction	O
set	O
also	O
contains	O
a	O
Branch	O
and	O
Link	O
(	O
BL	O
)	O
opcode	O
that	O
only	O
saves	O
PC	O
to	O
register	B-General_Concept
11	O
without	O
changing	O
WP	O
.	O
</s>
<s>
The	O
TMS9900	B-General_Concept
supports	O
an	O
execute	B-General_Concept
instruction	I-General_Concept
"	O
X	O
"	O
(	O
eXecute	O
)	O
.	O
</s>
<s>
This	O
instruction	O
executes	B-General_Concept
the	O
instruction	O
in	O
a	O
register	B-General_Concept
.	O
</s>
<s>
The	O
TMS9900	B-General_Concept
also	O
supports	O
the	O
eXtended	O
OPeration	O
(	O
XOP	O
)	O
instruction	O
.	O
</s>
<s>
When	O
invoked	O
,	O
the	O
instruction	O
will	O
perform	O
a	O
context	B-Operating_System
switch	I-Operating_System
through	O
one	O
of	O
sixteen	O
vectors	O
at	O
predefined	O
locations	O
in	O
memory	O
.	O
</s>
<s>
The	O
XOP	O
instruction	O
also	O
places	O
the	O
effective	O
address	O
of	O
the	O
source	O
operand	O
in	O
register	B-General_Concept
11	O
of	O
the	O
new	O
workspace	O
.	O
</s>
<s>
XOP	O
is	O
less	O
flexible	O
than	O
a	O
BLWP	O
,	O
as	O
the	O
transfer	O
vectors	O
have	O
to	O
be	O
at	O
fixed	O
locations	O
,	O
but	O
allows	O
one	O
source	O
operand	O
to	O
be	O
directly	O
addressed	O
rather	O
than	O
passed	O
in	O
a	O
register	B-General_Concept
or	O
otherwise	O
.	O
</s>
<s>
Another	O
use	O
of	O
XOP	O
was	O
to	O
implement	O
instructions	O
in	O
software	O
which	O
might	O
be	O
handled	O
by	O
dedicated	O
hardware	O
in	O
future	O
versions	O
of	O
the	O
990	O
minicomputer	B-Architecture
series	O
.	O
</s>
<s>
In	O
typical	O
comparisons	O
with	O
the	O
Intel	B-General_Concept
8086	I-General_Concept
,	O
the	O
TMS9900	B-General_Concept
had	O
smaller	O
programs	O
.	O
</s>
<s>
Some	O
disadvantages	O
were	O
the	O
small	O
address	O
space	O
and	O
need	O
for	O
fast	O
RAM	B-Architecture
.	O
</s>
<s>
The	O
TMS9900	B-General_Concept
was	O
implemented	O
in	O
an	O
N-channel	O
silicon	O
gate	O
MOS	O
process	O
,	O
which	O
required	O
+5V	O
,	O
−5V	O
and	O
+12V	O
power	O
supplies	O
and	O
a	O
four-phase	O
(	O
non-overlapping	O
)	O
clock	O
with	O
a	O
maximum	O
frequency	O
of	O
3MHz	O
(	O
333	O
ns	O
cycle	O
)	O
,	O
usually	O
generated	O
from	O
a	O
48MHz	O
crystal	O
using	O
a	O
TIM9904	O
(	O
aka	O
74LS362	O
)	O
clock	O
generator	O
chip	O
.	O
</s>
<s>
The	O
chip	O
was	O
packaged	O
in	O
a	O
(	O
then	O
unusual	O
)	O
64-pin	O
,	O
0.9	O
"	O
wide	O
DIP	B-Algorithm
.	O
</s>
<s>
The	O
comparatively	O
large	O
number	O
of	O
pins	O
allowed	O
for	O
the	O
15-bit	O
(	O
word	O
)	O
address	B-Architecture
bus	I-Architecture
and	O
16-bit	B-Device
data	B-General_Concept
bus	I-General_Concept
to	O
be	O
brought	O
out	O
on	O
dedicated	O
pins	O
without	O
the	O
use	O
of	O
multiplexing	O
(	O
unlike	O
e.g.	O
</s>
<s>
the	O
Intel	B-General_Concept
8086	I-General_Concept
CPU	O
)	O
,	O
keeping	O
external	O
memory	O
connections	O
simple	O
.	O
</s>
<s>
All	O
internal	O
data	O
paths	O
and	O
the	O
ALU	B-General_Concept
are	O
16	B-Device
bits	I-Device
wide	O
.	O
</s>
<s>
The	O
processor	O
can	O
be	O
paused	O
with	O
the	O
address	B-Architecture
bus	I-Architecture
tri-stated	O
for	O
external	O
direct	B-General_Concept
memory	I-General_Concept
access	I-General_Concept
(	O
DMA	O
)	O
.	O
</s>
<s>
Memory	O
accesses	O
are	O
always	O
16	B-Device
bits	I-Device
wide	O
,	O
with	O
the	O
CPU	O
automatically	O
performing	O
read-before-write	O
operations	O
for	O
byte-wide	O
accesses	O
.	O
</s>
<s>
The	O
hardware	O
interrupt	O
system	O
supports	O
a	O
4-bit	O
interrupt	O
priority	O
input	O
,	O
which	O
needed	O
to	O
be	O
higher	O
than	O
the	O
priority	O
level	O
stored	O
in	O
the	O
status	B-General_Concept
register	I-General_Concept
(	O
bits	O
12−15	O
)	O
in	O
order	O
for	O
the	O
interrupt	O
request	O
to	O
be	O
served	O
.	O
</s>
<s>
The	O
TMS9900	B-General_Concept
CPU	O
also	O
contains	O
a	O
16-bit	B-Device
shift	B-General_Concept
register	I-General_Concept
(	O
"	O
CRU	O
"	O
)	O
designed	O
for	O
interfacing	O
with	O
external	O
shift	B-General_Concept
registers	I-General_Concept
,	O
with	O
dedicated	O
instructions	O
supporting	O
access	O
to	O
fields	O
of	O
1−16	O
bit	O
width	O
out	O
of	O
a	O
total	O
of	O
4096	O
addressable	O
bits	O
.	O
</s>
<s>
Parallel	O
peripherals	O
can	O
be	O
attached	O
in	O
memory-mapped	B-Architecture
fashion	O
to	O
the	O
regular	O
address	O
and	O
data	B-General_Concept
bus	I-General_Concept
.	O
</s>
<s>
The	O
TMS9900	B-General_Concept
was	O
used	O
in	O
the	O
TI-99/4	B-Device
and	I-Device
TI-99/4A	I-Device
home	O
computers	O
.	O
</s>
<s>
Unfortunately	O
,	O
to	O
reduce	O
the	O
production	O
costs	O
,	O
TI	O
chose	O
to	O
use	O
in	O
these	O
systems	O
just	O
128	O
16-bit	B-Device
words	O
of	O
the	O
fast	O
kind	O
of	O
RAM	B-Architecture
that	O
the	O
TMS9900	B-General_Concept
could	O
access	O
directly	O
.	O
</s>
<s>
The	O
rest	O
of	O
the	O
memory	O
was	O
16KB	O
of	O
8-bit	O
DRAM	O
that	O
was	O
accessible	O
only	O
indirectly	O
through	O
the	O
video	O
display	O
controller	O
,	O
which	O
crippled	O
the	O
performance	O
of	O
the	O
TI-99/4	B-Device
.	O
</s>
<s>
TI	O
developed	O
the	O
TM990	O
series	O
of	O
computer	O
modules	O
,	O
including	O
CPU	O
,	O
memory	O
,	O
I/O	O
,	O
which	O
when	O
plugged	O
into	O
a	O
card	O
frame	O
could	O
form	O
a	O
16-bit	B-Device
minicomputer	B-Architecture
.	O
</s>
<s>
A	O
microprocessor	B-Architecture
trainer	O
was	O
released	O
in	O
the	O
form	O
of	O
the	O
TM990/189	O
.	O
</s>
<s>
The	O
second	O
generation	O
of	O
the	O
TMS9900	B-General_Concept
family	O
of	O
microprocessors	B-Architecture
was	O
the	O
TMS9995	O
which	O
provided	O
"	O
functional	O
performance	O
at	O
speeds	O
3	O
times	O
faster	O
than	O
any	O
previous	O
9900	O
family	O
processor	O
"	O
,	O
largely	O
due	O
to	O
the	O
inclusion	O
of	O
instruction	O
prefetch	O
technology	O
.	O
</s>
<s>
In	O
the	O
home	O
computer	O
arena	O
,	O
the	O
TMS9995	O
only	O
found	O
use	O
in	O
the	O
Tomy	O
Tutor	O
,	O
an	O
esoteric	O
TI99-4/A	O
upgrade	O
called	O
the	O
Geneve	B-Device
9640	I-Device
,	O
and	O
a	O
project	O
printed	O
in	O
Electronics	O
Today	O
:	O
the	O
Powertran	O
Cortex	O
.	O
</s>
<s>
It	O
was	O
planned	O
to	O
be	O
used	O
in	O
the	O
TI-99/2	O
&	O
TI-99/8	O
computer	O
systems	O
,	O
but	O
neither	O
advanced	O
past	O
the	O
prototype	O
stage	O
.	O
</s>
<s>
TI	O
later	O
developed	O
the	O
more	O
powerful	O
TMS99000	O
family	O
of	O
microprocessors	B-Architecture
,	O
which	O
was	O
used	O
as	O
the	O
CPU	O
in	O
the	O
990/10A	O
minicomputer	B-Architecture
as	O
a	O
cost	O
reduction	O
.	O
</s>
<s>
Unfortunately	O
,	O
by	O
the	O
time	O
the	O
990/10A	O
made	O
it	O
to	O
market	O
,	O
the	O
end	O
of	O
the	O
minicomputer	B-Architecture
era	O
was	O
already	O
in	O
sight	O
.	O
</s>
<s>
The	O
TMS99000	O
family	O
includes	O
two	O
microprocessors	B-Architecture
,	O
the	O
TMS99105A	O
and	O
the	O
TMS99110A	O
,	O
which	O
are	O
identical	O
except	O
for	O
the	O
contents	O
of	O
on-chip	O
macrostore	O
ROM	O
memory	O
(	O
macrostore	O
memory	O
contains	O
added	O
functions	O
or	O
instructions	O
through	O
emulation	O
routines	O
written	O
in	O
standard	O
machine	O
code	O
)	O
.	O
</s>
<s>
The	O
on-chip	O
ROM	O
Macrostore	O
in	O
the	O
TMS99110A	O
microprocessor	B-Architecture
contains	O
floating	O
point	O
instructions	O
which	O
are	O
available	O
as	O
part	O
of	O
the	O
machine	O
language	O
instruction	O
set	O
,	O
while	O
the	O
baseline	O
TMS99105A	O
does	O
not	O
.	O
</s>
<s>
The	O
additional	O
instructions	O
includes	O
those	O
for	O
signed	O
multiply	O
and	O
divide	O
(	O
first	O
appearing	O
in	O
the	O
TMS9995	O
)	O
,	O
long-word	O
shift	O
,	O
add	O
,	O
and	O
subtract	O
;	O
load	O
status	B-General_Concept
register	I-General_Concept
,	O
load	O
workspace	O
pointer	O
,	O
stack	O
operations	O
,	O
multiprocessor	O
support	O
,	O
bit	O
manipulation	O
.	O
</s>
<s>
The	O
architecture	O
contains	O
many	O
other	O
advances	O
over	O
the	O
TMS9900	B-General_Concept
and	O
TMS9995	O
.	O
</s>
<s>
Model	O
Description	O
TI990/9	O
Early	O
multi-chip	O
CPU	O
for	O
minicomputer	B-Architecture
systems	O
,	O
1974	O
TI990/10	O
Multi-chip	O
implementation	O
for	O
minicomputer	B-Architecture
systems	O
,	O
1975	O
TI990/12	O
Multi-chip	O
implementation	O
,	O
faster	O
than	O
990/10	O
TMS9900	B-General_Concept
Single	O
chip	O
implementation	O
,	O
1976	O
,	O
used	O
in	O
the	O
TI-99/4	B-Device
( A	O
)	O
computer	O
TMS9940	O
Microcontroller	O
with	O
2KB	O
ROM	O
,	O
128B	O
RAM	B-Architecture
,	O
decrementer	O
,	O
CRU	O
bus	O
,	O
1979	O
TMS9980TMS9981	O
8-bit	O
databus	O
versions	O
of	O
TMS9900	B-General_Concept
TMS9985	O
TMS9940	O
with	O
8KB	O
ROM	O
,	O
256B	O
RAM	B-Architecture
,	O
and	O
an	O
8-bit	O
external	O
bus	O
,	O
c	B-Algorithm
.	O
1978	O
(	O
never	O
released	O
)	O
TMS9989	O
Improved	O
9980	O
,	O
used	O
in	O
military	O
hardware	O
TMS9995	O
Improved	O
TMS9985-like	O
,	O
no	O
ROM	O
.	O
</s>
