<s>
The	O
TMS1000	B-Device
is	O
a	O
family	O
of	O
microcontrollers	B-Architecture
introduced	O
by	O
Texas	O
Instruments	O
in	O
1974	O
.	O
</s>
<s>
It	O
combined	O
a	O
4-bit	O
central	O
processor	O
unit	O
,	O
read-only	B-Device
memory	I-Device
(	O
ROM	B-Device
)	O
,	O
random	O
access	O
memory	O
(	O
RAM	O
)	O
,	O
and	O
input/output	B-General_Concept
(	O
I/O	B-General_Concept
)	O
lines	O
as	O
a	O
complete	O
"	O
computer	O
on	O
a	O
chip	O
"	O
.	O
</s>
<s>
It	O
was	O
intended	O
for	O
embedded	B-Architecture
systems	I-Architecture
in	O
automobiles	O
,	O
appliances	O
,	O
games	O
,	O
and	O
measurement	O
instruments	O
.	O
</s>
<s>
It	O
was	O
the	O
first	O
high-volume	O
commercial	O
microcontroller	B-Architecture
(	O
As	O
described	O
later	O
,	O
the	O
predecessor	O
TMS0100	O
series	O
may	O
not	O
be	O
regarded	O
as	O
microcontrollers	B-Architecture
)	O
.	O
</s>
<s>
The	O
TMS	B-Device
1000	I-Device
was	O
used	O
in	O
Texas	O
Instruments	O
 '	O
own	O
Speak	B-Application
&	I-Application
Spell	I-Application
educational	O
toy	O
,	O
the	O
Big	O
Trak	O
programmable	O
toy	O
vehicle	O
and	O
in	O
the	O
electronic	O
game	O
Simon	B-Application
.	O
</s>
<s>
The	O
Smithsonian	O
Institution	O
says	O
TI	O
engineers	O
Gary	O
Boone	O
and	O
Michael	O
Cochran	O
succeeded	O
in	O
creating	O
the	O
first	O
microcontroller	B-Architecture
(	O
also	O
called	O
a	O
microcomputer	B-Architecture
)	O
in	O
1971	O
.	O
</s>
<s>
The	O
TMS1802NC	O
was	O
a	O
single-chip	O
microcontroller	B-Architecture
which	O
was	O
announced	O
September	O
17	O
,	O
1971	O
and	O
implemented	O
a	O
four-function	O
calculator	O
.	O
</s>
<s>
The	O
TMS1802NC	O
,	O
despite	O
its	O
designation	O
,	O
was	O
not	O
part	O
of	O
the	O
TMS	B-Device
1000	I-Device
series	O
;	O
it	O
was	O
later	O
redesignated	O
TMS0102	O
as	O
part	O
of	O
the	O
TMS	O
0100	O
series	O
,	O
which	O
was	O
used	O
in	O
the	O
TI	O
Datamath	O
calculator	O
and	O
the	O
Sinclair	B-Device
Executive	I-Device
calculator	O
.	O
</s>
<s>
The	O
TMS0100	O
series	O
may	O
not	O
be	O
considered	O
microcontrollers	B-Architecture
.	O
</s>
<s>
The	O
later	O
TMS	B-Device
1000	I-Device
series	O
went	O
on	O
the	O
market	O
in	O
1974	O
.	O
</s>
<s>
TI	O
stressed	O
the	O
4-bit	O
TMS	B-Device
1000	I-Device
for	O
use	O
in	O
pre-programmed	O
embedded	O
applications	O
.	O
</s>
<s>
A	O
computer-on-a-chip	O
combines	O
the	O
microprocessor	O
core	O
(	O
CPU	O
)	O
,	O
memory	O
,	O
and	O
I/O	B-General_Concept
(	O
input/output	B-General_Concept
)	O
lines	O
onto	O
one	O
chip	O
.	O
</s>
<s>
The	O
computer-on-a-chip	O
patent	O
,	O
called	O
the	O
"	O
microcomputer	B-Architecture
patent	O
"	O
at	O
the	O
time	O
,	O
,	O
was	O
awarded	O
to	O
Gary	O
Boone	O
and	O
Michael	O
J	O
.	O
Cochran	O
of	O
TI	O
.	O
</s>
<s>
Aside	O
from	O
this	O
patent	O
,	O
the	O
standard	O
meaning	O
of	O
microcomputer	B-Architecture
is	O
a	O
computer	O
using	O
one	O
or	O
more	O
microprocessors	O
as	O
its	O
CPU(s )	O
,	O
while	O
the	O
concept	O
defined	O
in	O
the	O
patent	O
is	O
more	O
akin	O
to	O
a	O
microcontroller	B-Architecture
.	O
</s>
<s>
The	O
TMS1000	B-Device
family	O
eventually	O
included	O
variants	O
in	O
both	O
the	O
original	O
PMOS	B-Algorithm
logic	I-Algorithm
and	O
also	O
in	O
NMOS	B-Algorithm
and	O
CMOS	B-Device
.	O
</s>
<s>
Product	O
variations	O
included	O
different	O
sizes	O
of	O
ROM	B-Device
and	O
RAM	O
,	O
different	O
I/O	B-General_Concept
counts	O
,	O
and	O
ROMless	O
versions	O
intended	O
for	O
development	O
or	O
for	O
use	O
with	O
external	O
ROM	B-Device
.	O
</s>
<s>
The	O
original	O
TMS1000	B-Device
had	O
1024	O
x	O
8	O
bits	O
of	O
ROM	B-Device
,	O
64	O
x	O
4	O
bits	O
of	O
RAM	O
,	O
and	O
23	O
input/output	B-General_Concept
lines	O
.	O
</s>
<s>
The	O
TMS1000	B-Device
family	O
used	O
mask-programmed	B-Device
ROM	I-Device
.	O
</s>
<s>
Once	O
the	O
user	O
had	O
a	O
debugged	O
program	O
ready	O
to	O
be	O
committed	O
to	O
production	O
,	O
it	O
would	O
send	O
the	O
program	O
to	O
Texas	O
Instruments	O
who	O
would	O
then	O
make	O
a	O
special	O
mask	O
to	O
program	O
the	O
on-chip	O
ROM	B-Device
.	O
</s>
<s>
The	O
ROM	B-Device
could	O
not	O
be	O
altered	O
in	O
the	O
field	O
;	O
the	O
contents	O
were	O
fixed	O
by	O
the	O
patterns	O
laid	O
down	O
on	O
the	O
chip	O
by	O
the	O
manufacturer	O
.	O
</s>
<s>
Program	O
ROM	B-Device
and	O
data	O
RAM	O
were	O
separately	O
addressed	O
as	O
in	O
a	O
Harvard	B-Architecture
architecture	I-Architecture
;	O
this	O
became	O
a	O
typical	O
characteristic	O
of	O
microcontrollers	B-Architecture
by	O
many	O
other	O
manufacturers	O
.	O
</s>
<s>
The	O
ALU	B-General_Concept
had	O
a	O
carry	B-Algorithm
flag	I-Algorithm
to	O
indicate	O
overflow	O
and	O
facilitate	O
multiple	O
precision	O
arithmetic	O
.	O
</s>
<s>
The	O
program	O
counter	O
was	O
6	O
bits	O
wide	O
,	O
with	O
"	O
page	O
"	O
and	O
"	O
chapter	O
"	O
registers	O
to	O
address	O
up	O
to	O
2KB	O
of	O
ROM	B-Device
program	B-Device
memory	I-Device
.	O
</s>
<s>
No	O
stack	O
was	O
provided	O
,	O
but	O
a	O
register	O
was	O
provided	O
to	O
store	O
the	O
program	O
counter	O
and	O
carry	B-Algorithm
flag	I-Algorithm
to	O
allow	O
for	O
one	O
level	O
of	O
subroutine	O
(	O
some	O
members	O
of	O
the	O
family	O
allowed	O
for	O
2	O
or	O
3	O
levels	O
)	O
.	O
</s>
<s>
Some	O
models	O
had	O
as	O
few	O
as	O
4	O
I/O	B-General_Concept
lines	O
because	O
they	O
had	O
no	O
on-chip	O
ROM	B-Device
and	O
the	O
limited	O
number	O
of	O
package	O
pins	O
were	O
needed	O
to	O
access	O
off-chip	O
program	B-Device
memory	I-Device
.	O
</s>
<s>
One	O
version	O
had	O
special	O
outputs	O
for	O
driving	O
a	O
vacuum	B-General_Concept
fluorescent	I-General_Concept
display	I-General_Concept
,	O
and	O
a	O
programmable	O
logic	O
array	O
useful	O
for	O
driving	O
seven	B-General_Concept
segment	I-General_Concept
displays	I-General_Concept
.	O
</s>
<s>
PMOS	B-Algorithm
versions	O
ran	O
on	O
-9	O
or	O
-15	O
volts	O
and	O
consumed	O
around	O
6	O
mA	O
,	O
Output	O
logic	O
levels	O
were	O
therefore	O
not	O
compatible	O
with	O
TTL	B-General_Concept
logic	I-General_Concept
.	O
</s>
<s>
The	O
NMOS	B-Algorithm
and	O
CMOS	B-Device
parts	O
ran	O
on	O
a	O
TTL-style	O
+5	O
volts	O
and	O
could	O
interoperate	O
with	O
5	O
volt	O
logic	O
.	O
</s>
<s>
Each	O
instruction	O
took	O
between	O
10	O
and	O
15	O
microseconds	O
to	O
execute	O
on	O
the	O
NMOS	B-Algorithm
and	O
PMOS	B-Algorithm
parts	O
,	O
but	O
some	O
CMOS	B-Device
parts	O
could	O
be	O
run	O
as	O
fast	O
as	O
6	O
microseconds	O
.	O
</s>
<s>
The	O
TMS1000	B-Device
parts	O
were	O
packaged	O
in	O
through-hole	O
dual	B-Algorithm
in-line	I-Algorithm
packages	I-Algorithm
with	O
28	O
or	O
40	O
pins	O
,	O
but	O
some	O
models	O
for	O
prototyping	O
were	O
in	O
64-pin	O
packages	O
.	O
</s>
<s>
All	O
versions	O
had	O
a	O
temperature	O
range	O
of	O
0	O
to	O
70	O
degrees	O
C	B-Algorithm
.	O
</s>
<s>
Since	O
these	O
were	O
intended	O
as	O
single-chip	O
embedded	B-Architecture
systems	I-Architecture
,	O
no	O
special	O
support	O
chips	O
UARTs	O
,	O
etc	O
.	O
</s>
<s>
were	O
specifically	O
made	O
in	O
the	O
TMS	B-Device
1000	I-Device
family	O
.	O
</s>
