<s>
A	O
system	B-Algorithm
in	I-Algorithm
a	I-Algorithm
package	I-Algorithm
(	O
SiP	O
)	O
or	O
system-in-package	B-Algorithm
is	O
a	O
number	O
of	O
integrated	O
circuits	O
enclosed	O
in	O
one	O
or	O
more	O
chip	B-Algorithm
carrier	I-Algorithm
packages	O
that	O
may	O
be	O
stacked	O
using	O
package	B-Algorithm
on	I-Algorithm
package	I-Algorithm
.	O
</s>
<s>
Dies	O
containing	O
integrated	O
circuits	O
may	O
be	O
stacked	O
vertically	O
on	O
a	O
substrate	B-Architecture
.	O
</s>
<s>
Alternatively	O
,	O
with	O
a	O
flip	B-Device
chip	I-Device
technology	O
,	O
solder	O
bumps	O
are	O
used	O
to	O
join	O
stacked	O
chips	O
together	O
.	O
</s>
<s>
A	O
SiP	O
is	O
like	O
a	O
system	B-Architecture
on	I-Architecture
a	I-Architecture
chip	I-Architecture
(	O
SoC	O
)	O
but	O
less	O
tightly	O
integrated	O
and	O
not	O
on	O
a	O
single	O
semiconductor	O
die	O
.	O
</s>
<s>
SiP	O
dies	O
can	O
be	O
stacked	O
vertically	O
or	O
tiled	O
horizontally	O
,	O
with	O
techniques	O
like	O
chiplets	O
or	O
quilt	B-Algorithm
packaging	I-Algorithm
,	O
unlike	O
less	O
dense	O
multi-chip	B-Algorithm
modules	I-Algorithm
,	O
which	O
place	O
dies	O
horizontally	O
on	O
a	O
carrier	O
.	O
</s>
<s>
SiP	O
connects	O
the	O
dies	O
with	O
standard	O
off-chip	O
wire	B-Algorithm
bonds	I-Algorithm
or	O
solder	O
bumps	O
,	O
unlike	O
slightly	O
denser	O
three-dimensional	B-Architecture
integrated	I-Architecture
circuits	I-Architecture
which	O
connect	O
stacked	O
silicon	O
dies	O
with	O
conductors	O
running	O
through	O
the	O
die	O
.	O
</s>
<s>
An	O
example	O
SiP	O
can	O
contain	O
several	O
chipssuch	O
as	O
a	O
specialized	O
processor	B-General_Concept
,	O
DRAM	O
,	O
flash	O
memorycombined	O
with	O
passive	O
componentsresistors	O
and	O
capacitorsall	O
mounted	O
on	O
the	O
same	O
substrate	B-Architecture
.	O
</s>
<s>
This	O
means	O
that	O
a	O
complete	O
functional	O
unit	O
can	O
be	O
built	O
in	O
a	O
multi-chip	B-Algorithm
package	I-Algorithm
,	O
so	O
that	O
few	O
external	O
components	O
need	O
to	O
be	O
added	O
to	O
make	O
it	O
work	O
.	O
</s>
<s>
SiPs	O
are	O
in	O
contrast	O
to	O
the	O
common	O
system	B-Architecture
on	I-Architecture
a	I-Architecture
chip	I-Architecture
(	O
SoC	O
)	O
integrated	O
circuit	O
architecture	B-General_Concept
which	O
integrates	O
components	O
based	O
on	O
function	O
into	O
a	O
single	O
circuit	O
die	O
.	O
</s>
<s>
An	O
SoC	O
will	O
typically	O
integrate	O
a	O
CPU	O
,	O
graphics	O
and	O
memory	O
interfaces	O
,	O
hard-disk	O
and	O
USB	O
connectivity	O
,	O
random-access	B-Architecture
and	O
read-only	B-Device
memories	I-Device
and	O
secondary	O
storage	O
and/or	O
their	O
controllers	O
on	O
a	O
single	O
die	O
,	O
whereas	O
a	O
SiP	O
would	O
connect	O
these	O
modules	O
as	O
discrete	O
components	O
in	O
one	O
or	O
more	O
chip	B-Algorithm
carrier	I-Algorithm
packages	O
.	O
</s>
<s>
A	O
SiP	O
resembles	O
the	O
common	O
traditional	O
motherboard-based	O
PC	B-Device
architecture	B-General_Concept
,	O
which	O
separates	O
components	O
based	O
on	O
function	O
and	O
connects	O
them	O
through	O
a	O
central	O
interfacing	O
circuit	O
board	O
.	O
</s>
<s>
Hybrid	O
integrated	O
circuits	O
are	O
somewhat	O
similar	O
to	O
SiPs	O
,	O
however	O
they	O
tend	O
to	O
use	O
older	O
or	O
less	O
advanced	O
technology	O
(	O
tend	O
to	O
use	O
single	O
layer	O
circuit	O
boards	O
or	O
substrates	B-Architecture
,	O
not	O
use	O
die	O
stacking	O
,	O
use	O
wire	B-Algorithm
bonding	I-Algorithm
for	O
connecting	O
dies/devices	O
or	O
Small	O
outline	O
integrated	O
circuit	O
packages	O
instead	O
of	O
flip	B-Device
chip	I-Device
or	O
BGA	O
,	O
use	O
Dual	O
in-line	O
packages	O
,	O
or	O
Single	O
in-line	O
packages	O
for	O
interfacing	O
outside	O
the	O
Hybrid	O
IC	O
instead	O
of	O
BGA	O
,	O
etc	O
.	O
)	O
</s>
<s>
SiP	O
technology	O
is	O
primarily	O
being	O
driven	O
by	O
early	O
market	O
trends	O
in	O
wearables	B-Operating_System
,	O
mobile	O
devices	O
and	O
the	B-Operating_System
internet	I-Operating_System
of	I-Operating_System
things	I-Operating_System
which	O
do	O
not	O
demand	O
the	O
high	O
numbers	O
of	O
produced	O
units	O
as	O
in	O
the	O
established	O
consumer	O
and	O
business	O
SoC	O
market	O
.	O
</s>
<s>
As	O
the	B-Operating_System
internet	I-Operating_System
of	I-Operating_System
things	I-Operating_System
becomes	O
more	O
of	O
a	O
reality	O
and	O
less	O
of	O
a	O
vision	O
,	O
there	O
is	O
innovation	O
going	O
on	O
at	O
the	O
system	B-Architecture
on	I-Architecture
a	I-Architecture
chip	I-Architecture
and	O
SiP	O
level	O
so	O
that	O
microelectromechanical	B-Architecture
(	O
MEMS	B-Architecture
)	O
sensors	O
can	O
be	O
integrated	O
on	O
a	O
separate	O
die	O
and	O
control	O
the	O
connectivity	O
.	O
</s>
<s>
SiP	O
solutions	O
may	O
require	O
multiple	O
packaging	O
technologies	O
,	O
such	O
as	O
flip	B-Device
chip	I-Device
,	O
wire	B-Algorithm
bonding	I-Algorithm
,	O
wafer-level	O
packaging	O
and	O
more	O
.	O
</s>
