<s>
Symmetric	B-Operating_System
multiprocessing	I-Operating_System
or	O
shared-memory	B-Operating_System
multiprocessing	B-Operating_System
(	O
SMP	O
)	O
involves	O
a	O
multiprocessor	B-Operating_System
computer	O
hardware	O
and	O
software	O
architecture	O
where	O
two	O
or	O
more	O
identical	O
processors	O
are	O
connected	O
to	O
a	O
single	O
,	O
shared	O
main	O
memory	O
,	O
have	O
full	O
access	O
to	O
all	O
input	O
and	O
output	O
devices	O
,	O
and	O
are	O
controlled	O
by	O
a	O
single	O
operating	B-General_Concept
system	I-General_Concept
instance	O
that	O
treats	O
all	O
processors	O
equally	O
,	O
reserving	O
none	O
for	O
special	O
purposes	O
.	O
</s>
<s>
Most	O
multiprocessor	B-Operating_System
systems	O
today	O
use	O
an	O
SMP	O
architecture	O
.	O
</s>
<s>
In	O
the	O
case	O
of	O
multi-core	B-Architecture
processors	I-Architecture
,	O
the	O
SMP	O
architecture	O
applies	O
to	O
the	O
cores	O
,	O
treating	O
them	O
as	O
separate	O
processors	O
.	O
</s>
<s>
Professor	O
John	O
D	O
.	O
Kubiatowicz	O
considers	O
traditionally	O
SMP	O
systems	O
to	O
contain	O
processors	O
without	O
caches	B-General_Concept
.	O
</s>
<s>
Culler	O
and	O
Pal-Singh	O
in	O
their	O
1998	O
book	O
"	O
Parallel	B-Operating_System
Computer	I-Operating_System
Architecture	O
:	O
A	O
Hardware/Software	O
Approach	O
"	O
mention	O
:	O
"	O
The	O
term	O
SMP	O
is	O
widely	O
used	O
but	O
causes	O
a	O
bit	O
of	O
confusion	O
.	O
</s>
<s>
 [ ... ] 	O
The	O
more	O
precise	O
description	O
of	O
what	O
is	O
intended	O
by	O
SMP	O
is	O
a	O
shared	B-Operating_System
memory	I-Operating_System
multiprocessor	B-Operating_System
where	O
the	O
cost	O
of	O
accessing	O
a	O
memory	O
location	O
is	O
the	O
same	O
for	O
all	O
processors	O
;	O
that	O
is	O
,	O
it	O
has	O
uniform	O
access	O
costs	O
when	O
the	O
access	O
actually	O
is	O
to	O
memory	O
.	O
</s>
<s>
If	O
the	O
location	O
is	O
cached	O
,	O
the	O
access	O
will	O
be	O
faster	O
,	O
but	O
cache	B-General_Concept
access	O
times	O
and	O
memory	O
access	O
times	O
are	O
the	O
same	O
on	O
all	O
processors.	O
"	O
</s>
<s>
SMP	O
systems	O
are	O
tightly	O
coupled	O
multiprocessor	B-Operating_System
systems	O
with	O
a	O
pool	O
of	O
homogeneous	O
processors	O
running	O
independently	O
of	O
each	O
other	O
.	O
</s>
<s>
Each	O
processor	O
,	O
executing	O
different	O
programs	O
and	O
working	O
on	O
different	O
sets	O
of	O
data	O
,	O
has	O
the	O
capability	O
of	O
sharing	O
common	O
resources	O
(	O
memory	O
,	O
I/O	O
device	O
,	O
interrupt	B-Application
system	O
and	O
so	O
on	O
)	O
that	O
are	O
connected	O
using	O
a	O
system	B-Architecture
bus	I-Architecture
or	O
a	O
crossbar	O
.	O
</s>
<s>
SMP	O
systems	O
have	O
centralized	O
shared	B-Operating_System
memory	I-Operating_System
called	O
main	O
memory	O
(	O
MM	O
)	O
operating	O
under	O
a	O
single	O
operating	B-General_Concept
system	I-General_Concept
with	O
two	O
or	O
more	O
homogeneous	O
processors	O
.	O
</s>
<s>
Usually	O
each	O
processor	O
has	O
an	O
associated	O
private	O
high-speed	O
memory	O
known	O
as	O
cache	B-General_Concept
memory	I-General_Concept
(	O
or	O
cache	B-General_Concept
)	O
to	O
speed	O
up	O
the	O
main	O
memory	O
data	O
access	O
and	O
to	O
reduce	O
the	O
system	B-Architecture
bus	I-Architecture
traffic	O
.	O
</s>
<s>
With	O
proper	O
operating	B-General_Concept
system	I-General_Concept
support	O
,	O
SMP	O
systems	O
can	O
easily	O
move	O
tasks	O
between	O
processors	O
to	O
balance	O
the	O
workload	O
efficiently	O
.	O
</s>
<s>
However	O
at	O
run-time	O
this	O
was	O
asymmetric	O
,	O
with	O
one	O
processor	O
restricted	O
to	O
application	O
programs	O
while	O
the	O
other	O
processor	O
mainly	O
handled	O
the	O
operating	B-General_Concept
system	I-General_Concept
and	O
hardware	O
interrupts	B-Application
.	O
</s>
<s>
IBM	O
offered	O
dual-processor	O
computer	O
systems	O
based	O
on	O
its	O
System/360	B-Application
Model	B-Device
65	I-Device
and	O
the	O
closely	O
related	O
Model	B-Device
67	I-Device
and	O
67	O
–	O
2	O
.	O
</s>
<s>
The	O
operating	B-General_Concept
systems	I-General_Concept
that	O
ran	O
on	O
these	O
machines	O
were	O
OS/360	B-Application
M65MP	O
and	O
TSS/360	B-Application
.	O
</s>
<s>
Other	O
software	O
developed	O
at	O
universities	O
,	O
notably	O
the	O
Michigan	B-Application
Terminal	I-Application
System	I-Application
(	O
MTS	O
)	O
,	O
used	O
both	O
CPUs	O
.	O
</s>
<s>
In	O
OS/360	B-Application
M65MP	O
,	O
peripherals	O
could	O
generally	O
be	O
attached	O
to	O
either	O
processor	O
since	O
the	O
operating	B-Operating_System
system	I-Operating_System
kernel	I-Operating_System
ran	O
on	O
both	O
processors	O
(	O
though	O
with	O
a	O
"	O
big	O
lock	O
"	O
around	O
the	O
I/O	O
handler	O
)	O
.	O
</s>
<s>
The	O
MTS	O
supervisor	O
(	O
UMMPS	O
)	O
has	O
the	O
ability	O
to	O
run	O
on	O
both	O
CPUs	O
of	O
the	O
IBM	B-Device
System/360	I-Device
model	I-Device
67	I-Device
–	O
2	O
.	O
</s>
<s>
Other	O
mainframes	O
that	O
supported	O
SMP	O
included	O
the	O
UNIVAC	O
1108	O
II	O
,	O
released	O
in	O
1965	O
,	O
which	O
supported	O
up	O
to	O
three	O
CPUs	O
,	O
and	O
the	O
GE-635	B-Device
and	I-Device
GE-645	I-Device
,	O
although	O
GECOS	B-Application
on	O
multiprocessor	B-Operating_System
GE-635	B-Device
systems	O
ran	O
in	O
a	O
master-slave	O
asymmetric	O
fashion	O
,	O
unlike	O
Multics	B-Application
on	O
multiprocessor	B-Operating_System
GE-645	O
systems	O
,	O
which	O
ran	O
in	O
a	O
symmetric	O
fashion	O
.	O
</s>
<s>
Starting	O
with	O
its	O
version	O
7.0	O
(	O
1972	O
)	O
,	O
Digital	O
Equipment	O
Corporation	O
's	O
operating	B-General_Concept
system	I-General_Concept
TOPS-10	B-Operating_System
implemented	O
the	O
SMP	O
feature	O
,	O
the	O
earliest	O
system	O
running	O
SMP	O
was	O
the	O
DECSystem	B-Device
1077	I-Device
dual	O
KI10	B-Device
processor	O
system	O
.	O
</s>
<s>
Later	O
KL10	B-Device
system	O
could	O
aggregate	O
up	O
to	O
8	O
CPUs	O
in	O
a	O
SMP	O
manner	O
.	O
</s>
<s>
In	O
contrast	O
,	O
DECs	O
first	O
multi-processor	B-Operating_System
VAX	B-Device
system	O
,	O
the	O
VAX-11/782	O
,	O
was	O
asymmetric	O
,	O
but	O
later	O
VAX	B-Device
multiprocessor	B-Operating_System
systems	O
were	O
SMP	O
.	O
</s>
<s>
Both	O
models	O
were	O
based	O
on	O
10MHz	O
National	O
Semiconductor	O
NS32032	B-Device
processors	O
,	O
each	O
with	O
a	O
small	O
write-through	O
cache	B-General_Concept
connected	O
to	O
a	O
common	O
memory	O
to	O
form	O
a	O
shared	B-Operating_System
memory	I-Operating_System
system	O
.	O
</s>
<s>
Another	O
early	O
commercial	O
Unix	O
SMP	O
implementation	O
was	O
the	O
NUMA	B-Operating_System
based	O
Honeywell	O
Information	O
Systems	O
Italy	O
XPS-100	O
designed	O
by	O
Dan	O
Gielan	O
of	O
VAST	O
Corporation	O
in	O
1985	O
.	O
</s>
<s>
The	O
operating	B-General_Concept
system	I-General_Concept
was	O
derived	O
and	O
ported	O
by	O
VAST	O
Corporation	O
from	O
AT&T	O
3B20	O
Unix	O
SysVr3	O
code	O
used	O
internally	O
within	O
AT&T	O
.	O
</s>
<s>
Earlier	O
non-commercial	O
multiprocessing	B-Operating_System
UNIX	O
ports	O
existed	O
,	O
including	O
a	O
port	O
named	O
MUNIX	O
created	O
at	O
the	O
Naval	O
Postgraduate	O
School	O
by	O
1975	O
.	O
</s>
<s>
Time-sharing	B-General_Concept
and	O
server	B-Application
systems	O
can	O
often	O
use	O
SMP	O
without	O
changes	O
to	O
applications	O
,	O
as	O
they	O
may	O
have	O
multiple	O
processes	B-Operating_System
running	O
in	O
parallel	O
,	O
and	O
a	O
system	O
with	O
more	O
than	O
one	O
process	O
running	O
can	O
run	O
different	O
processes	B-Operating_System
on	O
different	O
processors	O
.	O
</s>
<s>
On	O
personal	B-Device
computers	I-Device
,	O
SMP	O
is	O
less	O
useful	O
for	O
applications	O
that	O
have	O
not	O
been	O
modified	O
.	O
</s>
<s>
If	O
the	O
system	O
rarely	O
runs	O
more	O
than	O
one	O
process	O
at	O
a	O
time	O
,	O
SMP	O
is	O
useful	O
only	O
for	O
applications	O
that	O
have	O
been	O
modified	O
for	O
multithreaded	B-Operating_System
(	O
multitasked	O
)	O
processing	O
.	O
</s>
<s>
Custom-programmed	O
software	O
can	O
be	O
written	O
or	O
modified	O
to	O
use	O
multiple	O
threads	B-Operating_System
,	O
so	O
that	O
it	O
can	O
make	O
use	O
of	O
multiple	O
processors	O
.	O
</s>
<s>
Multithreaded	B-Operating_System
programs	O
can	O
also	O
be	O
used	O
in	O
time-sharing	B-General_Concept
and	O
server	B-Application
systems	O
that	O
support	O
multithreading	B-Operating_System
,	O
allowing	O
them	O
to	O
make	O
more	O
use	O
of	O
multiple	O
processors	O
.	O
</s>
<s>
To	O
solve	O
different	O
problems	O
and	O
tasks	O
,	O
SMP	O
applies	O
multiple	O
processors	O
to	O
that	O
one	O
problem	O
,	O
known	O
as	O
parallel	B-Operating_System
programming	I-Operating_System
.	O
</s>
<s>
However	O
,	O
there	O
are	O
a	O
few	O
limits	O
on	O
the	O
scalability	O
of	O
SMP	O
due	O
to	O
cache	B-General_Concept
coherence	I-General_Concept
and	O
shared	O
objects	O
.	O
</s>
<s>
This	O
is	O
because	O
hardware	O
interrupts	B-Application
usually	O
suspends	O
program	O
execution	O
while	O
the	O
kernel	B-Operating_System
that	O
handles	O
them	O
can	O
execute	O
on	O
an	O
idle	O
processor	O
instead	O
.	O
</s>
<s>
Some	O
applications	O
,	O
particularly	O
building	O
software	O
and	O
some	O
distributed	B-Architecture
computing	I-Architecture
projects	O
,	O
run	O
faster	O
by	O
a	O
factor	O
of	O
(	O
nearly	O
)	O
the	O
number	O
of	O
additional	O
processors	O
.	O
</s>
<s>
(	O
Compilers	O
by	O
themselves	O
are	O
single	B-Operating_System
threaded	I-Operating_System
,	O
but	O
,	O
when	O
building	O
a	O
software	O
project	O
with	O
multiple	O
compilation	O
units	O
,	O
if	O
each	O
compilation	O
unit	O
is	O
handled	O
independently	O
,	O
this	O
creates	O
an	O
embarrassingly	B-Operating_System
parallel	I-Operating_System
situation	O
across	O
the	O
entire	O
multi-compilation-unit	O
project	O
,	O
allowing	O
near	O
linear	O
scaling	O
of	O
compilation	O
time	O
.	O
</s>
<s>
Distributed	B-Architecture
computing	I-Architecture
projects	O
are	O
inherently	O
parallel	O
by	O
design	O
.	O
)	O
</s>
<s>
Systems	O
programmers	O
must	O
build	O
support	O
for	O
SMP	O
into	O
the	O
operating	B-General_Concept
system	I-General_Concept
,	O
otherwise	O
,	O
the	O
additional	O
processors	O
remain	O
idle	O
and	O
the	O
system	O
functions	O
as	O
a	O
uniprocessor	O
system	O
.	O
</s>
<s>
Conversely	O
,	O
asymmetric	B-Operating_System
multiprocessing	I-Operating_System
(	O
AMP	O
)	O
usually	O
allows	O
only	O
one	O
processor	O
to	O
run	O
a	O
program	O
or	O
task	O
at	O
a	O
time	O
.	O
</s>
<s>
In	O
cases	O
where	O
an	O
SMP	O
environment	O
processes	B-Operating_System
many	O
jobs	O
,	O
administrators	O
often	O
experience	O
a	O
loss	O
of	O
hardware	O
efficiency	O
.	O
</s>
<s>
Access	O
to	O
RAM	O
is	O
serialized	O
;	O
this	O
and	O
cache	B-General_Concept
coherency	I-General_Concept
issues	O
causes	O
performance	O
to	O
lag	O
slightly	O
behind	O
the	O
number	O
of	O
additional	O
processors	O
in	O
the	O
system	O
.	O
</s>
<s>
SMP	O
uses	O
a	O
single	O
shared	O
system	B-Architecture
bus	I-Architecture
that	O
represents	O
one	O
of	O
the	O
earliest	O
styles	O
of	O
multiprocessor	B-Operating_System
machine	O
architectures	O
,	O
typically	O
used	O
for	O
building	O
smaller	O
computers	O
with	O
up	O
to	O
8	O
processors	O
.	O
</s>
<s>
Larger	O
computer	O
systems	O
might	O
use	O
newer	O
architectures	O
such	O
as	O
NUMA	B-Operating_System
(	O
Non-Uniform	B-Operating_System
Memory	I-Operating_System
Access	I-Operating_System
)	O
,	O
which	O
dedicates	O
different	O
memory	O
banks	O
to	O
different	O
processors	O
.	O
</s>
<s>
In	O
a	O
NUMA	B-Operating_System
architecture	O
,	O
processors	O
may	O
access	O
local	O
memory	O
quickly	O
and	O
remote	B-General_Concept
memory	I-General_Concept
more	O
slowly	O
.	O
</s>
<s>
This	O
can	O
dramatically	O
improve	O
memory	O
throughput	O
as	O
long	O
as	O
the	O
data	O
are	O
localized	O
to	O
specific	O
processes	B-Operating_System
(	O
and	O
thus	O
processors	O
)	O
.	O
</s>
<s>
On	O
the	O
downside	O
,	O
NUMA	B-Operating_System
makes	O
the	O
cost	O
of	O
moving	O
data	O
from	O
one	O
processor	O
to	O
another	O
,	O
as	O
in	O
workload	O
balancing	O
,	O
more	O
expensive	O
.	O
</s>
<s>
The	O
benefits	O
of	O
NUMA	B-Operating_System
are	O
limited	O
to	O
particular	O
workloads	O
,	O
notably	O
on	O
servers	O
where	O
the	O
data	O
are	O
often	O
associated	O
strongly	O
with	O
certain	O
tasks	O
or	O
users	O
.	O
</s>
<s>
Finally	O
,	O
there	O
is	O
computer	O
clustered	O
multiprocessing	B-Operating_System
(	O
such	O
as	O
Beowulf	B-Operating_System
)	O
,	O
in	O
which	O
not	O
all	O
memory	O
is	O
available	O
to	O
all	O
processors	O
.	O
</s>
<s>
Variable	O
Symmetric	B-Operating_System
Multiprocessing	I-Operating_System
(	O
vSMP	O
)	O
is	O
a	O
specific	O
mobile	O
use	O
case	O
technology	O
initiated	O
by	O
NVIDIA	O
.	O
</s>
<s>
This	O
technology	O
includes	O
an	O
extra	O
fifth	O
core	O
in	O
a	O
quad-core	B-Architecture
device	O
,	O
called	O
the	O
Companion	O
core	O
,	O
built	O
specifically	O
for	O
executing	O
tasks	O
at	O
a	O
lower	O
frequency	O
during	O
mobile	O
active	O
standby	O
mode	O
,	O
video	O
playback	O
,	O
and	O
music	O
playback	O
.	O
</s>
<s>
This	O
technology	O
not	O
only	O
reduces	O
mobile	O
power	O
consumption	O
during	O
active	O
standby	O
state	O
,	O
but	O
also	O
maximizes	O
quad	B-Architecture
core	I-Architecture
performance	O
during	O
active	O
usage	O
for	O
intensive	O
mobile	O
applications	O
.	O
</s>
<s>
Unlike	O
current	O
SMP	O
architectures	O
,	O
the	O
vSMP	O
Companion	O
core	O
is	O
OS	O
transparent	O
meaning	O
that	O
the	O
operating	B-General_Concept
system	I-General_Concept
and	O
the	O
running	O
applications	O
are	O
totally	O
unaware	O
of	O
this	O
extra	O
core	O
but	O
are	O
still	O
able	O
to	O
take	O
advantage	O
of	O
it	O
.	O
</s>
<s>
Some	O
of	O
the	O
advantages	O
of	O
the	O
vSMP	O
architecture	O
includes	O
cache	B-General_Concept
coherency	I-General_Concept
,	O
OS	O
efficiency	O
,	O
and	O
power	O
optimization	O
.	O
</s>
<s>
Cache	B-General_Concept
coherency	I-General_Concept
:	O
There	O
are	O
no	O
consequences	O
for	O
synchronizing	O
caches	B-General_Concept
between	O
cores	O
running	O
at	O
different	O
frequencies	O
since	O
vSMP	O
does	O
not	O
allow	O
the	O
companion	O
core	O
and	O
the	O
main	O
cores	O
to	O
run	O
simultaneously	O
.	O
</s>
<s>
OS	O
efficiency	O
:	O
It	O
is	O
inefficient	O
when	O
multiple	O
CPU	B-Architecture
cores	I-Architecture
are	O
run	O
at	O
different	O
asynchronous	O
frequencies	O
because	O
this	O
could	O
lead	O
to	O
possible	O
scheduling	O
issues	O
.	O
</s>
<s>
With	O
vSMP	O
,	O
the	O
active	O
CPU	B-Architecture
cores	I-Architecture
will	O
run	O
at	O
similar	O
frequencies	O
to	O
optimize	O
OS	O
scheduling	O
.	O
</s>
