<s>
In	O
computer	B-General_Concept
science	I-General_Concept
,	O
stream	B-Application
processing	I-Application
(	O
also	O
known	O
as	O
event	B-Application
stream	I-Application
processing	I-Application
,	O
data	B-General_Concept
stream	B-Application
processing	I-Application
,	O
or	O
distributed	B-Architecture
stream	B-Application
processing	I-Application
)	O
is	O
a	O
programming	O
paradigm	O
which	O
views	O
data	B-General_Concept
streams	I-General_Concept
,	O
or	O
sequences	O
of	O
events	O
in	O
time	O
,	O
as	O
the	O
central	O
input	O
and	O
output	O
objects	O
of	O
computation	O
.	O
</s>
<s>
Stream	B-Application
processing	I-Application
encompasses	O
dataflow	B-Application
programming	I-Application
,	O
reactive	B-Architecture
programming	I-Architecture
,	O
and	O
distributed	B-Architecture
data	B-General_Concept
processing	I-General_Concept
.	O
</s>
<s>
Stream	B-Application
processing	I-Application
systems	I-Application
aim	O
to	O
expose	O
parallel	B-Operating_System
processing	I-Operating_System
for	O
data	B-General_Concept
streams	I-General_Concept
and	O
rely	O
on	O
streaming	O
algorithms	O
for	O
efficient	O
implementation	O
.	O
</s>
<s>
The	O
software	B-Application
stack	I-Application
for	O
these	O
systems	O
includes	O
components	O
such	O
as	O
programming	O
models	O
and	O
query	B-Language
languages	I-Language
,	O
for	O
expressing	O
computation	O
;	O
stream	O
management	O
systems	O
,	O
for	O
distribution	O
and	O
scheduling	O
;	O
and	O
hardware	O
components	O
for	O
acceleration	B-General_Concept
including	O
floating-point	B-General_Concept
units	I-General_Concept
,	O
graphics	B-Architecture
processing	I-Architecture
units	I-Architecture
,	O
and	O
field-programmable	B-Architecture
gate	I-Architecture
arrays	I-Architecture
.	O
</s>
<s>
The	O
stream	B-Application
processing	I-Application
paradigm	O
simplifies	O
parallel	O
software	O
and	O
hardware	O
by	O
restricting	O
the	O
parallel	B-Operating_System
computation	I-Operating_System
that	O
can	O
be	O
performed	O
.	O
</s>
<s>
Given	O
a	O
sequence	O
of	O
data	O
(	O
a	O
stream	O
)	O
,	O
a	O
series	O
of	O
operations	O
(	O
kernel	B-Operating_System
functions	I-Operating_System
)	O
is	O
applied	O
to	O
each	O
element	O
in	O
the	O
stream	O
.	O
</s>
<s>
Kernel	B-Operating_System
functions	I-Operating_System
are	O
usually	O
pipelined	B-General_Concept
,	O
and	O
optimal	O
local	O
on-chip	O
memory	O
reuse	O
is	O
attempted	O
,	O
in	O
order	O
to	O
minimize	O
the	O
loss	O
in	O
bandwidth	O
,	O
associated	O
with	O
external	O
memory	O
interaction	O
.	O
</s>
<s>
Uniform	O
streaming	O
,	O
where	O
one	O
kernel	B-Operating_System
function	O
is	O
applied	O
to	O
all	O
elements	O
in	O
the	O
stream	O
,	O
is	O
typical	O
.	O
</s>
<s>
Since	O
the	O
kernel	B-Operating_System
and	O
stream	O
abstractions	O
expose	O
data	O
dependencies	O
,	O
compiler	O
tools	O
can	O
fully	O
automate	O
and	O
optimize	O
on-chip	O
management	O
tasks	O
.	O
</s>
<s>
Stream	B-Application
processing	I-Application
hardware	O
can	O
use	O
scoreboarding	B-General_Concept
,	O
for	O
example	O
,	O
to	O
initiate	O
a	O
direct	B-General_Concept
memory	I-General_Concept
access	I-General_Concept
(	O
DMA	B-General_Concept
)	O
when	O
dependencies	O
become	O
known	O
.	O
</s>
<s>
The	O
elimination	O
of	O
manual	O
DMA	B-General_Concept
management	O
reduces	O
software	O
complexity	O
,	O
and	O
an	O
associated	O
elimination	O
for	O
hardware	O
cached	O
I/O	O
,	O
reduces	O
the	O
data	O
area	O
expanse	O
that	O
has	O
to	O
be	O
involved	O
with	O
service	O
by	O
specialized	O
computational	O
units	O
such	O
as	O
arithmetic	B-General_Concept
logic	I-General_Concept
units	I-General_Concept
.	O
</s>
<s>
During	O
the	O
1980s	O
stream	B-Application
processing	I-Application
was	O
explored	O
within	O
dataflow	B-Application
programming	I-Application
.	O
</s>
<s>
An	O
example	O
is	O
the	O
language	O
SISAL	B-Language
(	O
Streams	B-Language
and	I-Language
Iteration	I-Language
in	I-Language
a	I-Language
Single	I-Language
Assignment	I-Language
Language	I-Language
)	O
.	O
</s>
<s>
Stream	B-Application
processing	I-Application
is	O
essentially	O
a	O
compromise	O
,	O
driven	O
by	O
a	O
data-centric	O
model	O
that	O
works	O
very	O
well	O
for	O
traditional	O
DSP	B-Architecture
or	O
GPU-type	O
applications	O
(	O
such	O
as	O
image	O
,	O
video	O
and	O
digital	B-General_Concept
signal	I-General_Concept
processing	I-General_Concept
)	O
but	O
less	O
so	O
for	O
general	O
purpose	O
processing	O
with	O
more	O
randomized	O
data	O
access	O
(	O
such	O
as	O
databases	O
)	O
.	O
</s>
<s>
Depending	O
on	O
the	O
context	O
,	O
processor	B-General_Concept
design	O
may	O
be	O
tuned	O
for	O
maximum	O
efficiency	O
or	O
a	O
trade-off	O
for	O
flexibility	O
.	O
</s>
<s>
Stream	B-Application
processing	I-Application
is	O
especially	O
suitable	O
for	O
applications	O
that	O
exhibit	O
three	O
application	O
characteristics	O
:	O
</s>
<s>
Data	O
parallelism	B-Operating_System
exists	O
in	O
a	O
kernel	B-Operating_System
if	O
the	O
same	O
function	O
is	O
applied	O
to	O
all	O
records	O
of	O
an	O
input	O
stream	O
and	O
a	O
number	O
of	O
records	O
can	O
be	O
processed	O
simultaneously	O
without	O
waiting	O
for	O
results	O
from	O
previous	O
records	O
.	O
</s>
<s>
Intermediate	O
streams	O
passed	O
between	O
kernels	B-Operating_System
as	O
well	O
as	O
intermediate	O
data	O
within	O
kernel	B-Operating_System
functions	I-Operating_System
can	O
capture	O
this	O
locality	O
directly	O
using	O
the	O
stream	B-Application
processing	I-Application
programming	O
model	O
.	O
</s>
<s>
The	O
first	O
is	O
an	O
example	O
of	O
processing	O
a	O
data	B-General_Concept
stream	I-General_Concept
using	O
a	O
continuous	O
SQL	B-Language
query	O
(	O
a	O
query	O
that	O
executes	O
forever	O
processing	O
arriving	O
data	O
based	O
on	O
timestamps	O
and	O
window	O
duration	O
)	O
.	O
</s>
<s>
This	O
code	O
fragment	O
illustrates	O
a	O
JOIN	O
of	O
two	O
data	B-General_Concept
streams	I-General_Concept
,	O
one	O
for	O
stock	O
orders	O
,	O
and	O
one	O
for	O
the	O
resulting	O
stock	O
trades	O
.	O
</s>
<s>
Traditional	O
CPUs	B-General_Concept
are	O
SISD	B-Operating_System
based	O
,	O
which	O
means	O
they	O
conceptually	O
perform	O
only	O
one	O
operation	O
at	O
a	O
time	O
.	O
</s>
<s>
The	O
result	O
of	O
those	O
efforts	O
was	O
SIMD	B-Device
,	O
a	O
programming	O
paradigm	O
which	O
allowed	O
applying	O
one	O
instruction	O
to	O
multiple	O
instances	O
of	O
(	O
different	O
)	O
data	O
.	O
</s>
<s>
Most	O
of	O
the	O
time	O
,	O
SIMD	B-Device
was	O
being	O
used	O
in	O
a	O
SWAR	B-General_Concept
environment	O
.	O
</s>
<s>
By	O
using	O
more	O
complicated	O
structures	O
,	O
one	O
could	O
also	O
have	O
MIMD	B-Operating_System
parallelism	B-Operating_System
.	O
</s>
<s>
Although	O
those	O
two	O
paradigms	O
were	O
efficient	O
,	O
real-world	O
implementations	O
were	O
plagued	O
with	O
limitations	O
from	O
memory	B-Application
alignment	I-Application
problems	O
to	O
synchronization	O
issues	O
and	O
limited	O
parallelism	B-Operating_System
.	O
</s>
<s>
Only	O
few	O
SIMD	B-Device
processors	O
survived	O
as	O
stand-alone	O
components	O
;	O
most	O
were	O
embedded	O
in	O
standard	O
CPUs	B-General_Concept
.	O
</s>
<s>
Consider	O
a	O
simple	O
program	O
adding	O
up	O
two	O
arrays	B-Data_Structure
containing	O
100	O
4-component	O
vectors	O
(	O
i.e.	O
</s>
<s>
Although	O
this	O
is	O
what	O
happens	O
with	O
instruction	B-Application
intrinsics	I-Application
,	O
much	O
information	O
is	O
actually	O
not	O
taken	O
into	O
account	O
here	O
such	O
as	O
the	O
number	O
of	O
vector	O
components	O
and	O
their	O
data	O
format	O
.	O
</s>
<s>
What	O
happened	O
however	O
is	O
that	O
the	O
packed	O
SIMD	B-Device
register	O
holds	O
a	O
certain	O
amount	O
of	O
data	O
so	O
it	O
's	O
not	O
possible	O
to	O
get	O
more	O
parallelism	B-Operating_System
.	O
</s>
<s>
The	O
speed	O
up	O
is	O
somewhat	O
limited	O
by	O
the	O
assumption	O
we	O
made	O
of	O
performing	O
four	O
parallel	O
operations	O
(	O
please	O
note	O
this	O
is	O
common	O
for	O
both	O
AltiVec	B-General_Concept
and	O
SSE	B-General_Concept
)	O
.	O
</s>
<s>
After	O
that	O
,	O
the	O
result	O
is	O
inferred	O
from	O
the	O
sources	O
and	O
kernel	B-Operating_System
.	O
</s>
<s>
Applied	O
kernels	B-Operating_System
can	O
also	O
be	O
much	O
more	O
complex	O
.	O
</s>
<s>
This	O
allows	O
throughput	O
to	O
scale	O
with	O
chip	O
complexity	O
,	O
easily	O
utilizing	O
hundreds	O
of	O
ALUs	B-General_Concept
.	O
</s>
<s>
While	O
stream	B-Application
processing	I-Application
is	O
a	O
branch	O
of	O
SIMD/MIMD	O
processing	O
,	O
they	O
must	O
not	O
be	O
confused	O
.	O
</s>
<s>
Although	O
SIMD	B-Device
implementations	O
can	O
often	O
work	O
in	O
a	O
"	O
streaming	O
"	O
manner	O
,	O
their	O
performance	O
is	O
not	O
comparable	O
:	O
the	O
model	O
envisions	O
a	O
very	O
different	O
usage	O
pattern	O
which	O
allows	O
far	O
greater	O
performance	O
by	O
itself	O
.	O
</s>
<s>
By	O
contrast	O
,	O
ad-hoc	O
stream	O
processors	O
easily	O
reach	O
over	O
10x	O
performance	O
,	O
mainly	O
attributed	O
to	O
the	O
more	O
efficient	O
memory	O
access	O
and	O
higher	O
levels	O
of	O
parallel	B-Operating_System
processing	I-Operating_System
.	O
</s>
<s>
Although	O
there	O
are	O
various	O
degrees	O
of	O
flexibility	O
allowed	O
by	O
the	O
model	O
,	O
stream	O
processors	O
usually	O
impose	O
some	O
limitations	O
on	O
the	O
kernel	B-Operating_System
or	O
stream	O
size	O
.	O
</s>
<s>
Stanford	O
University	O
stream	B-Application
processing	I-Application
projects	O
included	O
the	O
Stanford	O
Real-Time	O
Programmable	O
Shading	O
Project	O
started	O
in	O
1999	O
.	O
</s>
<s>
AT&T	O
also	O
researched	O
stream-enhanced	O
processors	O
as	O
graphics	B-Architecture
processing	I-Architecture
units	I-Architecture
rapidly	O
evolved	O
in	O
both	O
speed	O
and	O
functionality	O
.	O
</s>
<s>
Since	O
these	O
early	O
days	O
,	O
dozens	O
of	O
stream	B-Application
processing	I-Application
languages	O
have	O
been	O
developed	O
,	O
as	O
well	O
as	O
specialized	O
hardware	O
.	O
</s>
<s>
The	O
most	O
immediate	O
challenge	O
in	O
the	O
realm	O
of	O
parallel	B-Operating_System
processing	I-Operating_System
does	O
not	O
lie	O
as	O
much	O
in	O
the	O
type	O
of	O
hardware	O
architecture	O
used	O
,	O
but	O
in	O
how	O
easy	O
it	O
will	O
be	O
to	O
program	O
the	O
system	O
in	O
question	O
in	O
a	O
real-world	O
environment	O
with	O
acceptable	O
performance	O
.	O
</s>
<s>
Machines	O
like	O
Imagine	O
use	O
a	O
straightforward	O
single-threaded	O
model	O
with	O
automated	O
dependencies	O
,	O
memory	O
allocation	O
and	O
DMA	B-General_Concept
scheduling	O
.	O
</s>
<s>
Of	O
particular	O
concern	O
are	O
MIMD	B-Operating_System
designs	O
such	O
as	O
Cell	B-General_Concept
,	O
for	O
which	O
the	O
programmer	O
needs	O
to	O
deal	O
with	O
application	O
partitioning	O
across	O
multiple	O
cores	O
and	O
deal	O
with	O
process	O
synchronization	O
and	O
load	O
balancing	O
.	O
</s>
<s>
A	O
drawback	O
of	O
SIMD	B-Device
programming	O
was	O
the	O
issue	O
of	O
array-of-structures	O
(	O
AoS	O
)	O
and	O
structure-of-arrays	O
(	O
SoA	O
)	O
.	O
</s>
<s>
When	O
multiple	O
of	O
these	O
structures	O
exist	O
in	O
memory	O
they	O
are	O
placed	O
end	O
to	O
end	O
creating	O
an	O
arrays	B-Data_Structure
in	O
an	O
array	B-General_Concept
of	I-General_Concept
structures	I-General_Concept
(	O
AoS	O
)	O
topology	O
.	O
</s>
<s>
Additionally	O
,	O
a	O
SIMD	B-Device
instruction	O
will	O
typically	O
expect	O
the	O
data	O
it	O
will	O
operate	O
on	O
to	O
be	O
continguous	O
in	O
memory	O
,	O
the	O
elements	O
may	O
also	O
need	O
to	O
be	O
aligned	B-Application
.	O
</s>
<s>
By	O
moving	O
the	O
memory	O
location	O
of	O
the	O
data	O
out	O
of	O
the	O
structure	O
data	O
can	O
be	O
better	O
organised	O
for	O
efficient	O
access	O
in	O
a	O
stream	O
and	O
for	O
SIMD	B-Device
instructions	O
to	O
operate	O
one	O
.	O
</s>
<s>
A	O
structure	B-General_Concept
of	I-General_Concept
arrays	I-General_Concept
(	O
SoA	O
)	O
,	O
as	O
shown	O
below	O
,	O
can	O
allow	O
this	O
.	O
</s>
<s>
Taking	O
GPUs	B-Architecture
as	O
reference	O
,	O
there	O
is	O
a	O
set	O
of	O
attributes	O
(	O
at	O
least	O
16	O
)	O
available	O
.	O
</s>
<s>
When	O
the	O
GPU	B-Architecture
begins	O
the	O
stream	B-Application
processing	I-Application
,	O
it	O
will	O
gather	O
all	O
the	O
various	O
attributes	O
in	O
a	O
single	O
set	O
of	O
parameters	O
(	O
usually	O
this	O
looks	O
like	O
a	O
structure	O
or	O
a	O
"	O
magic	O
global	O
variable	O
"	O
)	O
,	O
performs	O
the	O
operations	O
and	O
scatters	O
the	O
results	O
to	O
some	O
memory	O
area	O
for	O
later	O
processing	O
(	O
or	O
retrieving	O
)	O
.	O
</s>
<s>
More	O
modern	O
stream	B-Application
processing	I-Application
frameworks	O
provide	O
a	O
FIFO	O
like	O
interface	O
to	O
structure	O
data	O
as	O
a	O
literal	O
stream	O
.	O
</s>
<s>
One	O
of	O
the	O
simplest	O
and	O
most	O
efficient	O
stream	B-Application
processing	I-Application
modalities	O
to	O
date	O
for	O
C++	O
,	O
</s>
<s>
is	O
RaftLib	B-Language
,	O
which	O
enables	O
linking	O
independent	O
compute	B-Operating_System
kernels	I-Operating_System
together	O
as	O
a	O
data	B-Application
flow	I-Application
graph	O
using	O
C++	O
stream	O
operators	O
.	O
</s>
<s>
Apart	O
from	O
specifying	O
streaming	O
applications	O
in	O
high-level	O
languages	O
,	O
models	O
of	O
computation	O
(	O
MoCs	O
)	O
also	O
have	O
been	O
widely	O
used	O
as	O
dataflow	B-Application
models	O
and	O
process-based	O
models	O
.	O
</s>
<s>
Historically	O
,	O
CPUs	B-General_Concept
began	O
implementing	O
various	O
tiers	O
of	O
memory	O
access	O
optimizations	O
because	O
of	O
the	O
ever-increasing	O
performance	O
when	O
compared	O
to	O
relatively	O
slow	O
growing	O
external	O
memory	O
bandwidth	O
.	O
</s>
<s>
Since	O
fetching	O
information	O
and	O
opcodes	O
to	O
those	O
few	O
ALUs	B-General_Concept
is	O
expensive	O
,	O
very	O
little	O
die	O
area	O
is	O
dedicated	O
to	O
actual	O
mathematical	O
machinery	O
(	O
as	O
a	O
rough	O
estimation	O
,	O
consider	O
it	O
to	O
be	O
less	O
than	O
10%	O
)	O
.	O
</s>
<s>
GPUs	B-Architecture
do	O
exist	O
on	O
an	O
add-in	O
board	O
(	O
this	O
seems	O
to	O
also	O
apply	O
to	O
Imagine	O
)	O
.	O
</s>
<s>
CPUs	B-General_Concept
continue	O
do	O
the	O
job	O
of	O
managing	O
system	O
resources	O
,	O
running	O
applications	O
,	O
and	O
such	O
.	O
</s>
<s>
The	O
stream	O
processor	B-General_Concept
is	O
usually	O
equipped	O
with	O
a	O
fast	O
,	O
efficient	O
,	O
proprietary	O
memory	O
bus	O
(	O
crossbar	O
switches	O
are	O
now	O
common	O
,	O
multi-buses	O
have	O
been	O
employed	O
in	O
the	O
past	O
)	O
.	O
</s>
<s>
By	O
contrast	O
,	O
standard	O
processors	O
from	O
Intel	B-General_Concept
Pentium	I-General_Concept
to	O
some	O
Athlon	O
64	O
have	O
only	O
a	O
single	O
64-bit	O
wide	O
data	O
bus	O
.	O
</s>
<s>
While	O
arrays	B-Data_Structure
do	O
exist	O
,	O
their	O
dimension	O
is	O
fixed	O
at	O
kernel	B-Operating_System
invocation	O
.	O
</s>
<s>
Because	O
of	O
the	O
SIMD	B-Device
nature	O
of	O
the	O
stream	O
processor	B-General_Concept
's	O
execution	O
units	O
(	O
ALUs	B-General_Concept
clusters	O
)	O
,	O
read/write	O
operations	O
are	O
expected	O
to	O
happen	O
in	O
bulk	O
,	O
so	O
memories	O
are	O
optimized	O
for	O
high	O
bandwidth	O
rather	O
than	O
low	O
latency	O
(	O
this	O
is	O
a	O
difference	O
from	O
Rambus	O
and	O
DDR	O
SDRAM	O
,	O
for	O
example	O
)	O
.	O
</s>
<s>
Most	O
(	O
90%	O
)	O
of	O
a	O
stream	O
processor	B-General_Concept
's	O
work	O
is	O
done	O
on-chip	O
,	O
requiring	O
only	O
1%	O
of	O
the	O
global	O
data	O
to	O
be	O
stored	O
to	O
memory	O
.	O
</s>
<s>
This	O
is	O
where	O
knowing	O
the	O
kernel	B-Operating_System
temporaries	O
and	O
dependencies	O
pays	O
.	O
</s>
<s>
Internally	O
,	O
a	O
stream	O
processor	B-General_Concept
features	O
some	O
clever	O
communication	O
and	O
management	O
circuits	O
but	O
what	O
's	O
interesting	O
is	O
the	O
Stream	O
Register	O
File	O
(	O
SRF	O
)	O
.	O
</s>
<s>
This	O
is	O
conceptually	O
a	O
large	O
cache	O
in	O
which	O
stream	B-General_Concept
data	I-General_Concept
is	O
stored	O
to	O
be	O
transferred	O
to	O
external	O
memory	O
in	O
bulks	O
.	O
</s>
<s>
As	O
a	O
cache-like	O
software-controlled	O
structure	O
to	O
the	O
various	O
ALUs	B-General_Concept
,	O
the	O
SRF	O
is	O
shared	O
between	O
all	O
the	O
various	O
ALU	O
clusters	O
.	O
</s>
<s>
The	O
dependencies	O
between	O
kernel	B-Operating_System
functions	I-Operating_System
and	O
data	O
is	O
known	O
through	O
the	O
programming	O
model	O
which	O
enables	O
the	O
compiler	O
to	O
perform	O
flow	O
analysis	O
and	O
optimally	O
pack	O
the	O
SRFs	O
.	O
</s>
<s>
Commonly	O
,	O
this	O
cache	O
and	O
DMA	B-General_Concept
management	O
can	O
take	O
up	O
the	O
majority	O
of	O
a	O
project	O
's	O
schedule	O
,	O
something	O
the	O
stream	O
processor	B-General_Concept
(	O
or	O
at	O
least	O
Imagine	O
)	O
totally	O
automates	O
.	O
</s>
<s>
Internally	O
however	O
,	O
each	O
cluster	O
can	O
efficiently	O
exploit	O
a	O
much	O
lower	O
amount	O
of	O
ALUs	B-General_Concept
because	O
intra-cluster	O
communication	O
is	O
common	O
and	O
thus	O
needs	O
to	O
be	O
highly	O
efficient	O
.	O
</s>
<s>
To	O
keep	O
those	O
ALUs	B-General_Concept
fetched	O
with	O
data	O
,	O
each	O
ALU	O
is	O
equipped	O
with	O
local	O
register	O
files	O
(	O
LRFs	O
)	O
,	O
which	O
are	O
basically	O
its	O
usable	O
registers	O
.	O
</s>
<s>
Although	O
an	O
order	O
of	O
magnitude	O
speedup	O
can	O
be	O
reasonably	O
expected	O
(	O
even	O
from	O
mainstream	O
GPUs	B-Architecture
when	O
computing	O
in	O
a	O
streaming	O
manner	O
)	O
,	O
not	O
all	O
applications	O
benefit	O
from	O
this	O
.	O
</s>
<s>
Although	O
PCI	O
Express	O
improved	O
this	O
with	O
full-duplex	O
communications	O
,	O
getting	O
a	O
GPU	B-Architecture
(	O
and	O
possibly	O
a	O
generic	O
stream	O
processor	B-General_Concept
)	O
to	O
work	O
will	O
possibly	O
take	O
long	O
amounts	O
of	O
time	O
.	O
</s>
<s>
Because	O
changing	O
the	O
kernel	B-Operating_System
is	O
a	O
rather	O
expensive	O
operation	O
the	O
stream	O
architecture	O
also	O
incurs	O
penalties	O
for	O
small	O
streams	O
,	O
a	O
behaviour	O
referred	O
to	O
as	O
the	O
short	O
stream	O
effect	O
.	O
</s>
<s>
Pipelining	B-General_Concept
is	O
a	O
very	O
widespread	O
and	O
heavily	O
used	O
practice	O
on	O
stream	O
processors	O
,	O
with	O
GPUs	B-Architecture
featuring	O
pipelines	B-General_Concept
exceeding	O
200	O
stages	O
.	O
</s>
<s>
To	O
avoid	O
those	O
problems	O
at	O
various	O
levels	O
of	O
the	O
pipeline	B-General_Concept
,	O
many	O
techniques	O
have	O
been	O
deployed	O
such	O
as	O
"	O
über	O
shaders	O
"	O
and	O
"	O
texture	O
atlases	O
"	O
.	O
</s>
<s>
Those	O
techniques	O
are	O
game-oriented	O
because	O
of	O
the	O
nature	O
of	O
GPUs	B-Architecture
,	O
but	O
the	O
concepts	O
are	O
interesting	O
for	O
generic	O
stream	B-Application
processing	I-Application
as	O
well	O
.	O
</s>
<s>
The	O
Blitter	B-General_Concept
in	O
the	O
Commodore	B-Device
Amiga	I-Device
is	O
an	O
early	O
(	O
circa	O
1985	O
)	O
graphics	B-Architecture
processor	I-Architecture
capable	O
of	O
combining	O
three	O
source	O
streams	O
of	O
16	O
component	O
bit	O
vectors	O
in	O
256	O
ways	O
to	O
produce	O
an	O
output	O
stream	O
consisting	O
of	O
16	O
component	O
bit	O
vectors	O
.	O
</s>
<s>
The	O
devices	O
target	O
the	O
high	O
end	O
of	O
the	O
DSP	B-Architecture
market	O
including	O
video	B-Application
conferencing	I-Application
,	O
multifunction	O
printers	O
and	O
digital	O
video	O
surveillance	O
equipment	O
.	O
</s>
<s>
GPUs	B-Architecture
are	O
widespread	O
,	O
consumer-grade	O
stream	O
processors	O
designed	O
mainly	O
by	O
AMD	O
and	O
Nvidia	O
.	O
</s>
<s>
Various	O
generations	O
to	O
be	O
noted	O
from	O
a	O
stream	B-Application
processing	I-Application
point	O
of	O
view	O
:	O
</s>
<s>
Pre-R2xx/NV2x	O
:	O
no	O
explicit	O
support	O
for	O
stream	B-Application
processing	I-Application
.	O
</s>
<s>
Kernel	B-Operating_System
operations	O
were	O
hidden	O
in	O
the	O
API	B-General_Concept
and	O
provided	O
too	O
little	O
flexibility	O
for	O
general	O
use	O
.	O
</s>
<s>
R2xx/NV2x	O
:	O
kernel	B-Operating_System
stream	O
operations	O
became	O
explicitly	O
under	O
the	O
programmer	O
's	O
control	O
but	O
only	O
for	O
vertex	O
processing	O
(	O
fragments	O
were	O
still	O
using	O
old	O
paradigms	O
)	O
.	O
</s>
<s>
The	O
Cell	B-General_Concept
processor	B-General_Concept
from	O
STI	O
,	O
an	O
alliance	O
of	O
Sony	O
Computer	O
Entertainment	O
,	O
Toshiba	O
Corporation	O
,	O
and	O
IBM	O
,	O
is	O
a	O
hardware	O
architecture	O
that	O
can	O
function	O
like	O
a	O
stream	O
processor	B-General_Concept
with	O
appropriate	O
software	O
support	O
.	O
</s>
<s>
It	O
consists	O
of	O
a	O
controlling	O
processor	B-General_Concept
,	O
the	O
PPE	O
(	O
Power	O
Processing	O
Element	O
,	O
an	O
IBM	B-Architecture
PowerPC	I-Architecture
)	O
and	O
a	O
set	O
of	O
SIMD	B-Device
coprocessors	O
,	O
called	O
SPEs	O
(	O
Synergistic	O
Processing	O
Elements	O
)	O
,	O
each	O
with	O
independent	O
program	O
counters	O
and	O
instruction	O
memory	O
,	O
in	O
effect	O
a	O
MIMD	B-Operating_System
machine	O
.	O
</s>
<s>
In	O
the	O
native	O
programming	O
model	O
all	O
DMA	B-General_Concept
and	O
program	O
scheduling	O
is	O
left	O
up	O
to	O
the	O
programmer	O
.	O
</s>
<s>
Because	O
the	O
local	O
memory	O
for	O
instructions	O
and	O
data	O
is	O
limited	O
the	O
only	O
programs	O
that	O
can	O
exploit	O
this	O
architecture	O
effectively	O
either	O
require	O
a	O
tiny	O
memory	O
footprint	O
or	O
adhere	O
to	O
a	O
stream	B-Application
programming	I-Application
model	O
.	O
</s>
<s>
With	O
a	O
suitable	O
algorithm	O
the	O
performance	O
of	O
the	O
Cell	B-General_Concept
can	O
rival	O
that	O
of	O
pure	O
stream	O
processors	O
,	O
however	O
this	O
nearly	O
always	O
requires	O
a	O
complete	O
redesign	O
of	O
algorithms	O
and	O
software	O
.	O
</s>
<s>
Most	O
programming	O
languages	O
for	O
stream	O
processors	O
start	O
with	O
Java	O
,	O
C	O
or	O
C++	O
and	O
add	O
extensions	O
which	O
provide	O
specific	O
instructions	O
to	O
allow	O
application	O
developers	O
to	O
tag	O
kernels	B-Operating_System
and/or	O
streams	O
.	O
</s>
<s>
This	O
also	O
applies	O
to	O
most	O
shading	B-Language
languages	I-Language
,	O
which	O
can	O
be	O
considered	O
stream	B-Application
programming	I-Application
languages	O
to	O
a	O
certain	O
degree	O
.	O
</s>
<s>
Non-commercial	O
examples	O
of	O
stream	B-Application
programming	I-Application
languages	O
include	O
:	O
</s>
<s>
Auto-Pipe	O
,	O
from	O
the	O
Stream	O
Based	O
Supercomputing	O
Lab	O
at	O
Washington	O
University	O
in	O
St.	O
Louis	O
,	O
an	O
application	O
development	O
environment	O
for	O
streaming	O
applications	O
that	O
allows	O
authoring	O
of	O
applications	O
for	O
heterogeneous	O
systems	O
(	O
CPU	O
,	O
GPGPU	B-Architecture
,	O
FPGA	B-Architecture
)	O
.	O
</s>
<s>
Verilog	O
or	O
VHDL	O
for	O
FPGAs	B-Architecture
.	O
</s>
<s>
Cuda	B-Architecture
is	O
currently	O
used	O
for	O
Nvidia	O
GPGPUs	B-Architecture
.	O
</s>
<s>
CAL	B-Language
Actor	I-Language
Language	I-Language
:	O
a	O
high-level	O
programming	O
language	O
for	O
writing	O
(	O
dataflow	B-Application
)	O
actors	O
,	O
which	O
are	O
stateful	O
operators	O
that	O
transform	O
input	O
streams	O
of	O
data	O
objects	O
(	O
tokens	O
)	O
into	O
output	O
streams	O
.	O
</s>
<s>
WaveScript	O
functional	O
stream	B-Application
processing	I-Application
,	O
also	O
from	O
MIT	O
.	O
</s>
<s>
Functional	B-Application
reactive	I-Application
programming	I-Application
could	O
be	O
considered	O
stream	B-Application
processing	I-Application
in	O
a	O
broad	O
sense	O
.	O
</s>
<s>
IBM	O
Spade	O
-	O
Stream	B-Application
Processing	I-Application
Application	O
Declarative	O
Engine	O
(	O
B	O
.	O
Gedik	O
,	O
et	O
al	O
.	O
</s>
<s>
SPADE	O
:	O
the	O
system	O
S	O
declarative	O
stream	B-Application
processing	I-Application
engine	O
.	O
</s>
<s>
Stream	B-Application
processing	I-Application
services	O
:	O
</s>
