<s>
In	O
integrated	O
circuit	O
design	O
,	O
static	B-General_Concept
core	I-General_Concept
generally	O
refers	O
to	O
a	O
microprocessor	B-Architecture
(	O
MPU	O
)	O
entirely	O
implemented	O
in	O
static	B-General_Concept
logic	I-General_Concept
.	O
</s>
<s>
A	O
static	B-General_Concept
core	I-General_Concept
MPU	O
may	O
be	O
halted	O
by	O
stopping	O
the	O
system	O
clock	O
oscillator	O
that	O
is	O
driving	O
it	O
,	O
maintaining	O
its	O
state	O
and	O
resume	O
processing	O
at	O
the	O
point	O
where	O
it	O
was	O
stopped	O
when	O
the	O
clock	O
signal	O
is	O
restarted	O
,	O
as	O
long	O
as	O
power	O
continues	O
to	O
be	O
applied	O
.	O
</s>
<s>
Static	B-General_Concept
core	I-General_Concept
MPUs	O
are	O
fabricated	O
in	O
the	O
CMOS	B-Device
process	O
and	O
hence	O
consume	O
very	O
little	O
power	O
when	O
the	O
clock	O
is	O
stopped	O
,	O
making	O
them	O
useful	O
in	O
designs	O
in	O
which	O
the	O
MPU	O
remains	O
in	O
standby	O
mode	O
until	O
needed	O
and	O
minimal	O
loading	O
of	O
the	O
power	O
source	O
(	O
often	O
a	O
battery	O
)	O
is	O
desirable	O
during	O
standby	O
.	O
</s>
<s>
In	O
comparison	O
,	O
typical	O
microprocessor	B-Architecture
designs	O
,	O
those	O
without	O
a	O
static	B-General_Concept
core	I-General_Concept
,	O
only	O
refresh	O
and	O
present	O
valid	O
outputs	O
on	O
their	O
pins	O
during	O
specific	O
periods	O
of	O
the	O
clock	O
cycle	O
.	O
</s>
<s>
Static	B-General_Concept
core	I-General_Concept
microprocessors	B-Architecture
include	O
the	O
RCA	B-General_Concept
1802	I-General_Concept
,	O
Intel	B-Device
80386EX	I-Device
,	O
WDC	O
W65C02S	B-General_Concept
,	O
WDC	O
W65C816S	B-General_Concept
and	O
Freescale	B-Device
683XX	I-Device
family	O
.	O
</s>
<s>
Many	O
low-power	O
electronics	O
systems	O
are	O
designed	O
as	O
fully	O
static	O
systems	O
—	O
such	O
as	O
,	O
for	O
example	O
,	O
the	O
Psion	B-Application
Organiser	I-Application
,	O
the	O
TRS-80	B-Operating_System
Model	I-Operating_System
100	I-Operating_System
,	O
and	O
the	O
Galileo	O
spacecraft	O
.	O
</s>
<s>
In	O
such	O
a	O
fully	O
static	O
system	O
,	O
the	O
processor	O
has	O
a	O
static	B-General_Concept
core	I-General_Concept
and	O
data	O
is	O
stored	O
in	O
static	B-Architecture
RAM	I-Architecture
,	O
rather	O
than	O
dynamic	O
RAM	O
.	O
</s>
