<s>
The	O
Intel	O
Socket	B-Device
P	I-Device
(	O
mPGA478MN	B-Device
)	O
is	O
the	O
mobile	O
processor	B-General_Concept
socket	I-General_Concept
replacement	O
for	O
Core	B-Device
microarchitecture	I-Device
chips	O
such	O
as	O
Core	O
2	O
Duo	O
.	O
</s>
<s>
It	O
launched	O
on	O
May	O
9	O
,	O
2007	O
,	O
as	O
part	O
of	O
the	O
Santa	O
Rosa	O
platform	O
with	O
the	O
Merom	B-Device
and	O
Penryn	B-Device
processors	O
.	O
</s>
<s>
The	O
front-side	B-Architecture
bus	I-Architecture
(	O
FSB	O
)	O
of	O
CPUs	O
that	O
install	O
in	O
Socket	B-Device
P	I-Device
can	O
run	O
at	O
400	O
,	O
533	O
,	O
667	O
,	O
800	O
,	O
or	O
1066	O
MT/s	O
.	O
</s>
<s>
By	O
adapting	O
the	O
multiplier	O
the	O
frequency	O
of	O
the	O
CPU	O
can	O
throttle	O
up	O
or	O
down	O
to	O
save	O
power	O
,	O
given	O
that	O
all	O
Socket	B-Device
P	I-Device
CPUs	O
support	O
EIST	B-Device
,	O
except	O
for	O
Celeron	O
that	O
do	O
not	O
support	O
EIST	B-Device
.	O
</s>
<s>
Socket	B-Device
P	I-Device
has	O
478	O
pins	O
,	O
but	O
is	O
not	O
electrically	O
pin-compatible	O
with	O
Socket	B-Device
M	I-Device
or	O
Socket	B-Device
478	I-Device
.	O
</s>
<s>
Socket	B-Device
P	I-Device
is	O
also	O
known	O
as	O
a	O
478-pin	O
Micro	B-Device
FCPGA	I-Device
or	O
μFCPGA-478	O
.	O
</s>
<s>
On	O
the	O
plastic	O
grid	O
is	O
printed	O
mPGA478MN	B-Device
.	O
</s>
