<s>
A	O
slot	B-Architecture
comprises	O
the	O
operation	O
issue	O
and	O
data	O
path	O
machinery	O
surrounding	O
a	O
set	O
of	O
one	O
or	O
more	O
execution	B-General_Concept
unit	I-General_Concept
(	O
also	O
called	O
a	O
functional	B-General_Concept
unit	I-General_Concept
(	O
FU	O
)	O
)	O
which	O
share	O
these	O
resources	O
.	O
</s>
<s>
The	O
term	O
slot	B-Architecture
is	O
common	O
for	O
this	O
purpose	O
in	O
very	B-General_Concept
long	I-General_Concept
instruction	I-General_Concept
word	I-General_Concept
(	O
VLIW	B-General_Concept
)	O
computers	O
,	O
where	O
the	O
relationship	O
between	O
operation	O
in	O
an	O
instruction	O
and	O
pipeline	B-General_Concept
to	O
execute	O
it	O
is	O
explicit	O
.	O
</s>
<s>
In	O
dynamically	O
scheduled	O
machines	O
,	O
the	O
concept	O
is	O
more	O
commonly	O
called	O
an	O
execute	O
pipeline	B-General_Concept
.	O
</s>
<s>
Modern	O
conventional	O
central	B-General_Concept
processing	I-General_Concept
units	I-General_Concept
(	O
CPU	O
)	O
have	O
several	O
compute	O
pipelines	B-General_Concept
,	O
for	O
example	O
:	O
two	O
arithmetic	B-General_Concept
logic	I-General_Concept
units	I-General_Concept
(	O
ALU	O
)	O
,	O
one	O
floating	B-General_Concept
point	I-General_Concept
unit	I-General_Concept
(	O
FPU	O
)	O
,	O
one	O
Streaming	B-General_Concept
SIMD	I-General_Concept
Extensions	I-General_Concept
(	O
SSE	O
)	O
(	O
such	O
as	O
MMX	B-Architecture
)	O
,	O
one	O
branch	B-General_Concept
.	O
</s>
<s>
Each	O
of	O
them	O
can	O
issue	O
one	O
instruction	O
per	O
basic	O
instruction	B-General_Concept
cycle	I-General_Concept
,	O
but	O
can	O
have	O
several	O
instructions	O
in	O
process	O
.	O
</s>
<s>
These	O
are	O
what	O
correspond	O
to	O
slots	B-Architecture
.	O
</s>
<s>
The	O
pipelines	B-General_Concept
may	O
have	O
several	O
FUs	O
,	O
such	O
as	O
an	O
adder	O
and	O
a	O
multiplier	O
,	O
but	O
only	O
one	O
FU	O
in	O
a	O
pipeline	B-General_Concept
can	O
be	O
issued	O
to	O
in	O
a	O
given	O
cycle	O
.	O
</s>
<s>
The	O
FU	O
population	O
of	O
a	O
pipeline	B-General_Concept
(	O
slot	B-Architecture
)	O
is	O
a	O
design	O
option	O
in	O
a	O
CPU	O
.	O
</s>
