<s>
Second	B-Device
Level	I-Device
Address	I-Device
Translation	I-Device
(	O
SLAT	B-Device
)	O
,	O
also	O
known	O
as	O
nested	B-Device
paging	I-Device
,	O
is	O
a	O
hardware-assisted	B-General_Concept
virtualization	I-General_Concept
technology	O
which	O
makes	O
it	O
possible	O
to	O
avoid	O
the	O
overhead	O
associated	O
with	O
software-managed	O
shadow	O
page	B-General_Concept
tables	I-General_Concept
.	O
</s>
<s>
AMD	O
has	O
supported	O
SLAT	B-Device
through	O
the	O
Rapid	O
Virtualization	O
Indexing	O
(	O
RVI	O
)	O
technology	O
since	O
the	O
introduction	O
of	O
its	O
third-generation	O
Opteron	B-General_Concept
processors	O
(	O
code	O
name	O
Barcelona	O
)	O
.	O
</s>
<s>
Intel	O
's	O
implementation	O
of	O
SLAT	B-Device
,	O
known	O
as	O
Extended	O
Page	B-General_Concept
Table	I-General_Concept
(	O
EPT	O
)	O
,	O
was	O
introduced	O
in	O
the	O
Nehalem	B-Device
microarchitecture	I-Device
found	O
in	O
certain	O
Core	B-Device
i7	I-Device
,	O
Core	B-Device
i5	I-Device
,	O
and	O
Core	B-Device
i3	I-Device
processors	O
.	O
</s>
<s>
ARM	B-Architecture
's	O
virtualization	O
extensions	O
support	O
SLAT	B-Device
,	O
known	O
as	O
Stage-2	O
page-tables	O
provided	O
by	O
a	O
Stage-2	O
MMU	O
.	O
</s>
<s>
The	O
introduction	O
of	O
protected	B-Application
mode	I-Application
to	O
the	O
x86	O
architecture	O
with	O
the	O
Intel	B-General_Concept
80286	I-General_Concept
processor	O
brought	O
the	O
concepts	O
of	O
physical	O
memory	O
and	O
virtual	B-Architecture
memory	I-Architecture
to	O
mainstream	O
architectures	O
.	O
</s>
<s>
When	O
processes	O
use	O
virtual	O
addresses	O
and	O
an	O
instruction	O
requests	O
access	O
to	O
memory	O
,	O
the	O
processor	O
translates	O
the	O
virtual	O
address	O
to	O
a	O
physical	O
address	O
using	O
a	O
page	B-General_Concept
table	I-General_Concept
or	O
translation	B-Architecture
lookaside	I-Architecture
buffer	I-Architecture
(	O
TLB	O
)	O
.	O
</s>
<s>
When	O
running	O
a	O
virtual	O
system	O
,	O
it	O
has	O
allocated	O
virtual	B-Architecture
memory	I-Architecture
of	O
the	O
host	O
system	O
that	O
serves	O
as	O
a	O
physical	O
memory	O
for	O
the	O
guest	O
system	O
,	O
and	O
the	O
same	O
process	O
of	O
address	O
translation	O
goes	O
on	O
also	O
within	O
the	O
guest	O
system	O
.	O
</s>
<s>
This	O
increases	O
the	O
cost	O
of	O
memory	O
access	O
since	O
the	O
address	O
translation	O
needs	O
to	O
be	O
performed	O
twice	O
once	O
inside	O
the	O
guest	O
system	O
(	O
using	O
software-emulated	O
guest	O
page	B-General_Concept
table	I-General_Concept
)	O
,	O
and	O
once	O
inside	O
the	O
host	O
system	O
(	O
using	O
physical	O
map[pmap]	O
)	O
.	O
</s>
<s>
In	O
order	O
to	O
make	O
this	O
translation	O
efficient	O
,	O
software	O
engineers	O
implemented	O
software	O
based	O
shadow	O
page	B-General_Concept
table	I-General_Concept
.	O
</s>
<s>
Shadow	O
page	B-General_Concept
table	I-General_Concept
will	O
translate	O
guest	O
virtual	B-Architecture
memory	I-Architecture
directly	O
to	O
host	O
physical	O
memory	O
address	O
.	O
</s>
<s>
Each	O
VM	O
has	O
a	O
separate	O
shadow	O
page	B-General_Concept
table	I-General_Concept
and	O
hypervisor	B-Operating_System
is	O
in	O
charge	O
of	O
managing	O
them	O
.	O
</s>
<s>
But	O
the	O
cost	O
is	O
very	O
expensive	O
since	O
every	O
time	O
a	O
guest	O
updates	O
its	O
page	B-General_Concept
table	I-General_Concept
,	O
it	O
will	O
trigger	O
the	O
hypervisor	B-Operating_System
to	O
manage	O
the	O
allocation	O
of	O
the	O
page	B-General_Concept
table	I-General_Concept
and	O
its	O
changes	O
.	O
</s>
<s>
In	O
order	O
to	O
make	O
this	O
translation	O
more	O
efficient	O
,	O
processor	O
vendors	O
implemented	O
technologies	O
commonly	O
called	O
SLAT	B-Device
.	O
</s>
<s>
By	O
treating	O
each	O
guest-physical	O
address	O
as	O
a	O
host-virtual	O
address	O
,	O
a	O
slight	O
extension	O
of	O
the	O
hardware	O
used	O
to	O
walk	O
a	O
non-virtualized	O
page	B-General_Concept
table	I-General_Concept
(	O
now	O
the	O
guest	O
page	B-General_Concept
table	I-General_Concept
)	O
can	O
walk	O
the	O
host	O
page	B-General_Concept
table	I-General_Concept
.	O
</s>
<s>
With	O
multilevel	O
page	B-General_Concept
tables	I-General_Concept
the	O
host	O
page	B-General_Concept
table	I-General_Concept
can	O
be	O
viewed	O
conceptually	O
as	O
nested	O
within	O
the	O
guest	O
page	B-General_Concept
table	I-General_Concept
.	O
</s>
<s>
A	O
hardware	O
page	B-General_Concept
table	I-General_Concept
walker	O
can	O
treat	O
the	O
additional	O
translation	O
layer	O
almost	O
like	O
adding	O
levels	O
to	O
the	O
page	B-General_Concept
table	I-General_Concept
.	O
</s>
<s>
Using	O
SLAT	B-Device
and	O
multilevel	O
page	B-General_Concept
tables	I-General_Concept
,	O
the	O
number	O
of	O
levels	O
needed	O
to	O
be	O
walked	O
to	O
find	O
the	O
translation	O
doubles	O
when	O
the	O
guest-physical	O
address	O
is	O
the	O
same	O
size	O
as	O
the	O
guest-virtual	O
address	O
and	O
the	O
same	O
size	O
pages	O
are	O
used	O
.	O
</s>
<s>
This	O
increases	O
the	O
importance	O
of	O
caching	O
values	O
from	O
intermediate	O
levels	O
of	O
the	O
host	O
and	O
guest	O
page	B-General_Concept
tables	I-General_Concept
.	O
</s>
<s>
It	O
is	O
also	O
helpful	O
to	O
use	O
large	O
pages	O
in	O
the	O
host	O
page	B-General_Concept
tables	I-General_Concept
to	O
reduce	O
the	O
number	O
of	O
levels	O
(	O
e.g.	O
,	O
in	O
x86-64	O
,	O
using	O
2MB	O
pages	O
removes	O
one	O
level	O
in	O
the	O
page	B-General_Concept
table	I-General_Concept
)	O
.	O
</s>
<s>
Since	O
memory	O
is	O
typically	O
allocated	O
to	O
virtual	O
machines	O
at	O
coarse	O
granularity	O
,	O
using	O
large	O
pages	O
for	O
guest-physical	O
translation	O
is	O
an	O
obvious	O
optimization	O
,	O
reducing	O
the	O
depth	O
of	O
look-ups	O
and	O
the	O
memory	O
required	O
for	O
host	O
page	B-General_Concept
tables	I-General_Concept
.	O
</s>
<s>
Rapid	O
Virtualization	O
Indexing	O
(	O
RVI	O
)	O
,	O
known	O
as	O
Nested	B-Device
Page	I-Device
Tables	I-Device
(	O
NPT	O
)	O
during	O
its	O
development	O
,	O
is	O
an	O
AMD	O
second	O
generation	O
hardware-assisted	B-General_Concept
virtualization	I-General_Concept
technology	O
for	O
the	O
processor	O
memory	B-General_Concept
management	I-General_Concept
unit	I-General_Concept
(	O
MMU	O
)	O
.	O
</s>
<s>
RVI	O
was	O
introduced	O
in	O
the	O
third	O
generation	O
of	O
Opteron	B-General_Concept
processors	O
,	O
code	O
name	O
Barcelona	O
.	O
</s>
<s>
A	O
VMware	O
research	O
paper	O
found	O
that	O
RVI	O
offers	O
up	O
to	O
42%	O
gains	O
in	O
performance	O
compared	O
with	O
software-only	O
(	O
shadow	O
page	B-General_Concept
table	I-General_Concept
)	O
implementation	O
.	O
</s>
<s>
Tests	O
conducted	O
by	O
Red	O
Hat	O
showed	O
a	O
doubling	O
in	O
performance	O
for	O
OLTP	B-General_Concept
benchmarks	O
.	O
</s>
<s>
Extended	O
Page	B-General_Concept
Tables	I-General_Concept
(	O
EPT	O
)	O
is	O
an	O
Intel	O
second-generation	O
x86	B-General_Concept
virtualization	I-General_Concept
technology	O
for	O
the	O
memory	B-General_Concept
management	I-General_Concept
unit	I-General_Concept
(	O
MMU	O
)	O
.	O
</s>
<s>
EPT	O
support	O
is	O
found	O
in	O
Intel	O
's	O
Core	B-Device
i3	I-Device
,	O
Core	B-Device
i5	I-Device
,	O
Core	B-Device
i7	I-Device
and	O
Core	O
i9	O
CPUs	O
,	O
among	O
others	O
.	O
</s>
<s>
EPT	O
is	O
required	O
in	O
order	O
to	O
launch	O
a	O
logical	O
processor	O
directly	O
in	O
real	B-Application
mode	I-Application
,	O
a	O
feature	O
called	O
"	O
unrestricted	O
guest	O
"	O
in	O
Intel	O
's	O
jargon	O
,	O
and	O
introduced	O
in	O
the	O
Westmere	B-Device
microarchitecture	I-Device
.	O
</s>
<s>
Stage-2	O
page-table	O
support	O
is	O
present	O
in	O
ARM	B-Architecture
processors	I-Architecture
that	O
implement	O
exception	O
level	O
2	O
(	O
EL2	O
)	O
.	O
</s>
<s>
Mode	O
Based	O
Execution	O
Control	O
(	O
MBEC	O
)	O
is	O
an	O
extension	O
to	O
x86	O
SLAT	B-Device
implementations	O
first	O
available	O
in	O
Intel	B-Device
Kaby	I-Device
Lake	I-Device
and	O
AMD	O
Zen	O
2	O
CPUs	O
(	O
known	O
on	O
the	O
latter	O
as	O
Guest	O
Mode	O
Execute	O
Trap	O
or	O
GMET	O
)	O
.	O
</s>
<s>
The	O
extension	O
extends	O
the	O
execute	O
bit	O
in	O
the	O
extended	O
page	B-General_Concept
table	I-General_Concept
(	O
guest	O
page	B-General_Concept
table	I-General_Concept
)	O
into	O
2	O
bits	O
-	O
one	O
for	O
user	O
execute	O
,	O
and	O
one	O
for	O
supervisor	O
execute	O
.	O
</s>
<s>
Under	O
this	O
configuration	O
,	O
unsigned	O
code	O
pages	O
can	O
be	O
marked	O
as	O
execute	O
under	O
usermode	O
,	O
but	O
must	O
be	O
marked	O
as	O
no-execute	B-General_Concept
under	O
kernelmode	O
.	O
</s>
<s>
Modification	O
of	O
the	O
execute	O
bit	O
,	O
or	O
switching	O
of	O
the	O
guest	O
page	B-General_Concept
table	I-General_Concept
which	O
contains	O
the	O
execute	O
bit	O
,	O
is	O
delegated	O
to	O
a	O
higher	O
privileged	O
entity	O
,	O
in	O
this	O
case	O
the	O
host	O
hypervisor	B-Operating_System
.	O
</s>
<s>
Without	O
MBE	O
,	O
each	O
entrance	O
from	O
unsigned	O
usermode	O
execution	O
to	O
signed	O
kernelmode	O
execution	O
must	O
be	O
accompanied	O
by	O
a	O
VM	O
exit	O
to	O
the	O
hypervisor	B-Operating_System
to	O
perform	O
a	O
switch	O
to	O
the	O
kernelmode	O
page	B-General_Concept
table	I-General_Concept
.	O
</s>
<s>
On	O
the	O
reverse	O
operation	O
,	O
an	O
exit	O
from	O
signed	O
kernelmode	O
to	O
unsigned	O
usermode	O
must	O
be	O
accompanied	O
by	O
a	O
VM	O
exit	O
to	O
perform	O
another	O
page	B-General_Concept
table	I-General_Concept
switch	O
.	O
</s>
<s>
With	O
MBE	O
,	O
the	O
same	O
page	B-General_Concept
table	I-General_Concept
can	O
be	O
shared	O
between	O
unsigned	O
usermode	O
code	O
and	O
signed	O
kernelmode	O
code	O
,	O
with	O
two	O
sets	O
of	O
execute	O
permission	O
depending	O
on	O
the	O
execution	O
context	O
.	O
</s>
<s>
Hypervisors	B-Operating_System
that	O
support	O
SLAT	B-Device
include	O
the	O
following	O
:	O
</s>
<s>
Hyper-V	O
for	O
Windows	B-Device
Server	I-Device
2008	I-Device
R2	I-Device
,	O
Windows	B-Application
8	I-Application
and	O
later	O
.	O
</s>
<s>
The	O
Windows	B-Application
8	I-Application
(	O
and	O
later	O
Microsoft	O
Windows	O
)	O
Hyper-V	O
requires	O
SLAT	B-Device
.	O
</s>
<s>
VMware	B-Operating_System
Workstation	I-Operating_System
.	O
</s>
<s>
VMware	B-Operating_System
Workstation	I-Operating_System
14	O
(	O
and	O
later	O
VMware	B-Operating_System
Workstation	I-Operating_System
)	O
requires	O
SLAT	B-Device
.	O
</s>
<s>
,	O
an	O
open-source	O
lightweight	O
hypervisor	B-Operating_System
,	O
built	O
with	O
real-time	O
and	O
safety-criticality	O
in	O
mind	O
,	O
optimized	O
for	O
IoT	O
and	O
Edge	B-Device
usages	O
.	O
</s>
<s>
Some	O
of	O
the	O
above	O
hypervisors	B-Operating_System
require	O
SLAT	B-Device
in	O
order	O
to	O
work	O
at	O
all	O
(	O
not	O
just	O
faster	O
)	O
as	O
they	O
do	O
not	O
implement	O
a	O
software	O
shadow	O
page	B-General_Concept
table	I-General_Concept
;	O
the	O
list	O
is	O
not	O
fully	O
updated	O
to	O
reflect	O
that	O
.	O
</s>
