<s>
Sandy	B-Device
Bridge	I-Device
is	O
the	O
codename	B-Architecture
for	O
Intel	O
's	O
32	B-Algorithm
nm	I-Algorithm
microarchitecture	B-General_Concept
used	O
in	O
the	O
second	O
generation	O
of	O
the	O
Intel	B-Device
Core	I-Device
processors	I-Device
(	O
Core	B-Device
i7	I-Device
,	O
i5	B-Device
,	O
i3	B-Device
)	O
.	O
</s>
<s>
The	O
Sandy	B-Device
Bridge	I-Device
microarchitecture	B-General_Concept
is	O
the	O
successor	O
to	O
Nehalem	B-Device
and	O
Westmere	B-Device
microarchitecture	I-Device
.	O
</s>
<s>
Intel	O
demonstrated	O
a	O
Sandy	B-Device
Bridge	I-Device
processor	O
in	O
2009	O
,	O
and	O
released	O
first	O
products	O
based	O
on	O
the	O
architecture	O
in	O
January	O
2011	O
under	O
the	O
Core	O
brand	O
.	O
</s>
<s>
Sandy	B-Device
Bridge	I-Device
is	O
manufactured	O
in	O
the	O
32	B-Algorithm
nm	I-Algorithm
process	I-Algorithm
and	O
has	O
a	O
soldered	O
contact	O
with	O
the	O
die	O
and	O
IHS	O
(	O
Integrated	O
Heat	O
Spreader	O
)	O
,	O
while	O
Intel	O
's	O
subsequent	O
generation	O
Ivy	B-Device
Bridge	I-Device
uses	O
a	O
22	B-Algorithm
nm	I-Algorithm
die	O
shrink	O
and	O
a	O
TIM	O
(	O
Thermal	O
Interface	O
Material	O
)	O
between	O
the	O
die	O
and	O
the	O
IHS	O
.	O
</s>
<s>
Intel	O
demonstrated	O
a	O
Sandy	B-Device
Bridge	I-Device
processor	O
with	O
A1	O
stepping	B-General_Concept
at	O
2GHz	O
during	O
the	O
Intel	O
Developer	O
Forum	O
in	O
September	O
2009	O
.	O
</s>
<s>
Upgraded	O
features	O
from	O
Nehalem	B-Device
include	O
:	O
</s>
<s>
Sandy	B-Device
Bridge	I-Device
retains	O
the	O
four	O
branch	B-General_Concept
predictors	I-General_Concept
found	O
in	O
Nehalem	B-Device
:	O
the	O
branch	O
target	O
buffer	O
(	O
BTB	O
)	O
,	O
indirect	O
branch	O
target	O
array	O
,	O
loop	O
detector	O
and	O
renamed	O
return	O
stack	O
buffer	O
(	O
RSB	O
)	O
.	O
</s>
<s>
Sandy	B-Device
Bridge	I-Device
has	O
a	O
single	O
BTB	O
that	O
holds	O
twice	O
as	O
many	O
branch	O
targets	O
as	O
the	O
L1	O
and	O
L2	O
BTBs	O
in	O
Nehalem	B-Device
.	O
</s>
<s>
In	O
contrast	O
,	O
Sandy	B-Device
Bridge	I-Device
's	O
predecessor	O
,	O
Clarkdale	B-Device
,	O
has	O
two	O
separate	O
dies	O
(	O
one	O
for	O
GMCH	O
,	O
one	O
for	O
processor	O
)	O
within	O
the	O
processor	O
package	O
.	O
</s>
<s>
All	O
translation	B-Architecture
lookaside	I-Architecture
buffers	I-Architecture
(	O
TLBs	O
)	O
are	O
4-way	O
associative	B-General_Concept
.	O
</s>
<s>
All	O
Sandy	B-Device
Bridge	I-Device
processors	O
with	O
one	O
,	O
two	O
,	O
or	O
four	O
cores	O
report	O
the	O
same	O
CPUID	O
model	O
0206A7h	O
and	O
are	O
closely	O
related	O
.	O
</s>
<s>
The	O
stepping	B-General_Concept
number	O
cannot	O
be	O
seen	O
from	O
the	O
CPUID	O
but	O
only	O
from	O
the	O
PCI	O
configuration	O
space	O
.	O
</s>
<s>
The	O
later	O
Sandy	B-Device
Bridge-E	I-Device
processors	O
with	O
up	O
to	O
eight	O
cores	O
and	O
no	O
graphics	O
are	O
using	O
CPUIDs	O
0206D6h	O
and	O
0206D7h	O
.	O
</s>
<s>
Ivy	B-Device
Bridge	I-Device
CPUs	O
all	O
have	O
CPUID	O
0306A9h	O
to	O
date	O
,	O
and	O
are	O
built	O
in	O
four	O
different	O
configurations	O
differing	O
in	O
the	O
number	O
of	O
cores	O
,	O
L3	O
cache	B-General_Concept
and	O
GPU	O
execution	B-General_Concept
units	I-General_Concept
:	O
</s>
<s>
The	O
average	O
performance	O
increase	O
,	O
according	O
to	O
IXBT	O
Labs	O
and	O
Semi	O
Accurate	O
as	O
well	O
as	O
many	O
other	O
benchmarking	O
sites	O
,	O
at	O
clock	O
to	O
clock	O
is	O
11.3	O
%	O
compared	O
to	O
the	O
Nehalem	B-Device
generation	O
,	O
which	O
includes	O
Bloomfield	O
,	O
Clarkdale	B-Device
,	O
and	O
Lynnfield	B-Device
processors	O
.	O
</s>
<s>
Around	O
twice	O
the	O
integrated	O
graphics	O
performance	O
compared	O
to	O
Clarkdale	B-Device
's	I-Device
(	O
12	O
EUs	B-General_Concept
comparison	O
)	O
.	O
</s>
<s>
1Processors	O
featuring	O
Intel	O
's	O
HD	B-Application
3000	I-Application
graphics	O
are	O
set	O
in	O
bold	O
.	O
</s>
<s>
Other	O
processors	O
feature	O
HD	O
2000	O
graphics	O
,	O
HD	B-Application
graphics	I-Application
(	O
Pentium	B-General_Concept
and	O
Celeron	B-Device
models	O
)	O
or	O
no	O
graphics	O
core	O
(	O
Graphics	O
Clock	O
rate	O
indicated	O
by	O
N/A	O
)	O
.	O
</s>
<s>
This	O
list	O
may	O
not	O
contain	O
all	O
the	O
Sandy	B-Device
Bridge	I-Device
processors	O
released	O
by	O
Intel	O
.	O
</s>
<s>
NOTE	O
:	O
,	O
,	O
,	O
and	O
are	O
actually	O
of	O
Sandy	B-Device
Bridge-E	I-Device
edition	O
.	O
</s>
<s>
All	O
mobile	O
processors	O
,	O
except	O
Celeron	B-Device
and	O
Pentium	B-General_Concept
,	O
use	O
Intel	O
's	O
Graphics	O
subsystem	O
HD	B-Application
3000	I-Application
(	O
12	O
EUs	B-General_Concept
)	O
.	O
</s>
<s>
Intel	O
stopped	O
production	O
of	O
flawed	O
B2	O
stepping	B-General_Concept
chipsets	O
and	O
began	O
producing	O
B3	O
stepping	B-General_Concept
chipsets	O
with	O
the	O
silicon	O
fix	O
.	O
</s>
<s>
Sandy	B-Device
Bridge	I-Device
processor	O
sales	O
were	O
temporarily	O
on	O
hold	O
,	O
as	O
one	O
cannot	O
use	O
the	O
CPU	O
without	O
a	O
motherboard	O
.	O
</s>
<s>
With	O
Sandy	B-Device
Bridge	I-Device
,	O
Intel	O
has	O
tied	O
the	O
speed	O
of	O
every	O
bus	O
(	O
USB	O
,	O
SATA	O
,	O
PCI	O
,	O
PCI-E	O
,	O
CPU	O
cores	O
,	O
Uncore	O
,	O
memory	O
etc	O
.	O
)	O
</s>
<s>
As	O
a	O
work	O
around	O
,	O
Intel	O
made	O
available	O
K/X	O
-series	O
processors	O
,	O
which	O
feature	O
unlocked	O
multipliers	O
;	O
with	O
a	O
multiplier	O
cap	O
of	O
57	O
for	O
Sandy	B-Device
Bridge	I-Device
.	O
</s>
<s>
For	O
the	O
Sandy	B-Device
Bridge-E	I-Device
platform	O
,	O
there	O
is	O
alternative	O
method	O
known	O
as	O
the	O
BClk	O
ratio	O
overclock	O
.	O
</s>
<s>
During	O
IDF	O
(	O
Intel	O
Developer	O
Forum	O
)	O
2010	O
,	O
Intel	O
demonstrated	O
an	O
unknown	O
Sandy	B-Device
Bridge	I-Device
CPU	O
running	O
stably	O
overclocked	O
at	O
4.9GHz	O
on	O
air	O
cooling	O
.	O
</s>
<s>
Non-K	O
edition	O
CPUs	O
can	O
overclock	O
up	O
to	O
four	O
bins	O
from	O
its	O
turbo	B-Device
multiplier	O
.	O
</s>
<s>
Refer	O
here	B-Device
for	O
chipset	O
support	O
.	O
</s>
<s>
Sandy	O
and	O
Ivy	B-Device
Bridge	I-Device
processors	O
with	O
vPro	B-Architecture
capability	O
have	O
security	O
features	O
that	O
can	O
remotely	O
disable	O
a	O
PC	O
or	O
erase	O
information	O
from	O
hard	O
drives	O
.	O
</s>
<s>
AES	B-Algorithm
encryption	I-Algorithm
acceleration	O
will	O
be	O
available	O
,	O
which	O
can	O
be	O
useful	O
for	O
video	O
conferencing	O
and	O
VoIP	O
applications	O
.	O
</s>
<s>
Sandy	O
and	O
Ivy	B-Device
Bridge	I-Device
processors	O
contain	O
a	O
DRM	O
technology	O
that	O
some	O
video	O
streaming	O
web	O
sites	O
rely	O
on	O
to	O
restrict	O
use	O
of	O
their	O
content	O
.	O
</s>
<s>
With	O
the	O
introduction	O
of	O
the	O
Sandy	B-Device
Bridge	I-Device
microarchitecture	B-General_Concept
,	O
Intel	O
also	O
introduced	O
the	O
Intel	B-Application
Data	I-Application
Plane	I-Application
Development	I-Application
Kit	I-Application
(	O
Intel	O
DPDK	B-Application
)	O
to	O
help	O
developers	O
of	O
communications	O
applications	O
take	O
advantage	O
of	O
the	O
platform	O
in	O
packet	B-Protocol
processing	I-Protocol
applications	O
,	O
and	O
network	B-General_Concept
processors	I-General_Concept
.	O
</s>
<s>
Intel	O
demonstrated	O
the	O
Haswell	B-Device
architecture	O
in	O
September	O
2011	O
,	O
released	O
in	O
2013	O
as	O
the	O
successor	O
to	O
Sandy	B-Device
Bridge	I-Device
and	O
Ivy	B-Device
Bridge	I-Device
.	O
</s>
<s>
Microsoft	O
has	O
released	O
a	O
microcode	O
update	O
for	O
selected	O
Sandy	B-Device
Bridge	I-Device
and	O
Ivy	B-Device
Bridge	I-Device
CPUs	O
for	O
Windows	O
7	O
and	O
up	O
that	O
addresses	O
stability	O
issues	O
.	O
</s>
