<s>
The	O
STM8	B-Device
is	O
an	O
8-bit	O
microcontroller	B-Architecture
family	O
by	O
STMicroelectronics	O
.	O
</s>
<s>
The	O
STM8	B-Device
microcontrollers	B-Architecture
use	O
an	O
extended	O
variant	O
of	O
the	O
ST7	B-Device
microcontroller	B-Architecture
architecture	O
.	O
</s>
<s>
STM8	B-Device
microcontrollers	B-Architecture
are	O
particularly	O
low	O
cost	O
for	O
a	O
full-featured	O
8-bit	O
microcontroller	B-Architecture
.	O
</s>
<s>
The	O
STM8	B-Device
is	O
very	O
similar	O
to	O
the	O
earlier	O
ST7	B-Device
,	O
but	O
is	O
better	O
suited	O
as	O
a	O
target	O
for	O
C	B-Language
due	O
to	O
its	O
16-bit	O
index	B-General_Concept
registers	I-General_Concept
and	O
stack	O
pointer-relative	O
addressing	O
mode	O
.	O
</s>
<s>
Although	O
internally	O
a	O
Harvard	B-Architecture
architecture	I-Architecture
it	O
has	O
"	O
memory	O
bridge	O
"	O
that	O
creates	O
a	O
unified	O
24-bit	O
address	O
space	O
,	O
allowing	O
code	O
to	O
execute	O
out	O
of	O
RAM	O
(	O
useful	O
for	O
in-system	B-Device
programming	I-Device
of	O
the	O
flash	B-Device
ROM	I-Device
)	O
,	O
and	O
data	O
(	O
such	O
as	O
lookup	B-Data_Structure
tables	I-Data_Structure
)	O
to	O
be	O
accessed	O
out	O
of	O
ROM	O
.	O
</s>
<s>
On	O
access	O
the	O
"	O
memory	O
bridge	O
"	O
stalls	O
the	O
CPU	O
if	O
required	O
so	O
that	O
RAM-like	O
write	O
access	O
to	O
the	O
flash	B-Device
ROM	I-Device
is	O
possible	O
.	O
</s>
<s>
It	O
has	O
the	O
same	O
six	O
registers	O
(	O
A	O
,	O
X	O
,	O
Y	O
,	O
SP	O
,	O
PC	O
,	O
CC	O
)	O
as	O
the	O
ST7	B-Device
,	O
but	O
the	O
index	B-General_Concept
registers	I-General_Concept
X	O
and	O
Y	O
have	O
been	O
expanded	O
to	O
16	O
bits	O
,	O
and	O
the	O
program	B-General_Concept
counter	I-General_Concept
has	O
been	O
expanded	O
to	O
24	O
bits	O
.	O
</s>
<s>
The	O
accumulator	B-General_Concept
A	O
and	O
the	O
stack	O
pointer	O
remain	O
8	O
and	O
16	O
bits	O
,	O
respectively	O
.	O
</s>
<s>
The	O
condition	B-General_Concept
code	I-General_Concept
register	I-General_Concept
has	O
two	O
more	O
defined	O
bits	O
,	O
for	O
a	O
total	O
of	O
seven	O
.	O
</s>
<s>
There	O
is	O
an	O
overflow	B-Algorithm
flag	I-Algorithm
,	O
and	O
a	O
second	O
interrupt	O
enable	O
bit	O
,	O
allowing	O
four	O
interrupt	B-Operating_System
priority	I-Operating_System
levels	I-Operating_System
.	O
</s>
<s>
The	O
STM8	B-Device
is	O
supported	O
by	O
the	O
free	O
Small	B-Application
Device	I-Application
C	I-Application
Compiler	I-Application
,	O
the	O
free	O
of	O
charge	O
closed	O
source	O
Cosmic	O
C	B-Language
compiler	O
,	O
and	O
the	O
non-free	O
IAR	O
C	B-Language
and	O
Raisonance	O
compilers	O
.	O
</s>
<s>
Besides	O
C	B-Language
there	O
is	O
the	O
open-source	O
STM8	B-Device
eForth	O
,	O
an	O
interactive	O
Forth	O
system	O
for	O
the	O
STM8	B-Device
.	O
</s>
<s>
The	O
STM8	B-Device
instruction	O
set	O
is	O
mostly	O
a	O
superset	O
of	O
the	O
ST7	B-Device
's	O
,	O
but	O
it	O
is	O
not	O
completely	O
binary	O
compatible	O
.	O
</s>
<s>
(	O
Also	O
,	O
the	O
half-carry	B-Device
flag	I-Device
has	O
been	O
changed	O
to	O
reflect	O
the	O
carry	O
from	O
bit	O
7	O
to	O
bit	O
8	O
of	O
the	O
16-bit	O
result	O
,	O
rather	O
than	O
the	O
carry	O
from	O
bit	O
3	O
to	O
4	O
.	O
)	O
</s>
<s>
Interrupts	O
push	O
nine	O
bytes	O
of	O
state	O
instead	O
of	O
five	O
as	O
on	O
the	O
ST7	B-Device
.	O
</s>
<s>
The	O
multiply	O
instruction	O
stores	O
the	O
16-bit	O
product	O
in	O
the	O
specified	O
index	B-General_Concept
register	I-General_Concept
(	O
e.g.	O
</s>
<s>
Load	O
and	O
compare	O
instructions	O
targeting	O
the	O
X	O
register	O
are	O
of	O
little	O
use	O
on	O
the	O
ST7	B-Device
with	O
addressing	O
modes	O
indexed	O
by	O
the	O
X	O
register	O
.	O
</s>
<s>
On	O
the	O
STM8	B-Device
,	O
when	O
such	O
operations	O
specify	O
a	O
memory	O
operand	O
indexed	O
by	O
the	O
X	O
register	O
,	O
the	O
register	O
operand	O
is	O
changed	O
to	O
Y	O
.	O
</s>
<s>
With	O
a	O
90	O
prefix	O
,	O
the	O
registers	O
are	O
reversed	O
so	O
the	O
index	B-General_Concept
register	I-General_Concept
is	O
Y	O
and	O
the	O
operand	O
register	O
is	O
X	O
.	O
</s>
<s>
One	O
major	O
performance	O
difference	O
is	O
that	O
the	O
STM8	B-Device
fetches	O
32	O
bits	O
from	O
ROM	O
per	O
cycle	O
,	O
and	O
many	O
instructions	O
take	O
one	O
cycle	O
to	O
execute	O
.	O
</s>
<s>
The	O
ST7	B-Device
,	O
in	O
contrast	O
,	O
fetches	O
8	O
bits	O
per	O
cycle	O
and	O
takes	O
one	O
cycle	O
per	O
instruction	O
byte	O
.	O
</s>
<s>
STM8	B-Device
instructions	O
consist	O
of	O
an	O
optional	O
prefix	O
byte	O
(	O
7216	O
,	O
9016	O
,	O
9116	O
,	O
or	O
9216	O
)	O
,	O
an	O
opcode	O
byte	O
,	O
and	O
a	O
few	O
(	O
up	O
to	O
four	O
,	O
but	O
rarely	O
more	O
than	O
two	O
)	O
bytes	O
of	O
operands	O
.	O
</s>
<s>
+	O
STM8	B-Device
instruction	O
set	O
Prefix	O
7	O
6	O
5	O
4	O
3	O
2	O
1	O
0	O
Operands	O
Mnemonic	O
Description	O
—	O
0	O
0	O
0	O
0	O
opcode	O
addr8	O
OP	O
(	O
addr8	O
,	O
SP	O
)	O
One-operand	O
instructions	O
(	O
see	O
below	O
)	O
—	O
0	O
0	O
0	O
1	O
opcode	O
addr8	O
OP	O
A	O
,	O
(	O
addr8	O
,	O
SP	O
)	O
Two-operand	O
instructions	O
with	O
stack	O
operand	O
—	O
0	O
0	O
0	O
1	O
0	O
0	O
0	O
0	O
addr8	O
SUB	O
A	O
,	O
(	O
addr8	O
,	O
SP	O
)	O
A	O
:=	O
A	O
−	O
operand	O
—	O
0	O
0	O
0	O
1	O
0	O
0	O
0	O
1	O
addr8	O
CP	O
A	O
,	O
(	O
addr8	O
,	O
SP	O
)	O
Compare	O
A	O
−	O
operand	O
—	O
0	O
0	O
0	O
1	O
0	O
0	O
1	O
0	O
addr8	O
SBC	O
A	O
,	O
(	O
addr8	O
,	O
SP	O
)	O
A	O
:=	O
A	O
−	O
operand	O
−	O
C	B-Language
subtract	O
with	O
borrow	O
—	O
0	O
0	O
0	O
1	O
0	O
0	O
1	O
1	O
addr8	O
CPW	O
X	O
,	O
(	O
addr8	O
,	O
SP	O
)	O
Compare	O
X	O
−	O
operand	O
(	O
16-bit	O
)	O
—	O
0	O
0	O
0	O
1	O
0	O
1	O
0	O
0	O
addr8	O
AND	O
A	O
,	O
(	O
addr8	O
,	O
SP	O
)	O
A	O
:=	O
A	O
&	O
operand	O
,	O
bitwise	O
and	O
—	O
0	O
0	O
0	O
1	O
0	O
1	O
0	O
1	O
addr8	O
BCP	O
A	O
,	O
(	O
addr8	O
,	O
SP	O
)	O
Bitwise	O
test	O
A	O
&	O
operand	O
—	O
0	O
0	O
0	O
1	O
0	O
1	O
1	O
0	O
addr8	O
LDW	O
Y	O
,	O
(	O
addr8	O
,	O
SP	O
)	O
Y	O
:=	O
operand	O
(	O
assigned	O
to	O
opcode	O
7B	O
)	O
—	O
0	O
0	O
0	O
1	O
0	O
1	O
1	O
1	O
addr8	O
LDW	O
(	O
addr8	O
,	O
SP	O
)	O
,	O
Y	O
Operand	O
:=	O
Y	O
(	O
assigned	O
to	O
opcode	O
6B	O
)	O
—	O
0	O
0	O
0	O
1	O
1	O
0	O
0	O
0	O
addr8	O
XOR	O
A	O
,	O
(	O
addr8	O
,	O
SP	O
)	O
A	O
:=	O
A	O
^	O
operand	O
,	O
exclusive-or	O
—	O
0	O
0	O
0	O
1	O
1	O
0	O
0	O
1	O
addr8	O
ADC	O
A	O
,	O
(	O
addr8	O
,	O
SP	O
)	O
A	O
:=	O
A	O
+	O
operand	O
+	O
C	B-Language
,	O
add	O
with	O
carry	O
—	O
0	O
0	O
0	O
1	O
1	O
0	O
1	O
0	O
addr8	O
OR	O
A	O
,	O
(	O
addr8	O
,	O
SP	O
)	O
A	O
:=	O
A	O
operand	O
,	O
inclusive	O
or	O
—	O
0	O
0	O
0	O
1	O
1	O
0	O
1	O
1	O
addr8	O
ADD	O
A	O
,	O
(	O
addr8	O
,	O
SP	O
)	O
A	O
:=	O
A	O
+	O
operand	O
—	O
0	O
0	O
0	O
1	O
1	O
1	O
0	O
0	O
imm16	O
ADDW	O
X	O
,	O
#imm16	O
X	O
:=	O
X	O
+	O
immediate	O
(=	O
)	O
—	O
0	O
0	O
0	O
1	O
1	O
1	O
0	O
1	O
imm16	O
SUBW	O
X	O
,	O
#imm16	O
X	O
:=	O
X	O
−	O
immediate	O
(=	O
)	O
—	O
0	O
0	O
0	O
1	O
1	O
1	O
1	O
0	O
addr8	O
LDW	O
X	O
,	O
(	O
addr8	O
,	O
SP	O
)	O
X	O
:=	O
operand	O
—	O
0	O
0	O
0	O
1	O
1	O
1	O
1	O
1	O
addr8	O
LDW	O
(	O
addr8	O
,	O
SP	O
)	O
,	O
X	O
Operand	O
:=	O
X	O
72/90	O
0	O
0	O
0	O
c	B-Language
bit	O
v	O
operands	O
Bit	O
operations	O
72	O
0	O
0	O
0	O
0	O
bit	O
0	O
addr16	O
soff8	O
BTJT	O
addr16	O
,	O
#bit	O
,	O
label	O
Jump	O
to	O
PC	O
+	O
soff8	O
if	O
source	O
bit	O
is	O
true	O
(	O
set	O
)	O
72	O
0	O
0	O
0	O
0	O
bit	O
1	O
addr16	O
soff8	O
BTJF	O
addr16	O
,	O
#bit	O
,	O
label	O
Jump	O
to	O
PC	O
+	O
soff8	O
if	O
source	O
bit	O
is	O
false	O
(	O
clear	O
)	O
72	O
0	O
0	O
0	O
1	O
bit	O
0	O
addr16	O
BSET	O
addr16	O
,	O
#bit	O
Set	O
specified	O
bit	O
to	O
1	O
72	O
0	O
0	O
0	O
1	O
bit	O
1	O
addr16	O
BRES	O
addr16	O
,	O
#bit	O
Reset	O
(	O
clear	O
)	O
specified	O
bit	O
to	O
0	O
90	O
0	O
0	O
0	O
1	O
bit	O
0	O
addr16	O
BCPL	O
addr16	O
,	O
#bit	O
Complement	O
(	O
toggle	O
)	O
selected	O
bit	O
90	O
0	O
0	O
0	O
1	O
bit	O
1	O
addr16	O
BCCM	O
addr16	O
,	O
#bit	O
Write	O
carry	O
flag	O
to	O
memory	O
bit	O
—	O
/90	O
0	O
0	O
1	O
0	O
condition	O
soff8	O
Conditional	O
branches	O
(	O
8-bit	O
signed	O
offset	O
)	O
—	O
0	O
0	O
1	O
0	O
0	O
0	O
0	O
0	O
soff8	O
JRA	O
label	O
Branch	O
always	O
(	O
true	O
)	O
—	O
0	O
0	O
1	O
0	O
0	O
0	O
0	O
1	O
soff8	O
JRF	O
label	O
Branch	O
never	O
(	O
false	O
)	O
—	O
0	O
0	O
1	O
0	O
0	O
0	O
1	O
0	O
soff8	O
JRUGT	O
label	O
Branch	O
if	O
unsigned	O
greater	O
than	O
(	O
C	B-Language
=	O
0	O
and	O
Z	O
=	O
0	O
)	O
—	O
0	O
0	O
1	O
0	O
0	O
0	O
1	O
1	O
soff8	O
JRULE	O
label	O
Branch	O
if	O
unsigned	O
less	O
than	O
or	O
equal	O
(	O
C	B-Language
=	O
1	O
or	O
Z	O
=	O
1	O
)	O
—	O
0	O
0	O
1	O
0	O
0	O
1	O
0	O
0	O
soff8	O
JRNC	O
label	O
Branch	O
if	O
no	O
carry	O
(	O
C	B-Language
=	O
0	O
)	O
—	O
0	O
0	O
1	O
0	O
0	O
1	O
0	O
1	O
soff8	O
JRC	O
label	O
Branch	O
if	O
carry	O
(	O
C	B-Language
=	O
1	O
)	O
—	O
0	O
0	O
1	O
0	O
0	O
1	O
1	O
0	O
soff8	O
JRNE	O
label	O
Branch	O
if	O
not	O
equal	O
(	O
Z	O
=	O
0	O
)	O
—	O
0	O
0	O
1	O
0	O
0	O
1	O
1	O
1	O
soff8	O
JREQ	O
label	O
Branch	O
if	O
equal	O
(	O
Z	O
=	O
1	O
)	O
—	O
0	O
0	O
1	O
0	O
1	O
0	O
0	O
0	O
soff8	O
JRNV	O
label	O
Branch	O
if	O
not	O
overflow	O
(	O
V=	O
0	O
)	O
90	O
0	O
0	O
1	O
0	O
1	O
0	O
0	O
0	O
soff8	O
JRNH	O
label	O
Branch	O
if	O
not	O
half-carry	O
(	O
H	O
=	O
0	O
)	O
—	O
0	O
0	O
1	O
0	O
1	O
0	O
0	O
1	O
soff8	O
JRV	O
label	O
Branch	O
if	O
overflow	O
(	O
V=	O
1	O
)	O
90	O
0	O
0	O
1	O
0	O
1	O
0	O
0	O
1	O
soff8	O
JRH	O
label	O
Branch	O
if	O
half-carry	O
(	O
H	O
=	O
1	O
)	O
—	O
0	O
0	O
1	O
0	O
1	O
0	O
1	O
0	O
soff8	O
JRPL	O
label	O
Branch	O
if	O
plus	O
(	O
N	O
=	O
0	O
)	O
—	O
0	O
0	O
1	O
0	O
1	O
0	O
1	O
1	O
soff8	O
JRMI	O
label	O
Branch	O
if	O
minus	O
(	O
N	O
=	O
1	O
)	O
—	O
0	O
0	O
1	O
0	O
1	O
1	O
0	O
0	O
soff8	O
JRSGT	O
label	O
Branch	O
if	O
signed	O
greater	O
than	O
(	O
S=	O
0	O
and	O
N	O
=V	O
)	O
90	O
0	O
0	O
1	O
0	O
1	O
1	O
0	O
0	O
soff8	O
JRNM	O
label	O
Branch	O
if	O
not	O
interrupt	O
mask	O
(	O
I	O
=	O
0	O
)	O
—	O
0	O
0	O
1	O
0	O
1	O
1	O
0	O
1	O
soff8	O
JRSLE	O
label	O
Branch	O
if	O
signed	O
lower	O
or	O
equal	O
(	O
S=	O
1	O
or	O
N≠V	O
)	O
90	O
0	O
0	O
1	O
0	O
1	O
1	O
0	O
1	O
soff8	O
JRM	O
label	O
Branch	O
if	O
interrupts	O
masked	O
(	O
I	O
=	O
1	O
)	O
—	O
0	O
0	O
1	O
0	O
1	O
1	O
1	O
0	O
soff8	O
JRSGE	O
label	O
Branch	O
if	O
signed	O
greater	O
or	O
equal	O
(	O
N	O
=V	O
)	O
90	O
0	O
0	O
1	O
0	O
1	O
1	O
1	O
0	O
soff8	O
JRIL	O
label	O
Branch	O
if	O
interrupt	O
line	O
is	O
low	O
—	O
0	O
0	O
1	O
0	O
1	O
1	O
1	O
1	O
soff8	O
JRSLT	O
label	O
Branch	O
if	O
signed	O
less	O
than	O
(	O
N≠V	O
)	O
90	O
0	O
0	O
1	O
0	O
1	O
1	O
1	O
1	O
soff8	O
JRIH	O
label	O
Branch	O
if	O
interrupt	O
line	O
is	O
high	O
prefix	O
0	O
mode	O
opcode	O
operand	O
One-operand	O
instructions	O
—	O
0	O
0	O
0	O
0	O
opcode	O
addr8	O
OP	O
(	O
addr8	O
,	O
SP	O
)	O
Stack	O
pointer	O
relative	O
—	O
0	O
0	O
1	O
1	O
opcode	O
addr8	O
OP	O
addr8	O
8-bit	O
absolute	O
address	O
72	O
0	O
0	O
1	O
1	O
opcode	O
addr16	O
OP	O
 [ addr16 ] 	O
16-bit	O
indirect	O
address	O
92	O
0	O
0	O
1	O
1	O
opcode	O
addr8	O
OP	O
 [ addr8 ] 	O
8-bit	O
indirect	O
address	O
of	O
16-bit	O
address	O
—	O
0	O
1	O
0	O
0	O
opcode	O
—	O
OP	O
A	O
Accumulator	B-General_Concept
72/90	O
0	O
1	O
0	O
0	O
opcode	O
addr16	O
OP	O
(	O
addr16	O
,	O
X/Y	O
)	O
Indexed	O
with	O
16-bit	O
offset	O
—	O
/90	O
0	O
1	O
0	O
1	O
opcode	O
—	O
OPW	O
X/Y	O
X/Y	O
register	O
(	O
16-bit	O
operation	O
)	O
72	O
0	O
1	O
0	O
1	O
opcode	O
addr16	O
OP	O
addr16	O
16-bit	O
address	O
—	O
/90	O
0	O
1	O
1	O
0	O
opcode	O
addr8	O
OP	O
(	O
addr8	O
,	O
X/Y	O
)	O
8-bit	O
address	O
plus	O
X/Y	O
72	O
0	O
1	O
1	O
0	O
opcode	O
addr16	O
OP	O
( [	O
addr16 ]	O
,	O
X	O
)	O
16-bit	O
indirect	O
address	O
plus	O
X	O
92/91	O
0	O
1	O
1	O
0	O
opcode	O
addr8	O
OP	O
( [	O
addr8 ]	O
,	O
X/Y	O
)	O
8-bit	O
indirect	O
address	O
plus	O
X/Y	O
—	O
/90	O
0	O
1	O
1	O
1	O
opcode	O
—	O
OP	O
(	O
X/Y	O
)	O
Indexed	O
with	O
no	O
offset	O
prefix	O
0	O
mode	O
0	O
0	O
0	O
0	O
operand	O
NEG	O
operand	O
Two's-complement	O
negate	O
0	O
mode	O
0	O
0	O
0	O
1	O
(	O
reassigned	O
to	O
exchange	O
operations	O
;	O
see	O
following	O
section	O
)	O
0	O
mode	O
0	O
0	O
1	O
0	O
(	O
reassigned	O
to	O
other	O
operations	O
;	O
see	O
following	O
section	O
)	O
prefix	O
0	O
mode	O
0	O
0	O
1	O
1	O
operand	O
CPL	O
operand	O
Ones	O
 '	O
complement	O
,	O
logical	O
not	O
prefix	O
0	O
mode	O
0	O
1	O
0	O
0	O
operand	O
SRL	O
operand	O
Shift	O
right	O
logical	O
,	O
msbit	O
cleared	O
,	O
lsbit	O
to	O
carry	O
:	O
(	O
operand:C	O
)	O
:=	O
(	O
0:operand	O
)	O
0	O
mode	O
0	O
1	O
0	O
1	O
(	O
reassigned	O
to	O
other	O
operations	O
;	O
see	O
following	O
section	O
)	O
prefix	O
0	O
mode	O
0	O
1	O
1	O
0	O
operand	O
RRC	O
operand	O
Rotate	O
right	O
through	O
carry	O
,	O
(	O
operand:C	O
)	O
:=	O
(	O
C:operand	O
)	O
prefix	O
0	O
mode	O
0	O
1	O
1	O
1	O
operand	O
SRA	O
operand	O
Shift	O
right	O
arithmetic	O
,	O
msbit	O
preserved	O
,	O
lsbit	O
to	O
carry	O
prefix	O
0	O
mode	O
1	O
0	O
0	O
0	O
operand	O
SLL	O
operand	O
Shift	O
left	O
,	O
msbit	O
to	O
carry	O
:	O
(	O
C:operand	O
)	O
:=	O
(	O
operand:0	O
)	O
prefix	O
0	O
mode	O
1	O
0	O
0	O
1	O
operand	O
RLC	O
operand	O
Rotate	O
left	O
through	O
carry	O
,	O
(	O
C:operand	O
)	O
:=	O
(	O
operand	O
,	O
C	B-Language
)	O
prefix	O
0	O
mode	O
1	O
0	O
1	O
0	O
operand	O
DEC	O
operand	O
Decrement	O
;	O
N	O
and	O
Z	O
set	O
,	O
carry	O
unaffected	O
0	O
mode	O
1	O
0	O
1	O
1	O
(	O
reassigned	O
to	O
other	O
operations	O
;	O
see	O
following	O
section	O
)	O
prefix	O
0	O
mode	O
1	O
1	O
0	O
0	O
operand	O
INC	O
operand	O
Increment	O
;	O
N	O
and	O
Z	O
set	O
,	O
carry	O
unaffected	O
prefix	O
0	O
mode	O
1	O
1	O
0	O
1	O
operand	O
TNZ	O
operand	O
Test	O
non-zero	O
:	O
set	O
N	O
and	O
Z	O
based	O
on	O
operand	O
value	O
prefix	O
0	O
mode	O
1	O
1	O
1	O
0	O
operand	O
SWAP	O
operand	O
Swap	O
halves	O
of	O
operand	O
(	O
4-bit	O
rotate	O
;	O
8-bit	O
for	O
SWAPW	O
X	O
and	O
SWAPW	O
Y	O
)	O
prefix	O
0	O
mode	O
1	O
1	O
1	O
1	O
operand	O
CLR	O
operand	O
Set	O
operand	O
to	O
0	O
,	O
N	O
cleared	O
,	O
Z	O
set	O
prefix	O
0	O
mode	O
opcode	O
operand	O
Reassigned	O
opodes	O
 [ 03-7 ]  [ 125B ] 	O
from	O
one-operand	O
range	O
—	O
/90	O
0	O
0	O
0	O
0	O
0	O
0	O
0	O
1	O
—	O
RRWA	O
X/Y	O
Rotate	O
word	O
right	O
through	O
A	O
:	O
8-bit	O
right	O
rotate	O
of	O
24-bit	O
concatenation	O
of	O
X/Y	O
and	O
A	O
;	O
(	O
X:A	O
)	O
:=	O
(	O
A:X	O
)	O
—	O
0	O
0	O
1	O
1	O
0	O
0	O
0	O
1	O
addr16	O
EXG	O
A	O
,	O
addr16	O
Exchange	O
A	O
with	O
memory	O
—	O
0	O
1	O
0	O
0	O
0	O
0	O
0	O
1	O
—	O
EXG	O
A	O
,	O
XL	O
Exchange	O
A	O
with	O
X	O
(	O
low	O
half	O
)	O
—	O
0	O
1	O
0	O
1	O
0	O
0	O
0	O
1	O
—	O
EXGW	O
X	O
,	O
Y	O
Exchange	O
X	O
with	O
Y	O
(	O
16	O
bits	O
)	O
—	O
0	O
1	O
1	O
0	O
0	O
0	O
0	O
1	O
—	O
EXG	O
A	O
,	O
YL	O
Exchange	O
A	O
with	O
Y	O
(	O
low	O
half	O
)	O
—	O
0	O
1	O
1	O
1	O
0	O
0	O
0	O
1	O
—	O
(	O
reserved	O
)	O
—	O
/90	O
0	O
0	O
0	O
0	O
0	O
0	O
1	O
0	O
—	O
RLWA	O
X/Y	O
Rotate	O
word	O
left	O
through	O
A	O
:	O
8-bit	O
left	O
rotate	O
of	O
24-bit	O
concatenation	O
of	O
X/Y	O
and	O
A	O
;	O
(	O
A:X	O
)	O
:=	O
(	O
X:A	O
)	O
—	O
0	O
0	O
1	O
1	O
0	O
0	O
1	O
0	O
addr16	O
POP	O
addr16	O
Pop	O
from	O
stack	O
—	O
/90	O
0	O
1	O
0	O
0	O
0	O
0	O
1	O
0	O
—	O
MUL	O
X/Y	O
,	O
A	O
X/Y	O
:=	O
XL/YL	O
×	O
A	O
—	O
0	O
1	O
0	O
1	O
0	O
0	O
1	O
0	O
imm8	O
SUBW	O
SP	O
,	O
#imm	O
SP	O
:=	O
SP	O
−	O
imm8	O
—	O
/90	O
0	O
1	O
1	O
0	O
0	O
0	O
1	O
0	O
—	O
DIV	O
X/Y	O
,	O
A	O
Divide	O
X/Y	O
by	O
A	O
;	O
16-bit	O
quotient	O
in	O
X/Y	O
,	O
remainder	O
in	O
A	O
—	O
0	O
1	O
1	O
1	O
0	O
0	O
1	O
0	O
—	O
PREFIX	O
Instruction	O
prefix	O
72	O
:	O
modify	O
following	O
opcode	O
0	O
0	O
0	O
0	O
0	O
1	O
0	O
1	O
—	O
(	O
reserved	O
)	O
—	O
0	O
0	O
1	O
1	O
0	O
1	O
0	O
1	O
imm8	O
addr16	O
MOV	O
addr16	O
,	O
#imm8	O
Move	O
immediate	O
to	O
memory	O
(	O
flags	O
unaffected	O
)	O
—	O
0	O
1	O
0	O
0	O
0	O
1	O
0	O
1	O
addr8	O
addr8	O
MOV	O
addr8	O
,	O
addr8	O
Move	O
memory	O
to	O
memory	O
(	O
flags	O
unaffected	O
)	O
—	O
0	O
1	O
0	O
1	O
0	O
1	O
0	O
1	O
addr16	O
addr16	O
MOV	O
addr16	O
,	O
addr16	O
Move	O
memory	O
to	O
memory	O
(	O
flags	O
unaffected	O
)	O
—	O
0	O
1	O
1	O
0	O
0	O
1	O
0	O
1	O
—	O
DIVW	O
X	O
,	O
Y	O
Divide	O
X	O
by	O
Y	O
(	O
16	O
bits	O
)	O
;	O
quotient	O
in	O
X	O
,	O
remainder	O
in	O
Y	O
0	O
1	O
1	O
1	O
0	O
1	O
0	O
1	O
—	O
(	O
reserved	O
)	O
0	O
0	O
0	O
0	O
1	O
0	O
1	O
1	O
—	O
(	O
reserved	O
)	O
—	O
0	O
0	O
1	O
1	O
1	O
0	O
1	O
1	O
addr16	O
PUSH	O
addr16	O
Push	O
onto	O
stack	O
—	O
0	O
1	O
0	O
0	O
1	O
0	O
1	O
1	O
imm8	O
PUSH	O
#imm8	O
Push	O
onto	O
stack	O
—	O
0	O
1	O
0	O
1	O
1	O
0	O
1	O
1	O
imm8	O
ADDW	O
SP	O
,	O
#imm8	O
SP	O
:=	O
SP	O
+	O
imm8	O
—	O
0	O
1	O
1	O
0	O
1	O
0	O
1	O
1	O
addr8	O
LD	O
(	O
addr8	O
,	O
SP	O
)	O
,	O
A	O
Store	O
relative	O
to	O
stack	O
—	O
0	O
1	O
1	O
1	O
1	O
0	O
1	O
1	O
addr8	O
LD	O
A	O
,	O
(	O
addr8	O
,	O
SP	O
)	O
Load	O
relative	O
to	O
stack	O
—	O
1	O
0	O
0	O
opcode	O
—	O
Miscellaneous	O
instructions	O
.	O
</s>
<s>
For	O
CPW	O
and	O
LDW	O
instructions	O
where	O
the	O
operand	O
addressing	O
mode	O
is	O
indexed	O
by	O
X	O
,	O
the	O
STM8	B-Device
uses	O
the	O
Y	O
register	O
by	O
default	O
instead	O
of	O
X	O
.	O
</s>
