<s>
The	O
STEbus	B-Architecture
(	O
also	O
called	O
the	O
IEEE-1000	O
bus	O
)	O
is	O
a	O
non-proprietary	O
,	O
processor-independent	O
,	O
computer	B-General_Concept
bus	I-General_Concept
with	O
8	O
data	O
lines	O
and	O
20	O
address	O
lines	O
.	O
</s>
<s>
It	O
was	O
popular	O
for	O
industrial	O
control	O
systems	O
in	O
the	O
late	O
1980s	O
and	O
early	O
1990s	O
before	O
the	O
ubiquitous	O
IBM	B-Device
PC	I-Device
dominated	O
this	O
market	O
.	O
</s>
<s>
The	O
Z80	B-General_Concept
and	O
probably	O
the	O
CMOS	O
65C02	B-General_Concept
are	O
possible	O
processors	O
to	O
use	O
.	O
</s>
<s>
The	O
S-100	B-Architecture
bus	I-Architecture
is	O
based	O
on	O
Intel	B-General_Concept
8080	I-General_Concept
signals	O
,	O
the	O
STD	B-Architecture
Bus	I-Architecture
around	O
Z80	B-General_Concept
signals	O
,	O
the	O
SS-50	B-Architecture
bus	I-Architecture
around	O
the	O
Motorola	B-Device
6800	I-Device
,	O
and	O
the	O
G64	O
bus	O
around	O
6809	B-Device
signals	O
.	O
</s>
<s>
The	O
VMEbus	B-Architecture
had	O
provided	O
a	O
high-quality	O
solution	O
for	O
high-performance	O
16-bit	B-Device
processors	I-Device
,	O
using	O
reliable	O
DIN	O
41612	O
connectors	O
and	O
well-specified	O
Eurocard	O
board	O
sizes	O
and	O
rack	O
systems	O
.	O
</s>
<s>
In	O
the	O
mid	O
1980s	O
,	O
the	O
STEbus	B-Architecture
standard	O
addressed	O
these	O
issues	O
by	O
specifying	O
what	O
is	O
rather	O
like	O
a	O
VMEbus	B-Architecture
simplified	O
for	O
8-bit	O
processors	O
.	O
</s>
<s>
IEEE	O
Working	O
Group	O
P1000	O
initially	O
considered	O
simply	O
repinning	O
the	O
STD	B-Architecture
Bus	I-Architecture
,	O
</s>
<s>
They	O
decided	O
to	O
make	O
a	O
bus	O
more	O
like	O
the	O
VMEbus	B-Architecture
and	O
Futurebus	B-Architecture
.	O
</s>
<s>
The	O
STEbus	B-Architecture
was	O
designed	O
to	O
be	O
manufacturer	O
independent	O
,	O
processor	O
independent	O
,	O
and	O
have	O
multimaster	O
capability	O
.	O
</s>
<s>
The	O
STEbus	B-Architecture
was	O
very	O
successful	O
in	O
its	O
day	O
.	O
</s>
<s>
Many	O
processors	O
were	O
available	O
on	O
STEbus	B-Architecture
cards	O
,	O
across	O
a	O
range	O
of	O
price	O
and	O
performance	O
.	O
</s>
<s>
These	O
boards	O
included	O
the	O
Intel	B-Architecture
8031	I-Architecture
,	O
8085	B-General_Concept
,	O
8088	B-Device
,	O
80188	B-Device
;	O
the	O
National	O
Semiconductor	O
32008	B-Device
and	O
32016	B-Device
;	O
the	O
Motorola	B-Device
6809	I-Device
,	O
68000	B-Device
,	O
and	O
68008	B-Device
;	O
The	O
Zilog	B-General_Concept
Z80	I-General_Concept
and	O
Z280	B-Device
;	O
the	O
Hitachi	B-General_Concept
HD64180	I-General_Concept
;	O
and	O
the	O
Inmos	B-General_Concept
Transputer	I-General_Concept
.	O
</s>
<s>
The	O
STEbus	B-Architecture
is	O
designed	O
for	O
8-bit	O
microprocessors	O
.	O
</s>
<s>
Processors	O
that	O
normally	O
use	O
a	O
wider	O
data	B-General_Concept
bus	I-General_Concept
(	O
16-bit	B-Device
,	O
etc	O
.	O
)	O
</s>
<s>
can	O
use	O
the	O
STEbus	B-Architecture
if	O
the	O
processor	O
can	O
handle	O
data	O
in	O
byte-wide	O
chunks	O
,	O
giving	O
the	O
slave	O
as	O
long	O
as	O
it	O
needs	O
to	O
respond	O
.	O
</s>
<s>
The	O
STEbus	B-Architecture
supported	O
processors	O
from	O
the	O
popular	O
Z80	B-General_Concept
,	O
the	O
6809	B-Device
,	O
to	O
the	O
68020	B-Device
.	O
</s>
<s>
The	O
CMOS	O
65C02	B-General_Concept
did	O
not	O
have	O
this	O
shortcoming	O
,	O
but	O
this	O
was	O
rarer	O
and	O
more	O
expensive	O
than	O
the	O
NMOS	O
6502	O
and	O
Z80	B-General_Concept
.	O
</s>
<s>
The	O
6809	B-Device
used	O
cycle	O
stretching	O
.	O
</s>
<s>
The	O
STEbus	B-Architecture
achieved	O
its	O
goal	O
of	O
providing	O
a	O
rack-mounting	O
system	O
robust	O
enough	O
for	O
industrial	O
use	O
,	O
with	O
easily	O
interchangeable	O
boards	O
and	O
processor	O
independence	O
.	O
</s>
<s>
Researchers	O
describe	O
STEbus	B-Architecture
systems	O
as	O
rugged	O
,	O
adaptable	O
,	O
and	O
cost	O
effective	O
.	O
</s>
<s>
The	O
STEbus	B-Architecture
market	O
began	O
to	O
decline	O
as	O
the	O
IBM	B-Device
PC	I-Device
made	O
progress	O
into	O
industrial	O
control	O
systems	O
.	O
</s>
<s>
As	O
time	O
went	O
on	O
,	O
PC	O
systems	O
did	O
away	O
with	O
the	O
need	O
for	O
card	O
cages	O
and	O
backplanes	O
by	O
moving	O
to	O
the	O
PC/104	B-Device
format	O
where	O
boards	O
stack	O
onto	O
each	O
other	O
.	O
</s>
<s>
While	O
not	O
as	O
well-designed	O
as	O
the	O
STEbus	B-Architecture
,	O
PC/104	B-Device
is	O
good	O
enough	O
for	O
many	O
applications	O
.	O
</s>
<s>
The	O
major	O
manufacturers	O
from	O
its	O
peak	O
period	O
now	O
support	O
STEbus	B-Architecture
mostly	O
for	O
goodwill	O
with	O
old	O
customers	O
who	O
bought	O
a	O
lot	O
of	O
product	O
from	O
them	O
.	O
</s>
<s>
As	O
of	O
2013	O
,	O
some	O
manufacturers	O
still	O
support	O
STEbus	B-Architecture
,	O
G64	O
,	O
Multibus	O
II	O
,	O
and	O
other	O
legacy	O
bussed	O
systems	O
.	O
</s>
<s>
VME/STE	O
hybrid	O
boards	O
have	O
the	O
STEbus	B-Architecture
and	O
VMEbus	B-Architecture
sharing	O
the	O
VME	O
P2	O
connector	O
,	O
VME	O
signals	O
on	O
row	O
b	O
.	O
</s>
<s>
For	O
this	O
reason	O
,	O
STEbus	B-Architecture
boards	O
may	O
not	O
use	O
row	O
b	O
for	O
any	O
purpose	O
.	O
</s>
<s>
The	O
STEbus	B-Architecture
spec	O
is	O
not	O
rigid	O
about	O
where	O
this	O
should	O
be	O
sourced	O
from	O
.	O
</s>
<s>
Data	B-General_Concept
bus	I-General_Concept
.	O
</s>
<s>
Typically	O
8	O
small	O
jumpers	B-Device
or	O
a	O
single	O
unit	O
of	O
8	O
DIP	O
switches	O
or	O
two	O
binary-coded	O
hexadecimal	O
rotary	O
switches	O
are	O
used	O
to	O
give	O
each	O
I/O	O
slave	O
board	O
a	O
unique	O
address	O
.	O
</s>
<s>
The	O
number	O
of	O
Attention	O
Requests	O
reflects	O
the	O
intended	O
role	O
of	O
the	O
STEbus	B-Architecture
,	O
in	O
real-time	O
control	O
systems	O
.	O
</s>
<s>
The	O
number	O
of	O
Attention	O
Requests	O
reflects	O
that	O
the	O
STEbus	B-Architecture
aims	O
to	O
be	O
simple	O
.	O
</s>
<s>
A	O
slave	O
will	O
assert	O
this	O
signal	O
when	O
to	O
acknowledge	O
the	O
safe	O
completion	O
of	O
a	O
data	O
transfer	O
via	O
the	O
STEbus	B-Architecture
.	O
</s>
<s>
This	O
allows	O
STEbus	B-Architecture
systems	O
to	O
use	O
plug-in	O
cards	O
with	O
a	O
wide	O
variety	O
of	O
speeds	O
,	O
</s>
<s>
A	O
slave	O
will	O
assert	O
this	O
signal	O
when	O
acknowledging	O
the	O
erroneous	O
completion	O
of	O
a	O
data	O
transfer	O
via	O
the	O
STEbus	B-Architecture
.	O
</s>
<s>
Originally	O
,	O
this	O
had	O
some	O
practical	O
use	O
in	O
DRAM	O
boards	O
which	O
could	O
start	O
strobing	O
the	O
address	O
lines	O
into	O
DRAM	O
chips	O
before	O
the	O
data	B-General_Concept
bus	I-General_Concept
was	O
ready	O
.	O
</s>
<s>
The	O
STEbus	B-Architecture
spec	O
was	O
later	O
firmed	O
up	O
to	O
say	O
that	O
slaves	O
were	O
not	O
allowed	O
to	O
start	O
transfers	O
until	O
DATSTB*	O
was	O
ready	O
,	O
so	O
ADRSTB*	O
has	O
become	O
quite	O
redundant	O
.	O
</s>
<s>
Nowadays	O
,	O
STEbus	B-Architecture
masters	O
can	O
simply	O
generate	O
DATSTB*	O
and	O
ADRSTB*	O
from	O
the	O
same	O
logic	O
signal	O
.	O
</s>
<s>
The	O
sequence	O
matches	O
that	O
of	O
the	O
68008	B-Device
's	O
bus	O
.	O
</s>
<s>
So	O
a	O
STEbus	B-Architecture
expansion	B-Device
card	I-Device
sees	O
the	O
same	O
signals	O
no	O
matter	O
which	O
slot	O
of	O
the	O
backplane	O
it	O
is	O
plugged	O
into	O
.	O
</s>
<s>
7400	O
series	O
chips	O
are	O
often	O
used	O
to	O
build	O
custom	O
control	O
boards	O
,	O
directly	O
connected	O
to	O
the	O
STEbus	B-Architecture
.	O
</s>
