<s>
Supplemental	O
Streaming	B-General_Concept
SIMD	I-General_Concept
Extensions	I-General_Concept
3	O
(	O
SSSE3	B-General_Concept
or	O
SSE3S	B-General_Concept
)	O
is	O
a	O
SIMD	B-Device
instruction	O
set	O
created	O
by	O
Intel	O
and	O
is	O
the	O
fourth	O
iteration	O
of	O
the	O
SSE	B-General_Concept
technology	O
.	O
</s>
<s>
SSSE3	B-General_Concept
was	O
first	O
introduced	O
with	O
Intel	O
processors	O
based	O
on	O
the	O
Core	B-Device
microarchitecture	I-Device
on	O
June	O
26	O
,	O
2006	O
with	O
the	O
"	O
Woodcrest	O
"	O
Xeons	B-Device
.	O
</s>
<s>
SSSE3	B-General_Concept
has	O
been	O
referred	O
to	O
by	O
the	O
codenames	O
Tejas	B-General_Concept
New	I-General_Concept
Instructions	I-General_Concept
(	O
TNI	O
)	O
or	O
Merom	B-General_Concept
New	I-General_Concept
Instructions	I-General_Concept
(	O
MNI	O
)	O
for	O
the	O
first	O
processor	O
designs	O
intended	O
to	O
support	O
it	O
.	O
</s>
<s>
SSSE3	B-General_Concept
contains	O
16	O
new	O
discrete	O
instructions	O
.	O
</s>
