<s>
SSE2	B-General_Concept
(	O
Streaming	B-General_Concept
SIMD	I-General_Concept
Extensions	I-General_Concept
2	O
)	O
is	O
one	O
of	O
the	O
Intel	O
SIMD	B-Device
(	O
Single	B-Device
Instruction	I-Device
,	I-Device
Multiple	I-Device
Data	I-Device
)	O
processor	B-General_Concept
supplementary	I-General_Concept
instruction	I-General_Concept
sets	O
first	O
introduced	O
by	O
Intel	O
with	O
the	O
initial	O
version	O
of	O
the	O
Pentium	B-General_Concept
4	I-General_Concept
in	O
2000	O
.	O
</s>
<s>
It	O
extends	O
the	O
earlier	O
SSE	B-General_Concept
instruction	O
set	O
,	O
and	O
is	O
intended	O
to	O
fully	O
replace	O
MMX	B-Architecture
.	O
</s>
<s>
Intel	O
extended	O
SSE2	B-General_Concept
to	O
create	O
SSE3	B-General_Concept
in	O
2004	O
.	O
</s>
<s>
SSE2	B-General_Concept
added	O
144	O
new	O
instructions	O
to	O
SSE	B-General_Concept
,	O
which	O
has	O
70	O
instructions	O
.	O
</s>
<s>
Competing	O
chip-maker	O
AMD	O
added	O
support	O
for	O
SSE2	B-General_Concept
with	O
the	O
introduction	O
of	O
their	O
Opteron	B-General_Concept
and	O
Athlon	O
64	O
ranges	O
of	O
AMD64	B-Device
64-bit	O
CPUs	O
in	O
2003	O
.	O
</s>
<s>
Most	O
of	O
the	O
SSE2	B-General_Concept
instructions	O
implement	O
the	O
integer	O
vector	O
operations	O
also	O
found	O
in	O
MMX	B-Architecture
.	O
</s>
<s>
Instead	O
of	O
the	O
MMX	B-Architecture
registers	O
they	O
use	O
the	O
XMM	O
registers	O
,	O
which	O
are	O
wider	O
and	O
allow	O
for	O
significant	O
performance	O
improvements	O
in	O
specialized	O
applications	O
.	O
</s>
<s>
Another	O
advantage	O
of	O
replacing	O
MMX	B-Architecture
with	O
SSE2	B-General_Concept
is	O
avoiding	O
the	O
mode	O
switching	O
penalty	O
for	O
issuing	O
x87	B-Application
instructions	O
present	O
in	O
MMX	B-Architecture
because	O
it	O
is	O
sharing	O
register	O
space	O
with	O
the	O
x87	B-Application
FPU	I-Application
.	O
</s>
<s>
The	O
SSE2	B-General_Concept
also	O
complements	O
the	O
floating-point	O
vector	O
operations	O
of	O
the	O
SSE	B-General_Concept
instruction	O
set	O
by	O
adding	O
support	O
for	O
the	O
double	O
precision	O
data	O
type	O
.	O
</s>
<s>
Other	O
SSE2	B-General_Concept
extensions	O
include	O
a	O
set	O
of	O
cache	B-Architecture
control	I-Architecture
instructions	I-Architecture
intended	O
primarily	O
to	O
minimize	O
cache	B-General_Concept
pollution	I-General_Concept
when	O
processing	O
infinite	O
streams	O
of	O
information	O
,	O
and	O
a	O
sophisticated	O
complement	O
of	O
numeric	O
format	O
conversion	O
instructions	O
.	O
</s>
<s>
AMD	O
's	O
implementation	O
of	O
SSE2	B-General_Concept
on	O
the	O
AMD64	B-Device
(	O
x86-64	B-Device
)	O
platform	O
includes	O
an	O
additional	O
eight	O
registers	O
,	O
doubling	O
the	O
total	O
number	O
to	O
16	O
(	O
XMM0	O
through	O
XMM15	O
)	O
.	O
</s>
<s>
Intel	O
adopted	O
these	O
additional	O
registers	O
as	O
part	O
of	O
their	O
support	O
for	O
x86-64	B-Device
architecture	O
(	O
or	O
in	O
Intel	O
's	O
parlance	O
,	O
"	O
Intel	O
64	O
"	O
)	O
in	O
2004	O
.	O
</s>
<s>
FPU	O
(	O
x87	B-Application
)	O
instructions	O
provide	O
higher	O
precision	O
by	O
calculating	O
intermediate	O
results	O
with	O
80	O
bits	O
of	O
precision	O
,	O
by	O
default	O
,	O
to	O
minimise	O
roundoff	B-Algorithm
error	I-Algorithm
in	O
numerically	O
unstable	O
algorithms	O
(	O
see	O
IEEE	O
754	O
design	O
rationale	O
and	O
references	O
therein	O
)	O
.	O
</s>
<s>
However	O
,	O
the	O
x87	B-Application
FPU	I-Application
is	O
a	O
scalar	O
unit	O
only	O
whereas	O
SSE2	B-General_Concept
can	O
process	O
a	O
small	O
vector	O
of	O
operands	O
in	O
parallel	O
.	O
</s>
<s>
If	O
code	O
designed	O
for	O
x87	B-Application
is	O
ported	O
to	O
the	O
lower	O
precision	O
double	O
precision	O
SSE2	B-General_Concept
floating	O
point	O
,	O
certain	O
combinations	O
of	O
math	O
operations	O
or	O
input	O
datasets	O
can	O
result	O
in	O
measurable	O
numerical	O
deviation	O
,	O
which	O
can	O
be	O
an	O
issue	O
in	O
reproducible	O
scientific	O
computations	O
,	O
e.g.	O
</s>
<s>
A	O
related	O
issue	O
is	O
that	O
,	O
historically	O
,	O
language	O
standards	O
and	O
compilers	O
had	O
been	O
inconsistent	O
in	O
their	O
handling	O
of	O
the	O
x87	B-Application
80-bit	O
registers	O
implementing	O
double	O
extended	O
precision	O
variables	O
,	O
compared	O
with	O
the	O
double	O
and	O
single	O
precision	O
formats	O
implemented	O
in	O
SSE2	B-General_Concept
:	O
the	O
rounding	O
of	O
extended	O
precision	O
intermediate	O
values	O
to	O
double	O
precision	O
variables	O
was	O
not	O
fully	O
defined	O
and	O
was	O
dependent	O
on	O
implementation	O
details	O
such	O
as	O
when	O
registers	O
were	O
spilled	O
to	O
memory	O
.	O
</s>
<s>
SSE2	B-General_Concept
extends	O
MMX	B-Architecture
instructions	O
to	O
operate	O
on	O
XMM	O
registers	O
.	O
</s>
<s>
Therefore	O
,	O
it	O
is	O
possible	O
to	O
convert	O
all	O
existing	O
MMX	B-Architecture
code	O
to	O
an	O
SSE2	B-General_Concept
equivalent	O
.	O
</s>
<s>
Since	O
an	O
SSE2	B-General_Concept
register	O
is	O
twice	O
as	O
long	O
as	O
an	O
MMX	B-Architecture
register	O
,	O
loop	O
counters	O
and	O
memory	O
access	O
may	O
need	O
to	O
be	O
changed	O
to	O
accommodate	O
this	O
.	O
</s>
<s>
Although	O
one	O
SSE2	B-General_Concept
instruction	O
can	O
operate	O
on	O
twice	O
as	O
much	O
data	O
as	O
an	O
MMX	B-Architecture
instruction	O
,	O
performance	O
might	O
not	O
increase	O
significantly	O
.	O
</s>
<s>
Two	O
major	O
reasons	O
are	O
:	O
accessing	O
SSE2	B-General_Concept
data	O
in	O
memory	O
not	O
aligned	B-Application
to	O
a	O
16-byte	O
boundary	O
can	O
incur	O
significant	O
penalty	O
,	O
and	O
the	O
throughput	O
of	O
SSE2	B-General_Concept
instructions	O
in	O
older	O
x86	B-Operating_System
implementations	O
was	O
half	O
that	O
for	O
MMX	B-Architecture
instructions	O
.	O
</s>
<s>
Intel	O
addressed	O
the	O
first	O
problem	O
by	O
adding	O
an	O
instruction	O
in	O
SSE3	B-General_Concept
to	O
reduce	O
the	O
overhead	O
of	O
accessing	O
unaligned	O
data	O
and	O
improving	O
the	O
overall	O
performance	O
of	O
misaligned	O
loads	O
,	O
and	O
the	O
last	O
problem	O
by	O
widening	O
the	O
execution	O
engine	O
in	O
their	O
Core	B-Device
microarchitecture	I-Device
in	O
Core	O
2	O
Duo	O
and	O
later	O
products	O
.	O
</s>
<s>
Since	O
MMX	B-Architecture
and	O
x87	B-Application
register	O
files	O
alias	O
one	O
another	O
,	O
using	O
MMX	B-Architecture
will	O
prevent	O
x87	B-Application
instructions	O
from	O
working	O
as	O
desired	O
.	O
</s>
<s>
Once	O
MMX	B-Architecture
has	O
been	O
used	O
,	O
the	O
programmer	O
must	O
use	O
the	O
emms	O
instruction	O
(	O
C	O
:	O
_mm_empty( )	O
)	O
to	O
restore	O
operation	O
to	O
the	O
x87	B-Application
register	O
file	O
.	O
</s>
<s>
On	O
some	O
operating	O
systems	O
,	O
x87	B-Application
is	O
not	O
used	O
very	O
much	O
,	O
but	O
may	O
still	O
be	O
used	O
in	O
some	O
critical	O
areas	O
like	O
pow( )	O
where	O
the	O
extra	O
precision	O
is	O
needed	O
.	O
</s>
<s>
Since	O
the	O
problem	O
is	O
not	O
locally	O
apparent	O
in	O
the	O
MMX	B-Architecture
code	O
,	O
finding	O
and	O
correcting	O
the	O
bug	O
can	O
be	O
very	O
time	O
consuming	O
.	O
</s>
<s>
As	O
SSE2	B-General_Concept
does	O
not	O
have	O
this	O
problem	O
and	O
it	O
usually	O
provides	O
much	O
better	O
throughput	O
and	O
provides	O
more	O
registers	O
in	O
64-bit	O
code	O
,	O
it	O
should	O
be	O
preferred	O
for	O
nearly	O
all	O
vectorization	O
work	O
.	O
</s>
<s>
When	O
first	O
introduced	O
in	O
2000	O
,	O
SSE2	B-General_Concept
was	O
not	O
supported	O
by	O
software	O
development	O
tools	O
.	O
</s>
<s>
For	O
example	O
,	O
to	O
use	O
SSE2	B-General_Concept
in	O
a	O
Microsoft	B-Application
Visual	I-Application
Studio	I-Application
project	O
,	O
the	O
programmer	O
had	O
to	O
either	O
manually	O
write	O
inline-assembly	O
or	O
import	O
object-code	O
from	O
an	O
external	O
source	O
.	O
</s>
<s>
Later	O
the	O
Visual	B-Application
C++	I-Application
Processor	O
Pack	O
added	O
SSE2	B-General_Concept
support	O
to	O
Visual	B-Application
C++	I-Application
and	O
MASM	B-Application
.	O
</s>
<s>
The	O
Intel	B-Language
C++	I-Language
Compiler	I-Language
can	O
automatically	O
generate	O
SSE4	B-General_Concept
,	O
SSSE3	B-General_Concept
,	O
SSE3	B-General_Concept
,	O
SSE2	B-General_Concept
,	O
and	O
SSE	B-General_Concept
code	O
without	O
the	O
use	O
of	O
hand-coded	O
assembly	O
.	O
</s>
<s>
Since	O
GCC	B-Application
3	O
,	O
GCC	B-Application
can	O
automatically	O
generate	O
SSE/SSE2	O
scalar	O
code	O
when	O
the	O
target	O
supports	O
those	O
instructions	O
.	O
</s>
<s>
Automatic	B-General_Concept
vectorization	I-General_Concept
for	O
SSE/SSE2	O
has	O
been	O
added	O
since	O
GCC	B-Application
4	O
.	O
</s>
<s>
The	O
Sun	B-Application
Studio	I-Application
Compiler	I-Application
Suite	I-Application
can	O
also	O
generate	O
SSE2	B-General_Concept
instructions	O
when	O
the	O
compiler	O
flag	O
-xvector	O
=	O
simd	B-Device
is	O
used	O
.	O
</s>
<s>
Since	O
Microsoft	B-Application
Visual	I-Application
C++	I-Application
2012	O
,	O
the	O
compiler	O
option	O
to	O
generate	O
SSE2	B-General_Concept
instructions	O
is	O
turned	O
on	O
by	O
default	O
.	O
</s>
<s>
SSE2	B-General_Concept
is	O
an	O
extension	O
of	O
the	O
IA-32	B-Device
architecture	O
,	O
based	O
on	O
the	O
x86	B-Device
instruction	I-Device
set	I-Device
.	O
</s>
<s>
Therefore	O
,	O
only	O
x86	B-Operating_System
processors	O
can	O
include	O
SSE2	B-General_Concept
.	O
</s>
<s>
The	O
AMD64	B-Device
architecture	O
supports	O
the	O
IA-32	B-Device
as	O
a	O
compatibility	O
mode	O
and	O
includes	O
the	O
SSE2	B-General_Concept
in	O
its	O
specification	O
.	O
</s>
<s>
SSE2	B-General_Concept
is	O
also	O
a	O
requirement	O
for	O
installing	O
Windows	O
8	O
(	O
and	O
later	O
)	O
or	O
Microsoft	O
Office	O
2013	O
(	O
and	O
later	O
)	O
"	O
to	O
enhance	O
the	O
reliability	O
of	O
third-party	O
apps	O
and	O
drivers	O
running	O
in	O
Windows	O
8	O
"	O
.	O
</s>
<s>
The	O
following	O
IA-32	B-Device
CPUs	O
support	O
SSE2	B-General_Concept
:	O
</s>
<s>
The	O
following	O
IA-32	B-Device
CPUs	O
were	O
released	O
after	O
SSE2	B-General_Concept
was	O
developed	O
,	O
but	O
did	O
not	O
implement	O
it	O
:	O
</s>
