<s>
The	O
SPARCstation	B-Architecture
20	I-Architecture
or	O
SS20	O
(	O
code-named	O
Kodiak	O
)	O
is	O
a	O
discontinued	O
Sun	O
Microsystems	O
workstation	B-Device
introduced	O
in	O
March	O
1994	O
based	O
on	O
the	O
SuperSPARC	B-Device
or	O
hyperSPARC	B-General_Concept
CPU	O
.	O
</s>
<s>
It	O
is	O
one	O
of	O
the	O
last	O
models	O
in	O
the	O
SPARCstation	B-Device
family	O
of	O
Sun	O
"	O
pizza	B-General_Concept
box	I-General_Concept
"	O
computers	O
,	O
which	O
was	O
superseded	O
by	O
the	O
UltraSPARC	B-Device
design	O
in	O
1995	O
.	O
</s>
<s>
Sun	O
rolled	O
out	O
the	O
SPARCstation	B-Architecture
20	I-Architecture
for	O
.	O
</s>
<s>
The	O
SPARCstation	B-Architecture
20	I-Architecture
has	O
dual	O
50MHz	O
MBus	B-Architecture
ports	O
that	O
allow	O
it	O
to	O
use	O
faster	O
CPUs	O
than	O
the	O
SPARCstation	B-Architecture
10	I-Architecture
.	O
</s>
<s>
With	O
two	O
dual-CPU	O
modules	O
and	O
updated	O
firmware	B-Application
,	O
the	O
SPARCstation	B-Architecture
20	I-Architecture
supports	O
a	O
maximum	O
of	O
four	O
CPUs	O
.	O
</s>
<s>
The	O
fastest	O
CPU	O
produced	O
for	O
the	O
SPARCstation	B-Architecture
20	I-Architecture
is	O
the	O
200MHz	O
Ross	O
hyperSPARC	B-General_Concept
.	O
</s>
<s>
The	O
PROM	B-General_Concept
in	O
the	O
SPARCstation	B-Architecture
20	I-Architecture
determines	O
CPU	O
compatibility	O
.	O
</s>
<s>
The	O
SPARCstation	B-Architecture
20	I-Architecture
has	O
eight	O
200-pin	O
DSIMM	O
slots	O
,	O
and	O
supports	O
a	O
maximum	O
of	O
512MB	O
of	O
memory	O
with	O
64MB	O
modules	O
.	O
</s>
<s>
Memory	O
modules	O
for	O
the	O
SPARCstation	B-Architecture
20	I-Architecture
are	O
compatible	O
with	O
the	O
SPARCstation	B-Architecture
10	I-Architecture
,	O
Sun	B-Architecture
Ultra	I-Architecture
1	I-Architecture
,	O
and	O
some	O
other	O
computers	O
in	O
the	O
sun4m	B-Device
and	O
sun4u	O
families	O
,	O
but	O
they	O
are	O
physically	O
incompatible	O
with	O
the	O
SIMM	O
slots	O
found	O
in	O
PC	O
computers	O
.	O
</s>
<s>
The	O
SPARCstation	B-Architecture
20	I-Architecture
has	O
two	O
internal	O
SCA	O
bays	O
,	O
an	O
external	O
SCSI	B-Architecture
connector	O
,	O
and	O
two	O
bays	O
for	O
CD-ROM	B-Device
or	O
floppy	B-Device
drives	I-Device
.	O
</s>
<s>
Earlier	O
revisions	O
of	O
the	O
SPARCstation	B-Architecture
20	I-Architecture
case	O
contain	O
a	O
CD-ROM	B-Device
and	O
floppy	B-Device
bays	O
that	O
are	O
slightly	O
shorter	O
than	O
a	O
standard	O
3.5	B-Device
"	I-Device
bay	O
and	O
regular	O
devices	O
intended	O
for	O
PC	O
compatible	O
computers	O
do	O
not	O
usually	O
fit	O
.	O
</s>
<s>
Later	O
revisions	O
of	O
the	O
SPARCstation	B-Architecture
20	I-Architecture
and	O
SPARCstation	B-Architecture
5	I-Architecture
have	O
a	O
narrower	O
slot	O
for	O
the	O
floppy	B-Device
drive	I-Device
so	O
a	O
more-standard	O
CD-ROM	B-Device
can	O
fit	O
.	O
</s>
<s>
The	O
SCSI	B-Architecture
host	O
controller	O
is	O
integrated	O
with	O
the	O
motherboard	O
.	O
</s>
<s>
The	O
SPARCstation	B-Architecture
20	I-Architecture
does	O
not	O
support	O
IDE	B-Protocol
devices	O
.	O
</s>
<s>
A	O
limitation	O
in	O
all	O
releases	O
of	O
the	O
OpenBoot	B-Architecture
PROM	B-General_Concept
for	O
the	O
SPARCstation	B-Architecture
20	I-Architecture
prevents	O
it	O
from	O
booting	O
from	O
a	O
point	O
on	O
a	O
disk	O
past	O
the	O
2	O
gigabyte	O
mark	O
.	O
</s>
<s>
The	O
SPARCstation	B-Architecture
20	I-Architecture
has	O
one	O
integrated	O
AMD	O
Lance	O
10BASE-T	B-Protocol
Ethernet	O
interface	O
,	O
along	O
with	O
a	O
custom	O
26-pin	O
AUI	B-Protocol
interface	I-Protocol
.	O
</s>
<s>
Additional	O
Ethernet	O
interfaces	O
can	O
be	O
added	O
with	O
an	O
SBus	B-Architecture
card	O
.	O
</s>
<s>
The	O
SPARCstation	B-Architecture
20	I-Architecture
has	O
a	O
built-in	O
13W3	B-Protocol
video	O
socket	O
driven	O
by	O
an	O
optional	O
SX	O
(	O
CG14	O
)	O
framebuffer	B-Algorithm
built	O
onto	O
a	O
VSIMM	O
.	O
</s>
<s>
If	O
two	O
VSIMMs	O
are	O
installed	O
,	O
an	O
auxiliary	O
video	O
board	O
must	O
also	O
be	O
installed	O
to	O
provide	O
a	O
second	O
13W3	B-Protocol
video	O
socket	O
.	O
</s>
<s>
Alternatively	O
,	O
SBus	B-Architecture
cards	O
can	O
be	O
used	O
,	O
including	O
the	O
8-bit	O
color	O
Turbo	O
GX	O
(	O
CG6	O
)	O
,	O
24-bit	O
color	O
ZX	O
(	O
Leo	O
)	O
and	O
others	O
.	O
</s>
<s>
The	O
SPARCstation	B-Architecture
20	I-Architecture
has	O
integrated	O
sound	O
with	O
four	O
standard	O
3.5mm	O
audio	O
jacks	O
for	O
headphones	O
,	O
microphone	O
,	O
line	O
in	O
,	O
and	O
line	O
out	O
.	O
</s>
<s>
The	O
SPARCstation	B-Architecture
20	I-Architecture
uses	O
a	O
battery-backed	O
NVRAM	O
module	O
to	O
hold	O
data	O
about	O
the	O
system	O
,	O
such	O
as	O
the	O
host	O
ID	O
(	O
serial	O
number	O
)	O
and	O
MAC	O
address	O
.	O
</s>
<s>
117	O
SPARCstation	B-Architecture
20	I-Architecture
Model	O
HS11	O
units	O
,	O
87	O
with	O
two	O
100	O
MHz	O
hyperSPARC	B-General_Concept
processors	O
and	O
30	O
with	O
four	O
100	O
MHz	O
hyperSPARC	B-General_Concept
processors	O
,	O
plus	O
a	O
single	O
octo-processor	O
SPARCserver	B-Device
1000	I-Device
were	O
used	O
to	O
render	O
Toy	B-Application
Story	I-Application
.	O
</s>
