<s>
SPARC	B-Architecture
(	O
Scalable	B-Architecture
Processor	I-Architecture
Architecture	I-Architecture
)	O
is	O
a	O
reduced	B-Architecture
instruction	I-Architecture
set	I-Architecture
computer	I-Architecture
(	O
RISC	B-General_Concept
)	O
instruction	B-General_Concept
set	I-General_Concept
architecture	I-General_Concept
originally	O
developed	O
by	O
Sun	O
Microsystems	O
.	O
</s>
<s>
Its	O
design	O
was	O
strongly	O
influenced	O
by	O
the	O
experimental	O
Berkeley	B-General_Concept
RISC	I-General_Concept
system	O
developed	O
in	O
the	O
early	O
1980s	O
.	O
</s>
<s>
First	O
developed	O
in	O
1986	O
and	O
released	O
in	O
1987	O
,	O
SPARC	B-Architecture
was	O
one	O
of	O
the	O
most	O
successful	O
early	O
commercial	O
RISC	B-General_Concept
systems	O
,	O
and	O
its	O
success	O
led	O
to	O
the	O
introduction	O
of	O
similar	O
RISC	B-General_Concept
designs	O
from	O
many	O
vendors	O
through	O
the	O
1980s	O
and	O
1990s	O
.	O
</s>
<s>
The	O
first	O
implementation	O
of	O
the	O
original	O
32-bit	O
architecture	O
(	O
SPARC	B-Architecture
V7	I-Architecture
)	O
was	O
used	O
in	O
Sun	O
's	O
Sun-4	B-Device
computer	B-Device
workstation	I-Device
and	O
server	B-Application
systems	O
,	O
replacing	O
their	O
earlier	O
Sun-3	B-Device
systems	O
based	O
on	O
the	O
Motorola	B-Device
68000	I-Device
series	I-Device
of	O
processors	O
.	O
</s>
<s>
SPARC	B-Architecture
V8	I-Architecture
added	O
a	O
number	O
of	O
improvements	O
that	O
were	O
part	O
of	O
the	O
SuperSPARC	B-Device
series	O
of	O
processors	O
released	O
in	O
1992	O
.	O
</s>
<s>
SPARC	B-Architecture
V9	I-Architecture
,	O
released	O
in	O
1993	O
,	O
introduced	O
a	O
64-bit	B-Device
architecture	I-Device
and	O
was	O
first	O
released	O
in	O
Sun	O
's	O
UltraSPARC	B-General_Concept
processors	O
in	O
1995	O
.	O
</s>
<s>
Later	O
,	O
SPARC	B-Architecture
processors	O
were	O
used	O
in	O
symmetric	B-Operating_System
multiprocessing	I-Operating_System
(	O
SMP	O
)	O
and	O
non-uniform	B-Operating_System
memory	I-Operating_System
access	I-Operating_System
(	O
CC-NUMA	B-Operating_System
)	O
servers	O
produced	O
by	O
Sun	O
,	O
Solbourne	O
,	O
and	O
Fujitsu	O
,	O
among	O
others	O
.	O
</s>
<s>
The	O
design	O
was	O
turned	O
over	O
to	O
the	O
SPARC	B-Architecture
International	I-Architecture
trade	O
group	O
in	O
1989	O
,	O
and	O
since	O
then	O
its	O
architecture	O
has	O
been	O
developed	O
by	O
its	O
members	O
.	O
</s>
<s>
SPARC	B-Architecture
International	I-Architecture
is	O
also	O
responsible	O
for	O
licensing	O
and	O
promoting	O
the	O
SPARC	B-Architecture
architecture	O
,	O
managing	O
SPARC	B-Architecture
trademarks	O
(	O
including	O
SPARC	B-Architecture
,	O
which	O
it	O
owns	O
)	O
,	O
and	O
providing	O
conformance	O
testing	O
.	O
</s>
<s>
SPARC	B-Architecture
International	I-Architecture
was	O
intended	O
to	O
grow	O
the	O
SPARC	B-Architecture
architecture	O
to	O
create	O
a	O
larger	O
ecosystem	O
;	O
SPARC	B-Architecture
has	O
been	O
licensed	O
to	O
several	O
manufacturers	O
,	O
including	O
Atmel	O
,	O
Bipolar	O
Integrated	O
Technology	O
,	O
Cypress	O
Semiconductor	O
,	O
Fujitsu	O
,	O
Matsushita	O
and	O
Texas	O
Instruments	O
.	O
</s>
<s>
Due	O
to	O
SPARC	B-Architecture
International	I-Architecture
,	O
SPARC	B-Architecture
is	O
fully	O
open	O
,	O
non-proprietary	O
and	O
royalty-free	O
.	O
</s>
<s>
As	O
of	O
September	O
2017	O
,	O
the	O
latest	O
commercial	O
high-end	O
SPARC	B-Architecture
processors	O
are	O
Fujitsu	O
's	O
SPARC64	B-General_Concept
XII	O
(	O
introduced	O
in	O
2017	O
for	O
its	O
SPARC	B-Architecture
M12	O
server	B-Application
)	O
and	O
Oracle	B-Application
's	O
SPARC	B-Device
M8	I-Device
introduced	O
in	O
September	O
2017	O
for	O
its	O
high-end	O
servers	O
.	O
</s>
<s>
On	O
Friday	O
,	O
September	O
1	O
,	O
2017	O
,	O
after	O
a	O
round	O
of	O
layoffs	O
that	O
started	O
in	O
Oracle	B-Application
Labs	O
in	O
November	O
2016	O
,	O
Oracle	B-Application
terminated	O
SPARC	B-Architecture
design	O
after	O
completing	O
the	O
M8	O
.	O
</s>
<s>
Fujitsu	O
will	O
also	O
discontinue	O
their	O
SPARC	B-Architecture
production	O
(	O
has	O
already	O
shifted	O
to	O
producing	O
their	O
own	O
ARM-based	O
CPUs	O
)	O
,	O
after	O
two	O
"	O
enhanced	O
"	O
versions	O
of	O
Fujitsu	O
's	O
older	O
SPARC	B-Architecture
M12	O
server	B-Application
in	O
2020	O
–	O
22	O
(	O
formerly	O
planned	O
for	O
2021	O
)	O
and	O
again	O
in	O
2026	O
–	O
27	O
,	O
end-of-sale	O
in	O
2029	O
,	O
of	O
UNIX	O
servers	O
and	O
a	O
year	O
later	O
for	O
their	O
mainframe	B-Architecture
and	O
end-of-support	O
in	O
2034	O
"	O
to	O
promote	O
customer	O
modernization	O
"	O
.	O
</s>
<s>
The	O
SPARC	B-Architecture
architecture	O
was	O
heavily	O
influenced	O
by	O
the	O
earlier	O
RISC	B-General_Concept
designs	O
,	O
including	O
the	O
RISC	B-General_Concept
I	O
and	O
II	O
from	O
the	O
University	O
of	O
California	O
,	O
Berkeley	O
and	O
the	O
IBM	B-Device
801	I-Device
.	O
</s>
<s>
These	O
original	O
RISC	B-General_Concept
designs	O
were	O
minimalist	O
,	O
including	O
as	O
few	O
features	O
or	O
op-codes	O
as	O
possible	O
and	O
aiming	O
to	O
execute	O
instructions	O
at	O
a	O
rate	O
of	O
almost	O
one	O
instruction	O
per	O
clock	O
cycle	O
.	O
</s>
<s>
This	O
made	O
them	O
similar	O
to	O
the	O
MIPS	B-Device
architecture	I-Device
in	O
many	O
ways	O
,	O
including	O
the	O
lack	O
of	O
instructions	O
such	O
as	O
multiply	O
or	O
divide	O
.	O
</s>
<s>
Another	O
feature	O
of	O
SPARC	B-Architecture
influenced	O
by	O
this	O
early	O
RISC	B-General_Concept
movement	O
is	O
the	O
branch	B-General_Concept
delay	I-General_Concept
slot	I-General_Concept
.	O
</s>
<s>
The	O
SPARC	B-Architecture
processor	O
usually	O
contains	O
as	O
many	O
as	O
160	O
general-purpose	B-General_Concept
registers	I-General_Concept
.	O
</s>
<s>
According	O
to	O
the	O
"	O
Oracle	B-Application
SPARC	B-Architecture
Architecture	O
2015	O
"	O
specification	O
an	O
"	O
implementation	O
may	O
contain	O
from	O
72	O
to	O
640	O
general-purpose	O
64-bit	B-Device
"	O
registers	O
.	O
</s>
<s>
At	O
any	O
point	O
,	O
only	O
32	O
of	O
them	O
are	O
immediately	O
visible	O
to	O
software	O
—	O
8	O
are	O
a	O
set	O
of	O
global	O
registers	O
(	O
one	O
of	O
which	O
,	O
g0	O
,	O
is	O
hard-wired	O
to	O
zero	O
,	O
so	O
only	O
seven	O
of	O
them	O
are	O
usable	O
as	O
registers	O
)	O
and	O
the	O
other	O
24	O
are	O
from	O
the	O
stack	B-Application
of	O
registers	O
.	O
</s>
<s>
These	O
24	O
registers	O
form	O
what	O
is	O
called	O
a	O
register	B-General_Concept
window	I-General_Concept
,	O
and	O
at	O
function	O
call/return	O
,	O
this	O
window	O
is	O
moved	O
up	O
and	O
down	O
the	O
register	O
stack	B-Application
.	O
</s>
<s>
The	O
"	O
Scalable	O
"	O
in	O
SPARC	B-Architecture
comes	O
from	O
the	O
fact	O
that	O
the	O
SPARC	B-Architecture
specification	O
allows	O
implementations	O
to	O
scale	O
from	O
embedded	O
processors	O
up	O
through	O
large	O
server	B-Application
processors	O
,	O
all	O
sharing	O
the	O
same	O
core	O
(	O
non-privileged	O
)	O
instruction	B-General_Concept
set	I-General_Concept
.	O
</s>
<s>
One	O
of	O
the	O
architectural	O
parameters	O
that	O
can	O
scale	O
is	O
the	O
number	O
of	O
implemented	O
register	B-General_Concept
windows	I-General_Concept
;	O
the	O
specification	O
allows	O
from	O
three	O
to	O
32	O
windows	O
to	O
be	O
implemented	O
,	O
so	O
the	O
implementation	O
can	O
choose	O
to	O
implement	O
all	O
32	O
to	O
provide	O
maximum	O
call	B-General_Concept
stack	I-General_Concept
efficiency	O
,	O
or	O
to	O
implement	O
only	O
three	O
to	O
reduce	O
cost	O
and	O
complexity	O
of	O
the	O
design	O
,	O
or	O
to	O
implement	O
some	O
number	O
between	O
them	O
.	O
</s>
<s>
Other	O
architectures	O
that	O
include	O
similar	O
register	B-General_Concept
file	I-General_Concept
features	O
include	O
Intel	B-General_Concept
i960	I-General_Concept
,	O
IA-64	B-General_Concept
,	O
and	O
AMD	B-General_Concept
29000	I-General_Concept
.	O
</s>
<s>
64-bit	B-Device
(	O
addressing	O
and	O
data	O
)	O
were	O
added	O
to	O
the	O
version	O
9	O
SPARC	B-Architecture
specification	O
published	O
in	O
1994	O
.	O
</s>
<s>
In	O
SPARC	B-Architecture
Version	O
8	O
,	O
the	O
floating-point	B-Algorithm
register	B-General_Concept
file	I-General_Concept
has	O
16	O
double-precision	O
registers	O
.	O
</s>
<s>
SPARC	B-Architecture
Version	O
9	O
added	O
16	O
more	O
double-precision	O
registers	O
(	O
which	O
can	O
also	O
be	O
accessed	O
as	O
8	O
quad-precision	O
registers	O
)	O
,	O
but	O
these	O
additional	O
registers	O
can	O
not	O
be	O
accessed	O
as	O
single-precision	O
registers	O
.	O
</s>
<s>
No	O
SPARC	B-Architecture
CPU	O
implements	O
quad-precision	O
operations	O
in	O
hardware	O
as	O
of	O
2004	O
.	O
</s>
<s>
Tagged	B-Architecture
add	O
and	O
subtract	O
instructions	O
perform	O
adds	O
and	O
subtracts	O
on	O
values	O
checking	O
that	O
the	O
bottom	O
two	O
bits	O
of	O
both	O
operands	O
are	O
0	O
and	O
reporting	O
overflow	O
if	O
they	O
are	O
not	O
.	O
</s>
<s>
This	O
can	O
be	O
useful	O
in	O
the	O
implementation	O
of	O
the	O
run	B-Device
time	I-Device
for	O
ML	B-Language
,	O
Lisp	B-Language
,	O
and	O
similar	O
languages	O
that	O
might	O
use	O
a	O
tagged	B-Architecture
integer	O
format	O
.	O
</s>
<s>
The	O
endianness	O
of	O
the	O
32-bit	O
SPARC	B-Architecture
V8	I-Architecture
architecture	O
is	O
purely	O
big-endian	O
.	O
</s>
<s>
The	O
64-bit	B-Device
SPARC	B-Architecture
V9	I-Architecture
architecture	O
uses	O
big-endian	O
instructions	O
,	O
but	O
can	O
access	O
data	O
in	O
either	O
big-endian	O
or	O
little-endian	O
byte	O
order	O
,	O
chosen	O
either	O
at	O
the	O
application	O
instruction	O
(	O
load	B-Architecture
–	I-Architecture
store	I-Architecture
)	O
level	O
or	O
at	O
the	O
memory	B-Architecture
page	I-Architecture
level	O
(	O
via	O
an	O
MMU	O
setting	O
)	O
.	O
</s>
<s>
The	O
first	O
published	O
version	O
was	O
the	O
32-bit	O
SPARC	B-Architecture
Version	O
7	O
(	O
V7	O
)	O
in	O
1986	O
.	O
</s>
<s>
SPARC	B-Architecture
Version	O
8	O
(	O
V8	O
)	O
,	O
an	O
enhanced	O
SPARC	B-Architecture
architecture	O
definition	O
,	O
was	O
released	O
in	O
1990	O
.	O
</s>
<s>
The	O
main	O
differences	O
between	O
V7	O
and	O
V8	O
were	O
the	O
addition	O
of	O
integer	O
multiply	O
and	O
divide	O
instructions	O
,	O
and	O
an	O
upgrade	O
from	O
80-bit	O
"	O
extended-precision	O
"	O
floating-point	B-Algorithm
arithmetic	I-Algorithm
to	O
128-bit	O
"	O
quad-precision	O
"	O
arithmetic	O
.	O
</s>
<s>
SPARC	B-Architecture
V8	I-Architecture
served	O
as	O
the	O
basis	O
for	O
IEEE	O
Standard	O
1754-1994	O
,	O
an	O
IEEE	O
standard	O
for	O
a	O
32-bit	O
microprocessor	O
architecture	O
.	O
</s>
<s>
SPARC	B-Architecture
Version	O
9	O
,	O
the	O
64-bit	B-Device
SPARC	B-Architecture
architecture	O
,	O
was	O
released	O
by	O
SPARC	B-Architecture
International	I-Architecture
in	O
1993	O
.	O
</s>
<s>
It	O
was	O
developed	O
by	O
the	O
SPARC	B-Architecture
Architecture	O
Committee	O
consisting	O
of	O
Amdahl	O
Corporation	O
,	O
Fujitsu	O
,	O
ICL	O
,	O
LSI	O
Logic	O
,	O
Matsushita	O
,	O
Philips	O
,	O
Ross	O
Technology	O
,	O
Sun	O
Microsystems	O
,	O
and	O
Texas	O
Instruments	O
.	O
</s>
<s>
Newer	O
specifications	O
always	O
remain	O
compliant	O
with	O
the	O
full	O
SPARC	B-Architecture
V9	I-Architecture
Level	O
1	O
specification	O
.	O
</s>
<s>
In	O
2002	O
,	O
the	O
SPARC	B-Architecture
Joint	O
Programming	O
Specification	O
1	O
(	O
JPS1	O
)	O
was	O
released	O
by	O
Fujitsu	O
and	O
Sun	O
,	O
describing	O
processor	O
functions	O
which	O
were	O
identically	O
implemented	O
in	O
the	O
CPUs	O
of	O
both	O
companies	O
(	O
"	O
Commonality	O
"	O
)	O
.	O
</s>
<s>
The	O
first	O
CPUs	O
conforming	O
to	O
JPS1	O
were	O
the	O
UltraSPARC	B-General_Concept
III	I-General_Concept
by	O
Sun	O
and	O
the	O
SPARC64	B-Device
V	I-Device
by	O
Fujitsu	O
.	O
</s>
<s>
The	O
first	O
CPUs	O
conforming	O
to	O
JPS2	O
were	O
the	O
UltraSPARC	B-General_Concept
IV	I-General_Concept
by	O
Sun	O
and	O
the	O
SPARC64	B-Device
VI	I-Device
by	O
Fujitsu	O
.	O
</s>
<s>
In	O
early	O
2006	O
,	O
Sun	O
released	O
an	O
extended	O
architecture	O
specification	O
,	O
UltraSPARC	B-General_Concept
Architecture	O
2005	O
.	O
</s>
<s>
This	O
includes	O
not	O
only	O
the	O
non-privileged	O
and	O
most	O
of	O
the	O
privileged	O
portions	O
of	O
SPARC	B-Architecture
V9	I-Architecture
,	O
but	O
also	O
all	O
the	O
architectural	O
extensions	O
developed	O
through	O
the	O
processor	O
generations	O
of	O
UltraSPARC	B-General_Concept
III	I-General_Concept
,	O
IV	O
IV+	O
as	O
well	O
as	O
CMT	O
extensions	O
starting	O
with	O
the	O
UltraSPARC	B-General_Concept
T1	I-General_Concept
implementation	O
:	O
</s>
<s>
In	O
2007	O
,	O
Sun	O
released	O
an	O
updated	O
specification	O
,	O
UltraSPARC	B-General_Concept
Architecture	O
2007	O
,	O
to	O
which	O
the	O
UltraSPARC	B-Device
T2	I-Device
implementation	O
complied	O
.	O
</s>
<s>
In	O
August	O
2012	O
,	O
Oracle	B-Application
Corporation	I-Application
made	O
available	O
a	O
new	O
specification	O
,	O
Oracle	B-Application
SPARC	B-Architecture
Architecture	O
2011	O
,	O
which	O
besides	O
the	O
overall	O
update	O
of	O
the	O
reference	O
,	O
adds	O
the	O
VIS	B-General_Concept
3	O
instruction	B-General_Concept
set	I-General_Concept
extensions	O
and	O
hyperprivileged	O
mode	O
to	O
the	O
2007	O
specification	O
.	O
</s>
<s>
In	O
October	O
2015	O
,	O
Oracle	B-Application
released	O
SPARC	B-Device
M7	I-Device
,	O
the	O
first	O
processor	O
based	O
on	O
the	O
new	O
Oracle	B-Application
SPARC	B-Architecture
Architecture	O
2015	O
specification	O
.	O
</s>
<s>
This	O
revision	O
includes	O
VIS	B-General_Concept
4	O
instruction	B-General_Concept
set	I-General_Concept
extensions	O
and	O
hardware-assisted	O
encryption	O
and	O
silicon	O
secured	O
memory	B-General_Concept
(	O
SSM	O
)	O
.	O
</s>
<s>
SPARC	B-Architecture
architecture	O
has	O
provided	O
continuous	O
application	O
binary	O
compatibility	O
from	O
the	O
first	O
SPARC	B-Architecture
V7	I-Architecture
implementation	O
in	O
1987	O
through	O
the	O
Sun	B-General_Concept
UltraSPARC	I-General_Concept
Architecture	O
implementations	O
.	O
</s>
<s>
Among	O
various	O
implementations	O
of	O
SPARC	B-Architecture
,	O
Sun	O
's	O
SuperSPARC	B-Device
and	O
UltraSPARC-I	O
were	O
very	O
popular	O
,	O
and	O
were	O
used	O
as	O
reference	O
systems	O
for	O
SPEC	O
CPU95	O
and	O
CPU2000	O
benchmarks	O
.	O
</s>
<s>
The	O
296MHz	O
UltraSPARC-II	O
is	O
the	O
reference	O
system	O
for	O
the	O
SPEC	O
CPU2006	O
benchmark	O
.	O
</s>
<s>
SPARC	B-Architecture
is	O
a	O
load/store	B-Architecture
architecture	I-Architecture
(	O
also	O
known	O
as	O
a	O
register-register	O
architecture	O
)	O
;	O
except	O
for	O
the	O
load/store	B-General_Concept
instructions	I-General_Concept
used	O
to	O
access	O
memory	B-General_Concept
,	O
all	O
instructions	O
operate	O
on	O
the	O
registers	O
,	O
in	O
accordance	O
with	O
the	O
RISC	B-General_Concept
design	O
principles	O
.	O
</s>
<s>
The	O
SPARC	B-Architecture
architecture	O
has	O
an	O
overlapping	O
register	B-General_Concept
window	I-General_Concept
scheme	O
.	O
</s>
<s>
The	O
total	O
size	O
of	O
the	O
register	B-General_Concept
file	I-General_Concept
is	O
not	O
part	O
of	O
the	O
architecture	O
,	O
allowing	O
more	O
registers	O
to	O
be	O
added	O
as	O
the	O
technology	O
improves	O
,	O
up	O
to	O
a	O
maximum	O
of	O
32	O
windows	O
in	O
SPARC	B-Architecture
V7	I-Architecture
and	O
V8	O
as	O
CWP	O
is	O
5	O
bits	O
and	O
is	O
part	O
of	O
the	O
PSR	O
register	O
.	O
</s>
<s>
In	O
SPARC	B-Architecture
V7	I-Architecture
and	O
V8	O
CWP	O
will	O
usually	O
be	O
decremented	O
by	O
the	O
SAVE	O
instruction	O
(	O
used	O
by	O
the	O
SAVE	O
instruction	O
during	O
the	O
procedure	O
call	O
to	O
open	O
a	O
new	O
stack	B-Application
frame	O
and	O
switch	O
the	O
register	B-General_Concept
window	I-General_Concept
)	O
,	O
or	O
incremented	O
by	O
the	O
RESTORE	O
instruction	O
(	O
switching	O
back	O
to	O
the	O
call	O
before	O
returning	O
from	O
the	O
procedure	O
)	O
.	O
</s>
<s>
For	O
SPARC	B-Architecture
V9	I-Architecture
,	O
CWP	O
register	O
is	O
decremented	O
during	O
a	O
RESTORE	O
instruction	O
,	O
and	O
incremented	O
during	O
a	O
SAVE	O
instruction	O
.	O
</s>
<s>
This	O
is	O
the	O
opposite	O
of	O
PSR.CWP	O
'	O
s	O
behavior	O
in	O
SPARC	B-Architecture
V8	I-Architecture
.	O
</s>
<s>
SPARC	B-Architecture
registers	O
are	O
shown	O
in	O
the	O
figure	O
above	O
.	O
</s>
<s>
All	O
SPARC	B-Architecture
instructions	O
occupy	O
a	O
full	O
32	O
bit	O
word	O
and	O
start	O
on	O
a	O
word	O
boundary	O
.	O
</s>
<s>
The	O
ANNUL	O
(	O
A	O
)	O
bit	O
is	O
used	O
to	O
get	O
rid	O
of	O
some	O
delay	B-General_Concept
slots	I-General_Concept
.	O
</s>
<s>
If	O
it	O
is	O
0	O
in	O
a	O
conditional	O
branch	O
,	O
the	O
delay	B-General_Concept
slot	I-General_Concept
is	O
executed	O
as	O
usual	O
.	O
</s>
<s>
If	O
it	O
is	O
1	O
,	O
the	O
delay	B-General_Concept
slot	I-General_Concept
is	O
only	O
executed	O
if	O
the	O
branch	O
is	O
taken	O
.	O
</s>
<s>
Just	O
like	O
the	O
arithmetic	O
instructions	O
,	O
the	O
SPARC	B-Architecture
architecture	O
uses	O
two	O
different	O
formats	O
for	O
load	B-General_Concept
and	I-General_Concept
store	I-General_Concept
instructions	I-General_Concept
.	O
</s>
<s>
Most	O
arithmetic	O
instructions	O
come	O
in	O
pairs	O
with	O
one	O
version	O
setting	O
the	O
NZVC	O
condition	B-General_Concept
code	I-General_Concept
bits	O
,	O
and	O
the	O
other	O
does	O
not	O
.	O
</s>
<s>
This	O
is	O
so	O
that	O
the	O
compiler	O
has	O
a	O
way	O
to	O
move	O
instructions	O
around	O
when	O
trying	O
to	O
fill	O
delay	B-General_Concept
slots	I-General_Concept
.	O
</s>
<s>
SPARC	B-Architecture
V7	I-Architecture
does	O
not	O
have	O
multiplication	O
or	O
division	O
instructions	O
,	O
but	O
it	O
does	O
have	O
MULSCC	O
,	O
which	O
does	O
one	O
step	O
of	O
a	O
multiplication	O
testing	O
one	O
bit	O
and	O
conditionally	O
adding	O
the	O
multiplicand	O
to	O
the	O
product	O
.	O
</s>
<s>
This	O
was	O
because	O
MULSCC	O
can	O
complete	O
over	O
one	O
clock	O
cycle	O
in	O
keeping	O
with	O
the	O
RISC	B-General_Concept
philosophy	O
.	O
</s>
<s>
The	O
following	O
organizations	O
have	O
licensed	O
the	O
SPARC	B-Architecture
architecture	O
:	O
</s>
<s>
version	O
Year	O
Total	O
threadsThreads	O
per	O
core	O
×	O
number	O
of	O
cores	O
Process	O
(	O
nm	O
)	O
Transistors	O
(	O
millions	O
)	O
Die	O
size	O
(	O
mm2	O
)	O
IO	O
pins	O
Power	O
(	O
W	O
)	O
Voltage	O
(	O
V	O
)	O
L1	O
Dcache	O
(	O
KB	O
)	O
L1	O
Icache	O
(	O
KB	O
)	O
L2	O
cache	O
(	O
KB	O
)	O
L3	O
cache	O
(	O
KB	O
)	O
SPARC	B-Architecture
MB86900Fujitsu14.28	O
–	O
33V719861×1	O
=	O
113000.112560	O
–	O
128	O
(	O
unified	O
)	O
SPARCVariousVarious	O
SPARC	B-Architecture
V7	I-Architecture
implementations	O
were	O
produced	O
by	O
Fujitsu	O
,	O
LSI	O
Logic	O
,	O
Weitek	O
,	O
Texas	O
Instruments	O
,	O
Cypress	O
and	O
Temic	O
.	O
</s>
<s>
A	O
SPARC	B-Architecture
V7	I-Architecture
processor	O
generally	O
consisted	O
of	O
several	O
discrete	O
chips	O
,	O
usually	O
comprising	O
an	O
integer	O
unit	O
(	O
IU	O
)	O
,	O
a	O
floating-point	B-General_Concept
unit	I-General_Concept
(	O
FPU	O
)	O
,	O
a	O
memory	B-General_Concept
management	I-General_Concept
unit	I-General_Concept
(	O
MMU	O
)	O
and	O
cache	O
memory	B-General_Concept
.	O
</s>
<s>
Conversely	O
,	O
the	O
Atmel	O
(	O
now	O
Microchip	O
Technology	O
)	O
TSC695	O
is	O
a	O
single-chip	O
SPARC	B-Architecture
V7	I-Architecture
implementation.14.28	O
–	O
40V71989	O
–	O
19921×1	O
=	O
1800	O
–	O
1300	O
~	O
0.1	O
–	O
1.8160	O
–	O
2560	O
–	O
128	O
(	O
unified	O
)	O
MN10501	O
(	O
KAP	O
)	O
Solbourne	O
Computer	O
,	O
</s>
<s>
@500	O
MHz1.5	O
–	O
1.71616256UltraSPARC	O
IIi	O
(	O
IIe+	O
)	O
(	O
Phantom	O
)	O
Sun	O
SME1532550	O
–	O
650V920001×1	O
=	O
1180	O
Cu37017.61.71616512SPARC64	O
GPFujitsu	O
SFCB81147400	O
–	O
563V920001×1	O
=	O
118030.22171.81281288192SPARC64	O
GP	O
--600	O
–	O
810V91×1	O
=	O
115030.21.51281288192SPARC64	O
IVFujitsu	O
MBCS80523450	O
–	O
810V920001×1	O
=	O
11301281282048UltraSPARC	O
III	O
(	O
Cheetah	O
)	O
Sun	O
SME1050600JPS120011×1	O
=	O
1180	O
Al293301368531.664328192UltraSPARC	O
III	O
(	O
Cheetah	O
)	O
Sun	O
SME1052750	O
–	O
900JPS120011×1	O
=	O
1130	O
Al2913681.664328192UltraSPARC	O
III	O
Cu	O
(	O
Cheetah+	O
)	O
Sun	O
SME1056900	O
–	O
1200JPS120011×1	O
=	O
1130	O
Cu29232136850	O
@1200	O
MHz1.664328192UltraSPARC	O
IIIi	O
(	O
Jalapeño	O
)	O
Sun	O
SME16031064	O
–	O
1593JPS120031×1	O
=	O
113087.5206959521.364321024SPARC64	O
V	O
(	O
Zeus	O
)	O
Fujitsu1100	O
–	O
1350JPS120031×1	O
=	O
1130190289269401.21281282048SPARC64	O
V+	O
(	O
Olympus-B	O
)	O
Fujitsu1650	O
–	O
2160JPS120041×1	O
=	O
1904002972796511281284096UltraSPARC	O
IV	O
(	O
Jaguar	O
)	O
Sun	O
SME11671050	O
–	O
1350JPS220041×2	O
=	O
21306635613681081.35643216384UltraSPARC	O
IV+	O
(	O
Panther	O
)	O
Sun	O
SME1167A1500	O
–	O
2100JPS220051×2	O
=	O
2902953361368901.16464204832768UltraSPARC	O
T1	B-General_Concept
(	O
Niagara	B-General_Concept
)	O
Sun	O
SME19051000	O
–	O
1400UA200520054×8	O
=	O
32903003401933721.38163072SPARC64	O
VI	O
(	O
Olympus-C	O
)	O
Fujitsu2150	O
–	O
2400JPS220072×2	O
=	O
490540422120	O
–	O
1501.1128	O
×2128×24096	O
–	O
6144UltraSPARC	O
T2	B-Device
(	O
Niagara	B-Device
2	I-Device
)	O
Sun	O
SME1908A1000	O
–	O
1600UA200720078×8	O
=	O
64655033421831951.1	O
–	O
1.58164096UltraSPARC	O
T2	B-Device
Plus	O
(	O
Victoria	O
Falls	O
)	O
Sun	O
SME1910A1200	O
–	O
1600UA2007	O
2008	O
8×8	O
=	O
646550334218318164096SPARC64	O
VII	O
(	O
Jupiter	O
)	O
Fujitsu2400	O
–	O
2880JPS220082×4	O
=	O
86560044515064×464×46144UltraSPARC	O
"	O
RK	O
"	O
(	O
Rock	B-Device
)	O
Sun	O
SME18322300	O
??	O
</s>
<s>
?	O
canceled2×16	O
=	O
3265396232632322048SPARC64	O
VIIIfx	O
(	O
Venus	O
)	O
Fujitsu2000JPS2	O
/	O
HPC-ACE20091	O
×8	O
=	O
84576051312715832×832×86144LEON2FTAtmel	O
AT697F100V820091×1	O
=	O
118019611.8/3.31632noneSPARC	O
T3	O
(	O
Rainbow	O
Falls	O
)	O
Oracle/Sun1650UA2007	O
2010	O
8×16	O
=	O
12840	O
???	O
</s>
<s>
SPARC	B-Architecture
machines	O
have	O
generally	O
used	O
Sun	O
's	O
SunOS	B-Operating_System
,	O
Solaris	B-Application
,	O
JavaOS	B-Application
,	O
or	O
OpenSolaris	B-Operating_System
including	O
derivatives	O
illumos	B-Application
and	O
OpenIndiana	B-Application
,	O
but	O
other	O
operating	B-General_Concept
systems	I-General_Concept
have	O
also	O
been	O
used	O
,	O
such	O
as	O
NeXTSTEP	B-Application
,	O
RTEMS	B-Operating_System
,	O
DG/UX	B-Operating_System
,	O
FreeBSD	B-Operating_System
,	O
OpenBSD	B-Operating_System
,	O
NetBSD	B-Device
,	O
and	O
Linux	B-Application
.	O
</s>
<s>
In	O
1993	O
,	O
Intergraph	O
announced	O
a	O
port	O
of	O
Windows	B-Device
NT	I-Device
to	O
the	O
SPARC	B-Architecture
architecture	O
,	O
but	O
it	O
was	O
later	O
cancelled	O
.	O
</s>
<s>
In	O
October	O
2015	O
,	O
Oracle	B-Application
announced	O
a	O
"	O
Linux	B-Application
for	O
SPARC	B-Architecture
reference	O
platform	O
"	O
.	O
</s>
<s>
Several	O
fully	O
open	B-Application
source	I-Application
implementations	O
of	O
the	O
SPARC	B-Architecture
architecture	O
exist	O
:	O
</s>
<s>
LEON	B-General_Concept
,	O
a	O
32-bit	O
radiation-tolerant	O
,	O
SPARC	B-Architecture
V8	I-Architecture
implementation	O
,	O
designed	O
especially	O
for	O
space	O
use	O
.	O
</s>
<s>
Source	O
code	O
is	O
written	O
in	O
VHDL	B-Language
,	O
and	O
licensed	O
under	O
the	O
GPL	B-License
.	O
</s>
<s>
OpenSPARC	B-Device
T1	B-General_Concept
,	O
released	O
in	O
2006	O
,	O
a	O
64-bit	B-Device
,	O
32-thread	O
implementation	O
conforming	O
to	O
the	O
UltraSPARC	B-General_Concept
Architecture	O
2005	O
and	O
to	O
SPARC	B-Architecture
Version	O
9	O
(	O
Level	O
1	O
)	O
.	O
</s>
<s>
Source	O
code	O
is	O
written	O
in	O
Verilog	B-Language
,	O
and	O
licensed	O
under	O
many	O
licenses	O
.	O
</s>
<s>
Most	O
OpenSPARC	B-Device
T1	B-General_Concept
source	O
code	O
is	O
licensed	O
under	O
the	O
GPL	B-License
.	O
</s>
<s>
Source	O
based	O
on	O
existent	O
open	B-Application
source	I-Application
projects	O
will	O
continue	O
to	O
be	O
licensed	O
under	O
their	O
current	O
licenses	O
.	O
</s>
<s>
S1	B-General_Concept
,	O
a	O
64-bit	B-Device
Wishbone	O
compliant	O
CPU	O
core	O
based	O
on	O
the	O
OpenSPARC	B-Device
T1	B-General_Concept
design	O
.	O
</s>
<s>
It	O
is	O
a	O
single	O
UltraSPARC	B-General_Concept
V9	O
core	O
capable	O
of	O
4-way	O
SMT	O
.	O
</s>
<s>
Like	O
the	O
T1	B-General_Concept
,	O
the	O
source	O
code	O
is	O
licensed	O
under	O
the	O
GPL	B-License
.	O
</s>
<s>
OpenSPARC	B-Device
T2	B-Device
,	O
released	O
in	O
2008	O
,	O
a	O
64-bit	B-Device
,	O
64-thread	O
implementation	O
conforming	O
to	O
the	O
UltraSPARC	B-General_Concept
Architecture	O
2007	O
and	O
to	O
SPARC	B-Architecture
Version	O
9	O
(	O
Level	O
1	O
)	O
.	O
</s>
<s>
Source	O
code	O
is	O
written	O
in	O
Verilog	B-Language
,	O
and	O
licensed	O
under	O
many	O
licenses	O
.	O
</s>
<s>
Most	O
OpenSPARC	B-Device
T2	B-Device
source	O
code	O
is	O
licensed	O
under	O
the	O
GPL	B-License
.	O
</s>
<s>
Source	O
based	O
on	O
existing	O
open	B-Application
source	I-Application
projects	O
will	O
continue	O
to	O
be	O
licensed	O
under	O
their	O
current	O
licenses	O
.	O
</s>
<s>
A	O
fully	O
open	B-Application
source	I-Application
simulator	O
for	O
the	O
SPARC	B-Architecture
architecture	O
also	O
exists	O
:	O
</s>
<s>
,	O
a	O
32-bit	O
,	O
64-thread	O
SPARC	B-Architecture
Version	O
8	O
implementation	O
,	O
designed	O
for	O
FPGA-based	O
architecture	O
simulation	O
.	O
</s>
<s>
RAMP	O
Gold	O
is	O
written	O
in	O
~	O
36,000	O
lines	O
of	O
SystemVerilog	B-Language
,	O
and	O
licensed	O
under	O
the	O
BSD	B-Operating_System
licenses	I-Operating_System
.	O
</s>
<s>
For	O
HPC	O
loads	O
Fujitsu	O
builds	O
specialized	O
SPARC64	B-General_Concept
fx	O
processors	O
with	O
a	O
new	O
instruction	O
extensions	O
set	O
,	O
called	O
HPC-ACE	O
(	O
High	O
Performance	O
Computing	O
–	O
Arithmetic	O
Computational	O
Extensions	O
)	O
.	O
</s>
<s>
Fujitsu	O
's	O
K	B-Device
computer	I-Device
ranked	O
in	O
the	O
TOP500	B-Operating_System
June	O
2011	O
and	O
November	O
2011	O
lists	O
.	O
</s>
<s>
It	O
combines	O
88,128	O
SPARC64	B-General_Concept
VIIIfx	I-General_Concept
CPUs	O
,	O
each	O
with	O
eight	O
cores	O
,	O
for	O
a	O
total	O
of	O
705,024	O
cores	O
—	O
almost	O
twice	O
as	O
many	O
as	O
any	O
other	O
system	O
in	O
the	O
TOP500	B-Operating_System
at	O
that	O
time	O
.	O
</s>
<s>
The	O
K	B-Device
Computer	I-Device
was	O
more	O
powerful	O
than	O
the	O
next	O
five	O
systems	O
on	O
the	O
list	O
combined	O
,	O
and	O
had	O
the	O
highest	O
performance-to-power	O
ratio	O
of	O
any	O
supercomputer	O
system	O
.	O
</s>
<s>
It	O
also	O
ranked	O
in	O
the	O
Green500	B-Application
June	O
2011	O
list	O
,	O
with	O
a	O
score	O
of	O
824.56	O
MFLOPS/W	O
.	O
</s>
<s>
In	O
the	O
November	O
2012	O
release	O
of	O
TOP500	B-Operating_System
,	O
the	O
K	B-Device
computer	I-Device
ranked	O
,	O
using	O
by	O
far	O
the	O
most	O
power	O
of	O
the	O
top	O
three	O
.	O
</s>
<s>
It	O
ranked	O
on	O
the	O
corresponding	O
Green500	B-Application
release	O
.	O
</s>
<s>
Tianhe-2	B-Device
(	O
TOP500	B-Operating_System
as	O
of	O
November	O
2014	O
)	O
has	O
a	O
number	O
of	O
nodes	O
with	O
Galaxy	B-Device
FT-1500	I-Device
OpenSPARC-based	O
processors	O
developed	O
in	O
China	O
.	O
</s>
<s>
However	O
,	O
those	O
processors	O
did	O
not	O
contribute	O
to	O
the	O
LINPACK	B-Application
score	O
.	O
</s>
