<s>
The	O
Challenge	O
,	O
code-named	O
Eveready	O
(	O
deskside	O
models	O
)	O
and	O
Terminator	O
(	O
rackmount	O
models	O
)	O
,	O
is	O
a	O
family	O
of	O
server	B-Application
computers	I-Application
and	O
supercomputers	B-Architecture
developed	O
and	O
manufactured	O
by	O
Silicon	O
Graphics	O
in	O
the	O
early	O
to	O
mid-1990s	O
that	O
succeeded	O
the	O
earlier	O
Power	O
Series	O
systems	O
(	O
not	O
to	O
be	O
confused	O
with	O
IBM	B-Device
Power	I-Device
Systems	I-Device
)	O
.	O
</s>
<s>
The	O
Challenge	O
was	O
later	O
succeeded	O
by	O
the	O
NUMAlink-based	O
Origin	B-Application
200	I-Application
and	O
Origin	B-Application
2000	I-Application
in	O
1996	O
.	O
</s>
<s>
The	O
first	O
model	O
,	O
simply	O
known	O
as	O
the	O
"	O
Challenge	O
"	O
used	O
the	O
64-bit	O
R4400	B-General_Concept
.	O
</s>
<s>
With	O
the	O
introduction	O
of	O
the	O
R8000	B-General_Concept
,	O
the	O
Challenge	O
was	O
upgraded	O
to	O
support	O
more	O
processors	O
and	O
memory	O
as	O
well	O
as	O
featuring	O
support	O
for	O
this	O
new	O
processor	O
.	O
</s>
<s>
During	O
the	O
final	O
years	O
of	O
the	O
Challenge	O
architecture	O
's	O
useful	O
life	O
,	O
the	O
line	O
was	O
upgraded	O
to	O
support	O
R10000	B-General_Concept
microprocessors	O
.	O
</s>
<s>
Older	O
Challenge	O
systems	O
using	O
the	O
R10000	B-General_Concept
were	O
known	O
as	O
the	O
"	O
Challenge	O
10000	O
"	O
,	O
while	O
the	O
newer	O
POWER	O
Challenge	O
systems	O
using	O
the	O
R10000	B-General_Concept
were	O
known	O
as	O
the	O
"	O
POWER	O
Challenge	O
10000	O
"	O
.	O
</s>
<s>
Standard	O
models	O
were	O
either	O
servers	O
or	O
supercomputers	B-Architecture
with	O
no	O
graphics	O
support	O
.	O
</s>
<s>
The	O
POWER	O
Challenge	O
was	O
announced	O
on	O
28	O
January	O
1993	O
and	O
was	O
intended	O
to	O
compete	O
against	O
supercomputer	B-Architecture
companies	O
such	O
as	O
Cray	O
Research	O
.	O
</s>
<s>
At	O
the	O
time	O
of	O
its	O
announcement	O
,	O
Silicon	O
Graphics	O
claimed	O
that	O
the	O
POWER	O
Challenge	O
would	O
have	O
the	O
same	O
level	O
of	O
performance	O
as	O
Cray	O
's	O
Cray	B-Device
Y-MP	I-Device
with	O
a	O
single	O
microprocessor	O
.	O
</s>
<s>
The	O
new	O
model	O
was	O
introduced	O
in	O
the	O
middle	O
of	O
1994	O
and	O
used	O
the	O
MIPS	O
R8000	B-General_Concept
microprocessor	O
chip	O
set	O
,	O
which	O
consisted	O
of	O
the	O
R8000	B-General_Concept
microprocessor	O
and	O
R8010	O
floating	B-General_Concept
point	I-General_Concept
unit	I-General_Concept
accompanied	O
by	O
a	O
"	O
streaming	O
"	O
cache	O
and	O
its	O
associated	O
controllers	O
.	O
</s>
<s>
Much	O
of	O
the	O
POWER	O
Challenge	O
's	O
performance	O
depended	O
on	O
the	O
R8000	B-General_Concept
,	O
a	O
microprocessor	O
intended	O
to	O
achieve	O
supercomputing	B-Architecture
performance	O
and	O
designed	O
for	O
floating-point	B-Algorithm
scientific	O
applications	O
.	O
</s>
<s>
As	O
a	O
result	O
,	O
the	O
R8000	B-General_Concept
had	O
features	O
such	O
as	O
fused	O
multiply	O
–	O
add	O
instructions	O
and	O
a	O
large	O
cache	O
.	O
</s>
<s>
In	O
1995	O
,	O
Silicon	O
Graphics	O
upgraded	O
the	O
POWER	O
Challenge	O
with	O
R8000	B-General_Concept
microprocessors	O
clocked	O
at	O
90MHz	O
,	O
enabling	O
the	O
system	O
to	O
scale	O
up	O
to	O
6.48	O
GFLOPS	O
,	O
an	O
improvement	O
of	O
1	O
GFLOPS	O
over	O
the	O
previous	O
R8000	B-General_Concept
microprocessor	O
clocked	O
at	O
75MHz	O
.	O
</s>
<s>
The	O
POWER	O
Challenge	O
10000	O
referred	O
to	O
POWER	O
Challenge-based	O
systems	O
that	O
used	O
the	O
R10000	B-General_Concept
microprocessor	O
.	O
</s>
<s>
These	O
models	O
were	O
introduced	O
in	O
January	O
1996	O
,	O
succeeding	O
the	O
R4400-based	O
Challenge	O
and	O
the	O
R8000-based	O
POWER	O
Challenge	O
,	O
although	O
such	O
systems	O
co-existed	O
with	O
the	O
POWER	O
Challenge	O
10000	O
for	O
some	O
time	O
.	O
</s>
<s>
To	O
support	O
the	O
new	O
R10000s	B-General_Concept
,	O
a	O
new	O
CPU	O
board	O
,	O
the	O
"	O
IP25	O
"	O
was	O
introduced	O
.	O
</s>
<s>
The	O
CHALLENGEarray	O
and	O
POWER	O
CHALLENGEarray	O
is	O
a	O
cluster	B-Architecture
of	O
Challenge	O
or	O
POWER	O
Challenge	O
servers	O
respectively	O
.	O
</s>
<s>
The	O
CHALLENGEarray	O
supports	O
2	O
to	O
288	O
R10000	B-General_Concept
processors	O
while	O
the	O
POWER	O
CHALLENGEarray	O
supports	O
2	O
to	O
144	O
R8000	B-General_Concept
processors	O
and	O
up	O
to	O
128GB	O
of	O
memory	O
.	O
</s>
<s>
Other	O
systems	O
from	O
Silicon	O
Graphics	O
that	O
used	O
the	O
"	O
Challenge	O
"	O
brand	O
were	O
the	O
Challenge	O
M	O
and	O
the	O
Challenge	O
S	O
.	O
These	O
systems	O
were	O
repackaged	O
Silicon	B-Application
Graphics	I-Application
Indigo2	I-Application
and	O
Indy	B-Operating_System
workstations	B-Device
that	O
were	O
not	O
configured	O
with	O
the	O
graphics	O
hardware	O
that	O
made	O
them	O
useful	O
as	O
workstations	B-Device
.	O
</s>
<s>
These	O
systems	O
were	O
Challenges	O
in	O
name	O
only	O
and	O
have	O
no	O
architectural	O
similarity	O
with	O
the	O
multiprocessing	B-Operating_System
Challenges	O
,	O
although	O
they	O
had	O
cases	O
with	O
the	O
same	O
blue	O
hue	O
as	O
proper	O
Challenges	O
.	O
</s>
<s>
The	O
Challenge	O
is	O
a	O
shared-memory	B-Operating_System
multiprocessor	I-Operating_System
computer	O
.	O
</s>
<s>
The	O
midplane	O
also	O
contains	O
five	O
VME	B-Architecture
expansion	O
slots	O
.	O
</s>
<s>
The	O
midplane	O
also	O
contains	O
six	O
VME	B-Architecture
expansion	O
slots	O
and	O
three	O
power	O
board	O
slots	O
.	O
</s>
<s>
The	O
IP19	O
can	O
be	O
configured	O
with	O
two	O
or	O
four	O
R4400	B-General_Concept
microprocessors	O
.	O
</s>
<s>
The	O
IP21	O
supports	O
the	O
R8000	B-General_Concept
microprocessor	O
and	O
can	O
be	O
configured	O
with	O
one	O
or	O
two	O
such	O
microprocessors	O
.	O
</s>
<s>
The	O
IP25	O
supports	O
one	O
,	O
two	O
,	O
or	O
four	O
R10000	B-General_Concept
microprocessors	O
.	O
</s>
<s>
Memory	O
is	O
provided	O
by	O
the	O
MC3	O
memory	O
board	O
,	O
which	O
contains	O
thirty-two	O
single	B-General_Concept
in-line	I-General_Concept
memory	I-General_Concept
module	I-General_Concept
(	O
SIMM	B-General_Concept
)	O
slots	O
and	O
two	O
leaf	O
controllers	O
.	O
</s>
<s>
Fast	O
page	O
mode	O
(	O
FPM	O
)	O
error	O
correcting	O
code	O
(	O
ECC	O
)	O
SIMMs	B-General_Concept
with	O
capacities	O
of	O
16MB	O
(	O
known	O
as	O
the	O
"	O
high-density	O
"	O
SIMM	B-General_Concept
)	O
and	O
64MB	O
(	O
known	O
as	O
the	O
"	O
super-density	O
"	O
SIMM	B-General_Concept
)	O
are	O
supported	O
,	O
enables	O
the	O
board	O
to	O
provide	O
64MB	O
to	O
2GB	O
of	O
memory	O
.	O
</s>
<s>
The	O
SIMMs	B-General_Concept
are	O
installed	O
in	O
groups	O
of	O
four	O
.	O
</s>
<s>
The	O
memory	O
can	O
be	O
interleaved	B-General_Concept
if	O
there	O
are	O
two	O
or	O
more	O
leaves	O
present	O
in	O
the	O
system	O
.	O
</s>
<s>
The	O
SIMMs	B-General_Concept
are	O
protected	O
by	O
ECC	O
,	O
and	O
the	O
ECC	O
implementation	O
can	O
correct	O
single-bit	O
errors	O
and	O
detect	O
double-bit	O
errors	O
.	O
</s>
<s>
The	O
SIMMs	B-General_Concept
also	O
contain	O
built-in	O
self-test	O
circuitry	O
,	O
which	O
tests	O
the	O
SIMM	B-General_Concept
during	O
power	O
on	O
or	O
reset	O
and	O
alerts	O
the	O
firmware	O
,	O
which	O
disables	O
the	O
bank(s )	O
of	O
memory	O
containing	O
faulty	O
SIMM(s )	O
,	O
if	O
faults	O
are	O
detected	O
.	O
</s>
