<s>
Roadrunner	B-General_Concept
was	O
a	O
supercomputer	B-Architecture
built	O
by	O
IBM	O
for	O
the	O
Los	O
Alamos	O
National	O
Laboratory	O
in	O
New	O
Mexico	O
,	O
USA	O
.	O
</s>
<s>
The	O
US$	O
100-million	O
Roadrunner	B-General_Concept
was	O
designed	O
for	O
a	O
peak	O
performance	O
of	O
1.7	O
petaflops	O
.	O
</s>
<s>
It	O
achieved	O
1.026	O
petaflops	O
on	O
May	O
25	O
,	O
2008	O
,	O
to	O
become	O
the	O
world	O
's	O
first	O
TOP500	B-Operating_System
LINPACK	B-Device
sustained	O
1.0	O
petaflops	O
system	O
.	O
</s>
<s>
In	O
November	O
2008	O
,	O
it	O
reached	O
a	O
top	O
performance	O
of	O
1.456	O
petaFLOPS	O
,	O
retaining	O
its	O
top	O
spot	O
in	O
the	O
TOP500	B-Operating_System
list	O
.	O
</s>
<s>
It	O
was	O
also	O
the	O
fourth-most	O
energy-efficient	O
supercomputer	B-Architecture
in	O
the	O
world	O
on	O
the	O
Supermicro	O
Green500	O
list	O
,	O
with	O
an	O
operational	O
rate	O
of	O
444.94	O
megaflops	O
per	O
watt	O
of	O
power	O
used	O
.	O
</s>
<s>
The	O
hybrid	O
Roadrunner	B-General_Concept
design	O
was	O
then	O
reused	O
for	O
several	O
other	O
energy	O
efficient	O
supercomputers	B-Architecture
.	O
</s>
<s>
Roadrunner	B-General_Concept
was	O
decommissioned	O
by	O
Los	O
Alamos	O
on	O
March	O
31	O
,	O
2013	O
.	O
</s>
<s>
In	O
its	O
place	O
,	O
Los	O
Alamos	O
commissioned	O
a	O
supercomputer	B-Architecture
called	O
Cielo	B-Device
,	O
which	O
was	O
installed	O
in	O
2010	O
.	O
</s>
<s>
It	O
was	O
a	O
hybrid	O
design	O
with	O
12,960	O
IBM	O
PowerXCell	B-General_Concept
8i	I-General_Concept
and	O
6,480	O
AMD	B-General_Concept
Opteron	I-General_Concept
dual-core	B-Architecture
processors	I-Architecture
in	O
specially	O
designed	O
blade	B-Architecture
servers	I-Architecture
connected	O
by	O
InfiniBand	B-Architecture
.	O
</s>
<s>
The	O
Roadrunner	B-General_Concept
used	O
Red	O
Hat	O
Enterprise	O
Linux	O
along	O
with	O
Fedora	O
as	O
its	O
operating	O
systems	O
,	O
and	O
was	O
managed	O
with	O
xCAT	B-Operating_System
distributed	O
computing	O
software	O
.	O
</s>
<s>
It	O
also	O
used	O
the	O
Open	B-Library
MPI	I-Library
Message	B-Application
Passing	I-Application
Interface	I-Application
implementation	O
.	O
</s>
<s>
Roadrunner	B-General_Concept
occupied	O
approximately	O
296	O
server	O
racks	O
which	O
covered	O
and	O
became	O
operational	O
in	O
2008	O
.	O
</s>
<s>
Other	O
uses	O
for	O
the	O
Roadrunner	B-General_Concept
included	O
the	O
science	O
,	O
financial	O
,	O
automotive	O
,	O
and	O
aerospace	O
industries	O
.	O
</s>
<s>
Roadrunner	B-General_Concept
differed	O
from	O
other	O
contemporary	O
supercomputers	B-Architecture
because	O
it	O
continued	O
the	O
hybrid	O
approach	O
to	O
supercomputer	B-Architecture
design	O
introduced	O
by	O
Seymour	O
Cray	O
in	O
1964	O
with	O
the	O
Control	O
Data	O
Corporation	O
CDC	B-Device
6600	I-Device
and	O
continued	O
with	O
the	O
order	O
of	O
magnitude	O
faster	O
CDC	B-Device
7600	I-Device
in	O
1969	O
.	O
</s>
<s>
However	O
,	O
in	O
this	O
architecture	B-General_Concept
the	O
peripheral	O
processors	O
were	O
used	O
only	O
for	O
operating	O
system	O
functions	O
and	O
all	O
applications	O
ran	O
in	O
the	O
one	O
central	O
processor	O
.	O
</s>
<s>
Most	O
previous	O
supercomputers	B-Architecture
had	O
only	O
used	O
one	O
processor	O
architecture	B-General_Concept
,	O
since	O
it	O
was	O
thought	O
to	O
be	O
easier	O
to	O
design	O
and	O
program	O
for	O
.	O
</s>
<s>
To	O
realize	O
the	O
full	O
potential	O
of	O
Roadrunner	B-General_Concept
,	O
all	O
software	O
had	O
to	O
be	O
written	O
specially	O
for	O
this	O
hybrid	O
architecture	B-General_Concept
.	O
</s>
<s>
The	O
hybrid	O
design	O
consisted	O
of	O
dual-core	B-Architecture
Opteron	B-General_Concept
server	O
processors	O
manufactured	O
by	O
AMD	O
using	O
the	O
standard	O
AMD64	B-Device
architecture	B-General_Concept
.	O
</s>
<s>
Attached	O
to	O
each	O
Opteron	B-General_Concept
core	O
is	O
an	O
IBM-designed	O
and	O
-fabricated	O
PowerXCell	B-General_Concept
8i	I-General_Concept
processor	O
.	O
</s>
<s>
As	O
a	O
supercomputer	B-Architecture
,	O
the	O
Roadrunner	B-General_Concept
was	O
considered	O
an	O
Opteron	B-General_Concept
cluster	B-Architecture
with	O
Cell	B-General_Concept
accelerators	O
,	O
as	O
each	O
node	O
consists	O
of	O
a	O
Cell	B-General_Concept
attached	O
to	O
an	O
Opteron	B-General_Concept
core	O
and	O
the	O
Opterons	B-General_Concept
to	O
each	O
other	O
.	O
</s>
<s>
Roadrunner	B-General_Concept
was	O
in	O
development	O
from	O
2002	O
and	O
went	O
online	O
in	O
2006	O
.	O
</s>
<s>
This	O
machine	O
was	O
one	O
of	O
the	O
earliest	O
hybrid	O
architecture	B-General_Concept
systems	O
originally	O
based	O
on	O
ARM	O
and	O
then	O
moved	O
to	O
the	O
Cell	B-General_Concept
processor	O
.	O
</s>
<s>
The	O
first	O
phase	O
of	O
the	O
Roadrunner	B-General_Concept
was	O
building	O
a	O
standard	O
Opteron	B-General_Concept
based	O
cluster	B-Architecture
,	O
while	O
evaluating	O
the	O
feasibility	O
to	O
further	O
construct	O
and	O
program	O
the	O
future	O
hybrid	O
version	O
.	O
</s>
<s>
This	O
Phase	O
1	O
Roadrunner	B-General_Concept
reached	O
71	O
teraflops	O
and	O
was	O
in	O
full	O
operation	O
at	O
Los	O
Alamos	O
National	O
Laboratory	O
in	O
2006	O
.	O
</s>
<s>
Phase	O
2	O
known	O
as	O
AAIS	O
(	O
Advanced	O
Architecture	B-General_Concept
Initial	O
System	O
)	O
included	O
building	O
a	O
small	O
hybrid	O
version	O
of	O
the	O
finished	O
system	O
using	O
an	O
older	O
version	O
of	O
the	O
Cell	B-General_Concept
processor	O
.	O
</s>
<s>
This	O
phase	O
was	O
used	O
to	O
build	O
prototype	O
applications	O
for	O
the	O
hybrid	O
architecture	B-General_Concept
.	O
</s>
<s>
Additional	O
Opteron	B-General_Concept
nodes	O
and	O
new	O
PowerXCell	O
processors	O
were	O
added	O
to	O
the	O
design	O
.	O
</s>
<s>
These	O
PowerXCell	O
processors	O
are	O
five	O
times	O
as	O
powerful	O
as	O
the	O
Cell	B-General_Concept
processors	O
used	O
in	O
Phase	O
2	O
.	O
</s>
<s>
Roadrunner	B-General_Concept
used	O
two	O
different	O
models	O
of	O
processors	O
.	O
</s>
<s>
The	O
first	O
is	O
the	O
AMD	B-General_Concept
Opteron	I-General_Concept
2210	O
,	O
running	O
at	O
1.8GHz	O
.	O
</s>
<s>
Opterons	B-General_Concept
are	O
used	O
both	O
in	O
the	O
computational	O
nodes	O
feeding	O
the	O
Cells	O
with	O
useful	O
data	O
and	O
in	O
the	O
system	O
operations	O
and	O
communication	O
nodes	O
passing	O
data	O
between	O
computing	O
nodes	O
and	O
helping	O
the	O
operators	O
running	O
the	O
system	O
.	O
</s>
<s>
Roadrunner	B-General_Concept
has	O
a	O
total	O
of	O
6,912	O
Opteron	B-General_Concept
processors	O
with	O
6,480	O
used	O
for	O
computation	O
and	O
432	O
for	O
operation	O
.	O
</s>
<s>
The	O
Opterons	B-General_Concept
are	O
connected	O
together	O
by	O
HyperTransport	B-Device
links	O
.	O
</s>
<s>
Each	O
Opteron	B-General_Concept
has	O
two	O
cores	O
for	O
a	O
total	O
13,824	O
cores	O
.	O
</s>
<s>
The	O
second	O
processor	O
is	O
the	O
IBM	O
PowerXCell	B-General_Concept
8i	I-General_Concept
,	O
running	O
at	O
3.2GHz	O
.	O
</s>
<s>
These	O
processors	O
have	O
one	O
general	O
purpose	O
core	O
(	O
PPE	O
)	O
,	O
and	O
eight	O
special	O
performance	O
cores	O
(	O
SPE	O
)	O
for	O
floating	B-Algorithm
point	I-Algorithm
operations	O
.	O
</s>
<s>
Roadrunner	B-General_Concept
has	O
a	O
total	O
of	O
12,960	O
PowerXCell	O
processors	O
,	O
with	O
12,960	O
PPE	O
cores	O
and	O
103,680	O
SPE	O
cores	O
,	O
for	O
a	O
total	O
of	O
116,640	O
cores	O
.	O
</s>
<s>
Logically	O
,	O
a	O
TriBlade	O
consists	O
of	O
two	O
dual-core	B-Architecture
Opterons	B-General_Concept
with	O
16	O
GB	O
RAM	B-Architecture
and	O
four	O
PowerXCell	B-General_Concept
8i	I-General_Concept
CPUs	O
with	O
16	O
GB	O
Cell	B-General_Concept
RAM	B-Architecture
.	O
</s>
<s>
Physically	O
,	O
a	O
TriBlade	O
consists	O
of	O
one	O
LS21	O
Opteron	B-General_Concept
blade	B-Architecture
,	O
an	O
expansion	O
blade	B-Architecture
,	O
and	O
two	O
QS22	O
Cell	B-General_Concept
blades	O
.	O
</s>
<s>
The	O
LS21	O
has	O
two	O
1.8GHz	O
dual-core	B-Architecture
Opterons	B-General_Concept
with	O
16	O
GB	O
memory	O
for	O
the	O
whole	O
blade	B-Architecture
,	O
providing	O
8GB	O
for	O
each	O
CPU	O
.	O
</s>
<s>
Each	O
QS22	O
has	O
two	O
PowerXCell	B-General_Concept
8i	I-General_Concept
CPUs	O
,	O
running	O
at	O
3.2GHz	O
and	O
8	O
GB	O
memory	O
,	O
which	O
makes	O
4	O
GB	O
for	O
each	O
CPU	O
.	O
</s>
<s>
The	O
expansion	O
blade	B-Architecture
connects	O
the	O
two	O
QS22	O
via	O
four	O
PCIe	O
x8	O
links	O
to	O
the	O
LS21	O
,	O
two	O
links	O
for	O
each	O
QS22	O
.	O
</s>
<s>
It	O
also	O
provides	O
outside	O
connectivity	O
via	O
an	O
InfiniBand	B-Architecture
4x	O
DDR	O
adapter	O
.	O
</s>
<s>
The	O
expansion	O
blade	B-Architecture
is	O
connected	O
to	O
the	O
Opteron	B-General_Concept
blade	B-Architecture
via	O
HyperTransport	B-Device
.	O
</s>
<s>
All	O
TriBlades	O
are	O
connected	O
to	O
a	O
288-port	O
Voltaire	O
ISR2012	O
Infiniband	B-Architecture
switch	O
.	O
</s>
<s>
Each	O
CU	O
also	O
has	O
access	O
to	O
the	O
Panasas	O
file	B-Application
system	I-Application
through	O
twelve	O
System	B-Operating_System
x3755	I-Operating_System
servers	O
.	O
</s>
<s>
360	O
dual-core	B-Architecture
Opterons	B-General_Concept
with	O
2.88	O
TiB	O
RAM	B-Architecture
.	O
</s>
<s>
720	O
PowerXCell	B-General_Concept
8i	I-General_Concept
cores	O
with	O
2.88	O
TiB	O
RAM	B-Architecture
.	O
</s>
<s>
12	O
System	B-Operating_System
x3755	I-Operating_System
with	O
dual	O
10-GBit	O
Ethernet	O
each	O
.	O
</s>
<s>
288-port	O
Voltaire	O
ISR2012	O
switch	O
with	O
192	O
Infiniband	B-Architecture
4x	O
DDR	O
links	O
(	O
180	O
TriBlades	O
and	O
twelve	O
I/O	O
nodes	O
)	O
.	O
</s>
<s>
The	O
final	O
cluster	B-Architecture
is	O
made	O
up	O
of	O
18	O
connected	O
units	O
,	O
which	O
are	O
connected	O
via	O
eight	O
additional	O
(	O
second-stage	O
)	O
Infiniband	B-Architecture
ISR2012	O
switches	O
.	O
</s>
<s>
IBM	B-General_Concept
Roadrunner	I-General_Concept
was	O
shut	O
down	O
on	O
March	O
31	O
,	O
2013	O
.	O
</s>
<s>
While	O
the	O
supercomputer	B-Architecture
was	O
one	O
of	O
the	O
fastest	O
in	O
the	O
world	O
,	O
its	O
energy	O
efficiency	O
was	O
relatively	O
low	O
.	O
</s>
<s>
Roadrunner	B-General_Concept
delivered	O
444	O
megaflops	O
per	O
watt	O
vs	O
the	O
886	O
megaflops	O
per	O
watt	O
of	O
a	O
comparable	O
supercomputer	B-Architecture
.	O
</s>
<s>
Before	O
the	O
supercomputer	B-Architecture
is	O
dismantled	O
,	O
researchers	O
will	O
spend	O
one	O
month	O
performing	O
memory	O
and	O
data	O
routing	O
experiments	O
that	O
will	O
aid	O
in	O
designing	O
future	O
supercomputers	B-Architecture
.	O
</s>
<s>
After	O
IBM	B-General_Concept
Roadrunner	I-General_Concept
is	O
dismantled	O
,	O
the	O
electronics	O
will	O
be	O
shredded	O
.	O
</s>
<s>
Los	O
Alamos	O
will	O
perform	O
the	O
majority	O
of	O
the	O
supercomputer	B-Architecture
's	O
destruction	O
,	O
citing	O
the	O
classified	O
nature	O
of	O
its	O
calculations	O
.	O
</s>
