<s>
Reflected-wave	B-Architecture
switching	I-Architecture
is	O
a	O
signalling	O
technique	O
used	O
in	O
backplane	B-Architecture
computer	B-General_Concept
buses	I-General_Concept
such	O
as	O
PCI	B-Protocol
.	O
</s>
<s>
A	O
backplane	B-Architecture
computer	B-General_Concept
bus	I-General_Concept
is	O
a	O
type	O
of	O
multilayer	O
printed	O
circuit	O
board	O
that	O
has	O
at	O
least	O
one	O
(	O
almost	O
)	O
solid	O
layer	O
of	O
copper	O
called	O
the	O
ground	O
plane	O
,	O
and	O
at	O
least	O
one	O
layer	O
of	O
copper	O
tracks	O
that	O
are	O
used	O
as	O
wires	O
for	O
the	O
signals	O
.	O
</s>
<s>
Most	O
computer	B-General_Concept
buses	I-General_Concept
use	O
binary	O
digital	O
signals	O
,	O
which	O
are	O
sequences	O
of	O
pulses	O
of	O
fixed	O
amplitude	O
.	O
</s>
<s>
The	O
impedance	O
of	O
the	O
microstrip	O
is	O
its	O
characteristic	O
impedance	O
,	O
which	O
depends	O
on	O
its	O
dimensions	O
and	O
on	O
the	O
materials	O
used	O
in	O
the	O
backplane	B-Architecture
's	O
construction	O
.	O
</s>
<s>
This	O
is	O
the	O
system	O
used	O
in	O
most	O
computer	B-General_Concept
buses	I-General_Concept
predating	O
PCI	B-Protocol
,	O
such	O
as	O
the	O
VME	B-Architecture
bus	I-Architecture
.	O
</s>
<s>
This	O
is	O
what	O
happens	O
in	O
a	O
reflected-wave	B-Architecture
switching	I-Architecture
bus	O
.	O
</s>
<s>
However	O
,	O
incident-wave	O
switching	O
buses	O
can	O
be	O
significantly	O
longer	O
than	O
reflected-wave	B-Architecture
switching	I-Architecture
buses	O
operating	O
at	O
the	O
same	O
frequency	O
.	O
</s>
<s>
If	O
the	O
limited	O
bus	O
length	O
is	O
acceptable	O
,	O
a	O
reflected-wave	B-Architecture
switching	I-Architecture
bus	O
will	O
use	O
less	O
power	O
,	O
and	O
fewer	O
components	O
to	O
operate	O
at	O
a	O
given	O
frequency	O
.	O
</s>
<s>
The	O
bus	O
has	O
to	O
be	O
short	O
enough	O
,	O
such	O
that	O
a	O
pulse	O
may	O
travel	O
twice	O
the	O
length	O
of	O
the	O
backplane	B-Architecture
(	O
one	O
complete	O
journey	O
for	O
the	O
incident	O
wave	O
,	O
and	O
another	O
for	O
the	O
reflected	O
wave	O
)	O
,	O
and	O
stabilize	O
sufficiently	O
to	O
be	O
read	O
in	O
a	O
single	O
bus	O
cycle	O
.	O
</s>
