<s>
RapidCAD	B-Device
is	O
a	O
specially	O
packaged	O
Intel	B-General_Concept
486DX	I-General_Concept
and	O
a	O
dummy	O
floating	B-General_Concept
point	I-General_Concept
unit	I-General_Concept
(	O
FPU	O
)	O
designed	O
as	O
pin-compatible	O
replacements	O
for	O
an	O
Intel	B-General_Concept
80386	I-General_Concept
processor	O
and	O
80387	O
FPU	O
.	O
</s>
<s>
Because	O
the	O
i486DX	B-General_Concept
has	O
a	O
working	O
on-chip	O
FPU	O
,	O
a	O
dummy	O
FPU	O
package	O
is	O
supplied	O
to	O
go	O
in	O
the	O
Intel	O
387	O
FPU	O
socket	O
.	O
</s>
<s>
Despite	O
being	O
able	O
to	O
execute	O
instructions	O
in	O
the	O
same	O
number	O
of	O
cycles	O
as	O
an	O
i486DX	B-General_Concept
,	O
integer	O
performance	O
on	O
RapidCAD	B-Device
suffers	O
due	O
to	O
the	O
absence	O
of	O
level	O
1	O
cache	O
and	O
the	O
bottleneck	O
of	O
the	O
386	B-General_Concept
bus	O
.	O
</s>
<s>
RapidCAD	B-Device
offers	O
minimal	O
improvement	O
in	O
integer	O
performance	O
over	O
a	O
386DX	B-General_Concept
(	O
typically	O
10%	O
,	O
at	O
most	O
35%	O
)	O
,	O
but	O
provides	O
substantial	O
improvement	O
in	O
floating	O
point	O
operations	O
(	O
up	O
to	O
80%	O
faster	O
)	O
for	O
which	O
it	O
was	O
marketed	O
.	O
</s>
