<s>
Random	B-General_Concept
logic	I-General_Concept
is	O
a	O
semiconductor	O
circuit	O
design	O
technique	O
that	O
translates	O
high-level	O
logic	O
descriptions	O
directly	O
into	O
hardware	O
features	O
such	O
as	O
AND	O
and	O
OR	O
gates	O
.	O
</s>
<s>
In	O
VLSI	O
chips	O
,	O
random	B-General_Concept
logic	I-General_Concept
is	O
often	O
implemented	O
with	O
standard	O
cells	O
and	O
gate	O
arrays	O
.	O
</s>
<s>
Random	B-General_Concept
logic	I-General_Concept
accounts	O
for	O
a	O
large	O
part	O
of	O
the	O
circuit	O
design	O
in	O
modern	O
microprocessors	B-Architecture
.	O
</s>
<s>
Compared	O
to	O
microcode	B-Device
,	O
another	O
popular	O
design	O
technique	O
,	O
random	B-General_Concept
logic	I-General_Concept
offers	O
faster	O
execution	O
of	O
processor	B-Language
opcodes	I-Language
,	O
provided	O
that	O
processor	O
speeds	O
are	O
faster	O
than	O
memory	O
speeds	O
.	O
</s>
<s>
A	O
disadvantage	O
is	O
that	O
it	O
is	O
difficult	O
to	O
design	O
random	B-General_Concept
logic	I-General_Concept
circuitry	O
for	O
processors	O
with	O
large	O
and	O
complex	O
instruction	O
sets	O
.	O
</s>
