<s>
The	O
RH-32	B-General_Concept
was	O
a	O
radiation-hardened	O
32-bit	O
MIPS	B-Device
R3000	I-Device
based	O
microprocessor	B-Architecture
chipset	B-Device
developed	O
by	O
the	O
USAF	O
Rome	O
Laboratories	O
for	O
the	O
Ballistic	O
Missile	O
Defense	O
Agency	O
,	O
and	O
produced	O
by	O
Honeywell	O
(	O
later	O
,	O
TRW	O
)	O
for	O
Aerospace	O
applications	O
.	O
</s>
<s>
It	O
was	O
a	O
three-chip	O
set	O
,	O
consisting	O
of	O
Central	B-General_Concept
Processing	I-General_Concept
Unit	I-General_Concept
,	O
Floating	B-General_Concept
Point	I-General_Concept
Unit	I-General_Concept
,	O
and	O
Cache	B-General_Concept
Memory	I-General_Concept
.	O
</s>
