<s>
The	O
maximum	O
random	B-Architecture
access	I-Architecture
memory	I-Architecture
(	O
RAM	B-Architecture
)	O
installed	O
in	O
any	O
computer	O
system	O
is	O
limited	O
by	O
hardware	O
,	O
software	O
and	O
economic	O
factors	O
.	O
</s>
<s>
The	O
hardware	O
may	O
have	O
a	O
limited	O
number	O
of	O
address	B-Architecture
bus	I-Architecture
bits	O
,	O
limited	O
by	O
the	O
processor	O
package	O
or	O
design	O
of	O
the	O
system	O
.	O
</s>
<s>
Some	O
of	O
the	O
address	O
space	O
may	O
be	O
shared	O
between	O
RAM	B-Architecture
,	O
peripherals	O
,	O
and	O
read-only	O
memory	O
.	O
</s>
<s>
In	O
the	O
case	O
of	O
a	O
microcontroller	B-Architecture
with	O
no	O
external	O
RAM	B-Architecture
,	O
the	O
size	O
of	O
the	O
RAM	B-Architecture
array	O
is	O
limited	O
by	O
the	O
size	O
of	O
the	O
integrated	O
circuit	O
die	O
.	O
</s>
<s>
In	O
a	O
packaged	O
system	O
,	O
only	O
enough	O
RAM	B-Architecture
may	O
be	O
provided	O
for	O
the	O
system	O
's	O
required	O
functions	O
,	O
with	O
no	O
provision	O
for	O
addition	O
of	O
memory	O
after	O
manufacture	O
.	O
</s>
<s>
Software	O
limitations	O
to	O
usable	O
physical	O
RAM	B-Architecture
may	O
be	O
present	O
.	O
</s>
<s>
An	O
operating	B-General_Concept
system	I-General_Concept
may	O
only	O
be	O
designed	O
to	O
allocate	O
a	O
certain	O
amount	O
of	O
memory	O
,	O
with	O
upper	O
address	O
bits	O
reserved	O
to	O
indicate	O
designations	O
such	O
as	O
I/O	O
or	O
supervisor	O
mode	O
or	O
other	O
security	O
information	O
.	O
</s>
<s>
Or	O
the	O
operating	B-General_Concept
system	I-General_Concept
may	O
rely	O
on	O
internal	O
data	O
structures	O
with	O
fixed	O
limits	O
for	O
addressable	O
memory	O
.	O
</s>
<s>
When	O
memory	O
devices	O
were	O
relatively	O
expensive	O
compared	O
with	O
the	O
processor	O
,	O
often	O
the	O
RAM	B-Architecture
delivered	O
with	O
the	O
system	O
was	O
much	O
less	O
than	O
the	O
address	O
capacity	O
of	O
the	O
hardware	O
,	O
because	O
of	O
cost	O
.	O
</s>
<s>
Sometimes	O
RAM	B-Device
limits	I-Device
can	O
be	O
overcome	O
using	O
special	O
techniques	O
.	O
</s>
<s>
Bank	B-General_Concept
switching	I-General_Concept
allows	O
blocks	O
of	O
RAM	B-Architecture
memory	I-Architecture
to	O
be	O
switched	O
into	O
the	O
processor	O
's	O
address	O
space	O
when	O
required	O
,	O
under	O
program	O
control	O
.	O
</s>
<s>
Operating	B-General_Concept
systems	I-General_Concept
routinely	O
manage	O
running	O
programs	O
using	O
virtual	B-Architecture
memory	I-Architecture
,	O
where	O
individual	O
program	O
operate	O
as	O
if	O
they	O
have	O
access	O
to	O
a	O
large	O
memory	O
space	O
that	O
is	O
being	O
simulated	O
by	O
swapping	O
memory	O
areas	O
with	O
disk	O
storage	O
.	O
</s>
<s>
For	O
performance	O
reasons	O
,	O
all	O
the	O
parallel	O
address	O
lines	O
of	O
an	O
address	B-Architecture
bus	I-Architecture
must	O
be	O
valid	O
at	O
the	O
same	O
time	O
,	O
otherwise	O
access	O
to	O
memory	O
would	O
be	O
delayed	O
and	O
performance	O
would	O
be	O
seriously	O
reduced	O
.	O
</s>
<s>
On	O
the	O
other	O
hand	O
,	O
segmented	O
or	O
bank	B-General_Concept
switching	I-General_Concept
designs	O
provide	O
more	O
memory	O
address	O
space	O
than	O
is	O
available	O
in	O
an	O
internal	O
memory	O
address	O
register	O
.	O
</s>
<s>
Microcontroller	B-Architecture
devices	O
with	O
integrated	O
I/O	O
and	O
memory	O
on-chip	O
sometimes	O
had	O
no	O
,	O
or	O
a	O
small	O
,	O
address	B-Architecture
bus	I-Architecture
available	O
for	O
external	O
devices	O
.	O
</s>
<s>
For	O
example	O
,	O
a	O
microcontroller	B-Architecture
family	O
available	O
with	O
a	O
2	O
kilobyte	O
address	O
space	O
might	O
have	O
a	O
variant	O
that	O
brought	O
out	O
an	O
11	O
line	O
address	B-Architecture
bus	I-Architecture
for	O
an	O
external	O
ROM	O
;	O
this	O
could	O
be	O
done	O
by	O
reassigning	O
I/O	O
pins	O
as	O
address	B-Architecture
bus	I-Architecture
pins	O
.	O
</s>
<s>
Some	O
general-purpose	O
processors	O
with	O
integrated	O
ROM	O
split	O
a	O
16-bit	B-Device
address	O
space	O
between	O
internal	O
ROM	O
and	O
an	O
external	O
15-bit	O
memory	O
bus	O
.	O
</s>
<s>
Some	O
very	O
early	O
computers	O
also	O
had	O
CPUs	O
with	O
fewer	O
than	O
16	O
address	O
pins	O
:	O
The	O
MOS	B-General_Concept
Technology	I-General_Concept
6507	I-General_Concept
(	O
a	O
reduced	O
pin	O
count	O
version	O
of	O
the	O
6502	O
)	O
was	O
used	O
in	O
the	O
Atari	B-General_Concept
2600	I-General_Concept
and	O
was	O
limited	O
to	O
a	O
13-line	O
address	B-Architecture
bus	I-Architecture
.	O
</s>
<s>
Most	O
8-bit	O
general-purpose	O
microprocessors	O
have	O
16-bit	B-Device
address	O
spaces	O
and	O
generate	O
16	O
address	O
lines	O
.	O
</s>
<s>
Examples	O
include	O
the	O
Intel	B-General_Concept
8080	I-General_Concept
,	O
Intel	B-General_Concept
8085	I-General_Concept
,	O
Zilog	B-General_Concept
Z80	I-General_Concept
,	O
Motorola	B-Device
6800	I-Device
,	O
Microchip	O
PIC18	O
,	O
and	O
many	O
others	O
.	O
</s>
<s>
These	O
processors	O
have	O
8-bit	O
CPUs	O
with	O
8-bit	O
data	O
and	O
16-bit	B-Device
addressing	O
.	O
</s>
<s>
The	O
Intel	B-General_Concept
8086	I-General_Concept
and	O
derivatives	O
,	O
such	O
as	O
the	O
8088	B-Device
,	O
80186	B-Device
and	O
80188	B-Device
form	O
the	O
basis	O
of	O
the	O
popular	O
x86	B-Operating_System
platform	O
and	O
are	O
the	O
first	O
level	O
of	O
the	O
IA16	O
architecture	O
.	O
</s>
<s>
These	O
were	O
16-bit	B-Device
CPUs	O
with	O
20-bit	O
addressing	O
.	O
</s>
<s>
The	O
Intel	B-General_Concept
80286	I-General_Concept
CPU	O
used	O
a	O
24-bit	O
addressing	O
scheme	O
.	O
</s>
<s>
The	O
286	B-General_Concept
and	O
later	O
could	O
also	O
function	O
in	O
real	B-Application
mode	I-Application
,	O
which	O
imposed	O
the	O
addressing	O
limits	O
of	O
the	O
8086	B-General_Concept
processor	O
.	O
</s>
<s>
The	O
286	B-General_Concept
had	O
support	O
for	O
virtual	B-Architecture
memory	I-Architecture
.	O
</s>
<s>
Like	O
the	O
286	B-General_Concept
,	O
the	O
386SX	O
can	O
address	O
only	O
up	O
to	O
16	O
megabytes	O
of	O
memory	O
.	O
</s>
<s>
The	O
Motorola	B-Device
68000	I-Device
had	O
a	O
24-bit	O
address	O
space	O
,	O
allowing	O
it	O
to	O
access	O
up	O
to	O
16	O
megabytes	O
of	O
memory	O
.	O
</s>
<s>
The	O
Motorola	B-Device
68020	I-Device
,	O
released	O
in	O
1984	O
,	O
had	O
a	O
32-bit	O
address	O
space	O
,	O
giving	O
it	O
a	O
maximum	O
addressable	O
memory	O
limit	O
of	O
4GB	O
.	O
</s>
<s>
All	O
following	O
chips	O
in	O
the	O
Motorola	B-Device
68000	I-Device
series	I-Device
inherited	O
this	O
limit	O
.	O
</s>
<s>
The	O
Pentium	B-Device
Pro	I-Device
and	O
all	O
Pentium	B-General_Concept
4s	I-General_Concept
have	O
36-bit	O
addressing	O
,	O
which	O
resulted	O
in	O
total	O
addressable	O
space	O
of	O
64	O
gigabytes	O
,	O
but	O
it	O
requires	O
that	O
the	O
operating	B-General_Concept
system	I-General_Concept
support	O
Physical	B-General_Concept
Address	I-General_Concept
Extension	I-General_Concept
.	O
</s>
<s>
Modern	O
64-bit	O
processors	O
such	O
as	O
designs	O
from	O
ARM	O
,	O
Intel	O
or	O
AMD	O
are	O
typically	O
limited	O
to	O
supporting	O
fewer	O
than	O
64	O
bits	O
for	O
RAM	B-Architecture
addresses	O
.	O
</s>
<s>
They	O
commonly	O
implement	O
from	O
40	O
to	O
52	O
physical	O
address	O
bits	O
(	O
supporting	O
from	O
1TB	O
to	O
4PB	O
of	O
RAM	B-Architecture
)	O
.	O
</s>
<s>
Like	O
previous	O
architectures	O
described	O
here	O
,	O
some	O
of	O
these	O
are	O
designed	O
to	O
support	O
higher	O
limits	O
of	O
RAM	B-Architecture
addressing	O
as	O
technology	O
improves	O
.	O
</s>
<s>
The	O
first	O
major	O
operating	B-General_Concept
system	I-General_Concept
for	O
microcomputers	B-Architecture
was	O
CP/M	B-Application
.	O
</s>
<s>
This	O
operating	B-General_Concept
system	I-General_Concept
was	O
compatible	O
with	O
Altair	O
8800-like	O
microcomputers	B-Architecture
,	O
made	O
by	O
Gary	O
Kildall	O
in	O
conjunction	O
with	O
the	O
programming	O
language	O
PL/M	B-Language
,	O
and	O
was	O
licensed	O
to	O
computer	O
manufacturers	O
by	O
Kildall	O
's	O
company	O
Digital	O
Research	O
after	O
it	O
was	O
rejected	O
by	O
Intel	O
.	O
</s>
<s>
The	O
Intel	B-General_Concept
8080	I-General_Concept
used	O
by	O
these	O
computers	O
was	O
an	O
8-bit	O
processor	O
,	O
with	O
16-bit	B-Device
address	O
space	O
,	O
which	O
allowed	O
it	O
access	O
up	O
to	O
64KB	O
of	O
memory	O
;	O
.COM	O
executables	O
used	O
with	O
CP/M	B-Application
have	O
a	O
maximum	O
size	O
of	O
64KB	O
due	O
to	O
this	O
,	O
as	O
do	O
those	O
used	O
by	O
DOS	O
operating	B-General_Concept
systems	I-General_Concept
for	O
16-bit	B-Device
microprocessors	O
.	O
</s>
<s>
In	O
the	O
original	O
IBM	O
PC	O
,	O
the	O
basic	O
RAM	B-Device
limit	I-Device
is	O
640KB	O
.	O
</s>
<s>
This	O
is	O
to	O
allow	O
for	O
hardware	O
addressing	O
space	O
in	O
the	O
upper	O
384KB	O
(	O
upper	B-Device
memory	I-Device
area	I-Device
(	O
UMA	B-Device
)	O
)	O
of	O
the	O
total	O
addressable	O
memory	O
space	O
of	O
1024KB	O
(	O
1MB	O
)	O
.	O
</s>
<s>
Ways	O
to	O
overcome	O
the	O
640k	B-Device
barrier	I-Device
,	O
as	O
it	O
came	O
to	O
be	O
known	O
,	O
involved	O
using	O
special	O
addressing	O
modes	O
available	O
in	O
the	O
286	B-General_Concept
and	O
later	O
x86	B-Operating_System
processors	O
.	O
</s>
<s>
The	O
1MB	O
total	O
address	O
space	O
was	O
a	O
result	O
of	O
the	O
20-bit	O
address	O
space	O
limit	O
imposed	O
on	O
the	O
8088	B-Device
CPU	O
.	O
</s>
<s>
Using	O
the	O
color	O
video	O
buffer	O
space	O
,	O
some	O
third-party	O
utilities	O
could	O
add	O
memory	O
at	O
the	O
top	O
of	O
the	O
640k	B-Device
conventional	B-Device
memory	I-Device
area	O
,	O
to	O
extend	O
memory	O
up	O
to	O
the	O
base	O
address	O
used	O
by	O
hardware	O
adapters	O
.	O
</s>
<s>
This	O
could	O
ultimately	O
backfill	O
RAM	B-Architecture
up	O
to	O
the	O
MDA	O
base	O
address	O
.	O
</s>
<s>
Hardware	O
extensions	O
allowed	O
access	O
to	O
more	O
memory	O
than	O
the	O
8086	B-General_Concept
CPU	O
could	O
address	O
through	O
paging	O
memory	O
.	O
</s>
<s>
This	O
memory	O
was	O
known	O
as	O
expanded	B-Device
memory	I-Device
.	O
</s>
<s>
This	O
standard	O
was	O
the	O
Expanded	B-Device
Memory	I-Device
Specification	I-Device
(	O
EMS	O
)	O
.	O
</s>
<s>
Pages	O
of	O
memory	O
from	O
expanded	B-Device
memory	I-Device
hardware	O
were	O
accessible	O
through	O
an	O
addressing	O
window	O
placed	O
into	O
a	O
free	O
area	O
in	O
the	O
UMA	B-Device
space	O
,	O
and	O
by	O
exchanging	O
it	O
for	O
other	O
pages	O
when	O
needed	O
to	O
access	O
other	O
memory	O
.	O
</s>
<s>
Using	O
a	O
quirk	O
in	O
the	O
286	B-General_Concept
CPU	O
architecture	O
,	O
the	O
high	B-Device
memory	I-Device
area	I-Device
(	O
HMA	O
)	O
was	O
accessible	O
,	O
as	O
the	O
first	O
64KB	O
above	O
the	O
1MB	O
limit	O
of	O
20-bit	O
addressing	O
in	O
the	O
x86	B-Operating_System
architecture	I-Operating_System
.	O
</s>
<s>
Using	O
the	O
24-bit	O
memory	O
addressing	O
capabilities	O
of	O
the	O
286	B-General_Concept
CPU	O
architecture	O
,	O
a	O
total	O
address	O
space	O
of	O
16MB	O
was	O
accessible	O
.	O
</s>
<s>
Memory	O
above	O
the	O
1MB	O
limit	O
was	O
called	O
extended	B-Device
memory	I-Device
.	O
</s>
<s>
DOS	O
and	O
other	O
real	B-Application
mode	I-Application
programs	O
,	O
limited	O
to	O
20-bit	O
addresses	O
,	O
could	O
only	O
access	O
this	O
space	O
through	O
EMS	O
emulation	O
on	O
the	O
extended	B-Device
memory	I-Device
,	O
or	O
an	O
EMS	O
analog	O
for	O
extended	B-Device
memory	I-Device
.	O
</s>
<s>
Microsoft	O
developed	O
a	O
standard	O
known	O
as	O
the	O
Extended	B-Device
Memory	I-Device
Specification	O
(	O
XMS	O
)	O
.	O
</s>
<s>
Accessing	O
the	O
memory	O
above	O
the	O
HMA	O
required	O
usage	O
of	O
the	O
protected	O
mode	O
of	O
the	O
286	B-General_Concept
CPU	O
.	O
</s>
<s>
With	O
this	O
CPU	O
,	O
access	O
to	O
16MB	O
memory	O
areas	O
was	O
available	O
to	O
DOS	O
programs	O
that	O
used	O
DOS	B-Device
extenders	I-Device
,	O
such	O
as	O
DOS/4GW	O
,	O
MiniGW/16	O
,	O
MiniGW	O
,	O
and	O
others	O
.	O
</s>
<s>
16-bit	B-Device
OS/2	O
was	O
limited	O
to	O
15MB	O
,	O
due	O
to	O
reserve	O
space	O
designed	O
into	O
the	O
operating	B-General_Concept
system	I-General_Concept
.	O
</s>
<s>
In	O
non-PAE	O
modes	O
of	O
32-bit	O
x86	B-Operating_System
processors	O
,	O
the	O
usable	O
RAM	B-Architecture
may	O
be	O
limited	O
to	O
less	O
than	O
4GB	O
.	O
</s>
<s>
Limits	O
on	O
memory	O
and	O
address	O
space	O
vary	O
by	O
platform	O
and	O
operating	B-General_Concept
system	I-General_Concept
.	O
</s>
<s>
Limits	O
on	O
physical	O
memory	O
for	O
32-bit	O
platforms	O
also	O
depend	O
on	O
the	O
presence	O
and	O
use	O
of	O
Physical	B-General_Concept
Address	I-General_Concept
Extension	I-General_Concept
(	O
PAE	O
)	O
,	O
which	O
allows	O
32-bit	O
systems	O
to	O
use	O
more	O
than	O
4GB	O
of	O
physical	O
memory	O
.	O
</s>
<s>
PAE	O
and	O
64-bit	O
systems	O
may	O
be	O
able	O
to	O
address	O
up	O
to	O
the	O
full	O
address	O
space	O
of	O
the	O
x86	B-Operating_System
processor	O
.	O
</s>
