<s>
The	O
Renesas	B-Device
R8C	I-Device
is	O
a	O
16-bit	O
microcontroller	B-Architecture
that	O
was	O
developed	O
as	O
a	O
smaller	O
and	O
cheaper	O
version	O
of	O
the	O
Renesas	O
M16C	O
.	O
</s>
<s>
It	O
retains	O
the	O
M16C	O
's	O
16-bit	O
CISC	B-Architecture
architecture	I-Architecture
and	O
instruction	O
set	O
,	O
but	O
trades	O
size	O
for	O
speed	O
by	O
cutting	O
the	O
internal	O
data	O
bus	O
from	O
16	O
bits	O
to	O
8	O
bits	O
.	O
</s>
<s>
It	O
is	O
available	O
in	O
a	O
number	O
of	O
different	O
versions	O
with	O
varying	O
amounts	O
of	O
flash	B-Device
memory	I-Device
and	O
SRAM	B-Architecture
.	O
</s>
<s>
All	O
R8C	B-Device
have	O
an	O
internal	O
ring	O
oscillator	O
and	O
can	B-Protocol
be	O
used	O
without	O
an	O
external	O
resonator	O
.	O
</s>
<s>
Common	O
interfaces	O
are	O
UART	O
and	O
some	O
devices	O
have	O
CAN	B-Protocol
interfaces	O
.	O
</s>
<s>
Some	O
devices	O
have	O
an	O
internal	O
data	O
flash	O
which	O
is	O
meant	O
as	O
a	O
replacement	O
for	O
a	O
serial	O
EEPROM	B-General_Concept
,	O
although	O
it	O
handles	O
less	O
write	O
cycles	O
as	O
a	O
real	O
serial	O
EEPROM	B-General_Concept
.	O
</s>
<s>
R8C	B-Device
devices	O
have	O
OCD	O
(	O
On	O
Chip	O
Debugging	O
,	O
see	O
in-circuit	B-Application
emulator	I-Application
)	O
.	O
</s>
