<s>
Quite	B-Language
Universal	I-Language
Circuit	I-Language
Simulator	I-Language
(	O
Qucs	B-Language
)	O
is	O
a	O
free-software	B-Application
electronics	B-Language
circuit	I-Language
simulator	I-Language
software	O
application	O
released	O
under	O
GPL	B-License
.	O
</s>
<s>
It	O
offers	O
the	O
ability	O
to	O
set	O
up	O
a	O
circuit	O
with	O
a	O
graphical	B-Application
user	I-Application
interface	I-Application
and	O
simulate	O
the	O
large-signal	O
,	O
small-signal	O
and	O
noise	O
behaviour	O
of	O
the	O
circuit	O
.	O
</s>
<s>
Pure	O
digital	O
simulations	O
are	O
also	O
supported	O
using	O
VHDL	B-Language
and/or	O
Verilog	B-Language
.	O
</s>
<s>
Qucs	B-Language
supports	O
a	O
growing	O
list	O
of	O
analog	O
and	O
digital	O
components	O
as	O
well	O
as	O
SPICE	B-Protocol
sub-circuits	O
.	O
</s>
<s>
It	O
is	O
intended	O
to	O
be	O
much	O
simpler	O
to	O
use	O
and	O
handle	O
than	O
other	O
circuit	B-Language
simulators	I-Language
like	O
gEDA	B-Application
or	O
PSPICE	O
.	O
</s>
<s>
Analysis	O
types	O
include	O
S-parameter	O
(	O
including	O
noise	O
)	O
,	O
AC	O
(	O
including	O
noise	O
)	O
,	O
DC	O
,	O
Transient	O
Analysis	O
,	O
Harmonic	O
Balance	O
(	O
not	O
yet	O
finished	O
)	O
,	O
Digital	O
simulation	O
(	O
VHDL	B-Language
and	O
Verilog-HDL	B-Language
)	O
and	O
Parameter	O
sweeps	O
.	O
</s>
<s>
Qucs	B-Language
has	O
a	O
graphical	B-Application
interface	I-Application
for	O
schematic	O
capture	O
.	O
</s>
<s>
Simulation	O
data	O
can	O
be	O
represented	O
in	O
various	O
types	O
of	O
diagrams	O
,	O
including	O
Smith-Chart	B-Application
,	O
Cartesian	O
,	O
Tabular	O
,	O
Polar	O
,	O
Smith-Polar	O
combination	O
,	O
3D-Cartesian	O
,	O
Locus	O
Curve	O
,	O
Timing	O
Diagram	O
and	O
Truth	O
Table	O
.	O
</s>
<s>
Other	O
features	O
include	O
the	O
transmission	O
line	O
calculator	O
,	O
Filter	B-Architecture
synthesis	O
,	O
Smith-Chart	B-Application
tool	O
for	O
power	O
and	O
noise	O
matching	O
,	O
Attenuator	O
design	O
synthesis	O
,	O
Device	O
model	O
and	O
subcircuit	O
library	O
manager	O
,	O
Optimizer	O
for	O
analog	O
designs	O
,	O
the	O
Verilog-A	B-Language
interface	O
,	O
Support	O
for	O
multiple	O
languages	O
(	O
GUI	B-Application
and	O
internal	O
help	O
system	O
)	O
,	O
Subcircuit	O
(	O
including	O
parameters	O
)	O
hierarchy	O
,	O
Powerful	O
data	O
post-processing	O
possible	O
using	O
equations	O
and	O
symbolically	O
defined	O
nonlinear	O
and	O
linear	O
devices	O
.	O
</s>
<s>
Qucs	B-Language
consists	O
of	O
several	O
standalone	O
programs	O
interacting	O
with	O
each	O
other	O
through	O
a	O
GUI	B-Application
.	O
</s>
<s>
The	O
GUI	B-Application
is	O
used	O
to	O
create	O
schematics	O
,	O
setup	O
simulations	O
,	O
display	O
simulation	O
results	O
,	O
writing	O
VHDL	B-Language
code	O
,	O
etc	O
.	O
</s>
<s>
The	O
analog	O
simulator	O
,	O
gnucsator	O
,	O
is	O
a	O
command	O
line	O
program	O
which	O
is	O
run	O
by	O
the	O
GUI	B-Application
in	O
order	O
to	O
simulate	O
the	O
schematic	O
which	O
you	O
previously	O
setup	O
.	O
</s>
<s>
The	O
GUI	B-Application
includes	O
a	O
text	O
editor	O
which	O
can	O
display	O
netlists	O
and	O
simulation	O
logging	O
information	O
.	O
</s>
<s>
SPICE	B-Protocol
netlists	O
,	O
or	O
Touchstone	O
files	O
)	O
.	O
</s>
<s>
A	O
filter	B-Architecture
synthesis	O
application	O
can	O
help	O
design	O
various	O
types	O
of	O
filters	O
.	O
</s>
<s>
The	O
command	O
line	O
conversion	O
program	O
tool	O
is	O
used	O
by	O
the	O
GUI	B-Application
to	O
import	O
and	O
export	O
datasets	O
,	O
netlists	O
and	O
schematics	O
from	O
and	O
to	O
other	O
CAD/EDA	O
software	O
.	O
</s>
<s>
Additionally	O
,	O
the	O
GUI	B-Application
can	O
steer	O
other	O
EDA	O
tools	O
.	O
</s>
<s>
For	O
purely	O
digital	O
simulations	O
(	O
via	O
VHDL	B-Language
)	O
the	O
program	O
FreeHDL	O
or	O
Icarus-Verilog	O
can	O
be	O
used	O
.	O
</s>
<s>
Qucs	B-Language
supports	O
transistor	O
models	O
,	O
some	O
need	O
to	O
be	O
added	O
by	O
hand	O
.	O
</s>
