<s>
A	O
processor	B-General_Concept
supplementary	I-General_Concept
capability	I-General_Concept
is	O
a	O
feature	O
that	O
has	O
been	O
added	O
to	O
an	O
existing	O
central	B-General_Concept
processing	I-General_Concept
unit	I-General_Concept
(	O
CPU	O
)	O
design	O
after	O
the	O
initial	O
introduction	O
of	O
that	O
design	O
to	O
the	O
marketplace	O
.	O
</s>
<s>
On	O
modern	O
32	O
and	O
64	O
bit	O
CPUs	O
the	O
processor	B-General_Concept
supplementary	I-General_Concept
capability	I-General_Concept
does	O
not	O
extend	O
to	O
Floating	B-General_Concept
Point	I-General_Concept
Units	I-General_Concept
(	O
FPUs	O
)	O
or	O
Memory	B-General_Concept
Management	I-General_Concept
Units	I-General_Concept
(	O
MMUs	O
)	O
as	O
these	O
are	O
considered	O
to	O
be	O
fundamental	O
core	O
functionalities	O
.	O
</s>
<s>
The	O
operating	B-General_Concept
system	I-General_Concept
(	O
kernel	O
)	O
and	O
systems	O
programmer	O
(	O
programs	O
)	O
may	O
choose	O
to	O
design	O
the	O
systems	O
software	O
so	O
that	O
it	O
mandatorily	O
uses	O
that	O
feature	O
and	O
therefore	O
can	O
only	O
be	O
run	O
on	O
the	O
more	O
recent	O
processors	O
that	O
have	O
that	O
feature	O
.	O
</s>
<s>
In	O
other	O
cases	O
,	O
an	O
operating	B-General_Concept
system	I-General_Concept
may	O
mimic	O
the	O
new	O
features	O
for	O
older	O
processors	O
,	O
though	O
often	O
with	O
reduced	O
performance	O
.	O
</s>
<s>
By	O
using	O
a	O
lowest	O
common	O
denominator	O
strategy	O
(	O
avoiding	O
use	O
of	O
processor	B-General_Concept
supplementary	I-General_Concept
capabilities	I-General_Concept
)	O
,	O
programs	O
can	O
be	O
kept	O
portable	O
across	O
all	O
machines	O
of	O
the	O
same	O
architecture	O
.	O
</s>
<s>
Some	O
popular	O
processor	O
architectures	O
such	O
as	O
x86	B-Operating_System
,	O
68000	B-Device
,	O
and	O
MIPS	B-Device
have	O
seen	O
many	O
new	O
capabilities	O
introduced	O
over	O
several	O
generations	O
of	O
design	O
.	O
</s>
<s>
3DNow	B-General_Concept
!	I-General_Concept
</s>
<s>
Processor	B-General_Concept
Supplementary	I-General_Concept
Instructions	I-General_Concept
are	O
instructions	O
that	O
have	O
been	O
implemented	O
on	O
certain	O
processors	O
within	O
a	O
family	O
,	O
but	O
are	O
not	O
present	O
on	O
all	O
processors	O
within	O
a	O
particular	O
family	O
.	O
</s>
<s>
The	O
following	O
instructions	O
are	O
considered	O
to	O
be	O
processor	B-General_Concept
supplementary	I-General_Concept
instructions	I-General_Concept
on	O
IA-32	B-Device
architecture	O
.	O
</s>
<s>
These	O
instructions	O
were	O
added	O
to	O
later	O
production	O
processors	O
,	O
and	O
are	O
not	O
part	O
of	O
the	O
original	O
IA-32	B-Device
instruction	O
set	O
.	O
</s>
<s>
Programs	O
containing	O
these	O
instructions	O
may	O
not	O
operate	O
correctly	O
on	O
all	O
machines	O
in	O
the	O
IA-32	B-Device
family	O
:	O
</s>
<s>
The	O
FPU	O
(	O
Floating	B-General_Concept
Point	I-General_Concept
Unit	I-General_Concept
)	O
maths	O
co-processing	O
capability	O
is	O
available	O
on	O
all	O
x86	B-Operating_System
processors	O
since	O
the	O
80486DX	O
series	O
.	O
</s>
<s>
The	O
FPU	O
and	O
MMU	O
instruction	O
sets	O
(	O
for	O
the	O
x86	B-Operating_System
family	O
)	O
have	O
not	O
been	O
considered	O
supplementary	O
instructions	O
since	O
their	O
introduction	O
due	O
to	O
their	O
importance	O
to	O
core	O
CPU	O
functionality	O
.	O
</s>
