<s>
A	O
processor	B-General_Concept
register	I-General_Concept
is	O
a	O
quickly	O
accessible	O
location	O
available	O
to	O
a	O
computer	O
's	O
processor	O
.	O
</s>
<s>
Registers	O
usually	O
consist	O
of	O
a	O
small	O
amount	O
of	O
fast	O
storage	B-General_Concept
,	O
although	O
some	O
registers	O
have	O
specific	O
hardware	O
functions	O
,	O
and	O
may	O
be	O
read-only	O
or	O
write-only	O
.	O
</s>
<s>
In	O
computer	B-General_Concept
architecture	I-General_Concept
,	O
registers	O
are	O
typically	O
addressed	O
by	O
mechanisms	O
other	O
than	O
main	O
memory	O
,	O
but	O
may	O
in	O
some	O
cases	O
be	O
assigned	O
a	O
memory	B-General_Concept
address	I-General_Concept
e.g.	O
</s>
<s>
DEC	B-Device
PDP-10	I-Device
,	O
ICT	B-Device
1900	I-Device
.	O
</s>
<s>
Almost	O
all	O
computers	O
,	O
whether	O
load/store	B-Architecture
architecture	I-Architecture
or	O
not	O
,	O
load	O
items	O
of	O
data	O
from	O
a	O
larger	O
memory	O
into	O
registers	O
where	O
they	O
are	O
used	O
for	O
arithmetic	O
operations	O
,	O
bitwise	O
operations	O
,	O
and	O
other	O
operations	O
,	O
and	O
are	O
manipulated	O
or	O
tested	O
by	O
machine	B-Language
instructions	I-Language
.	O
</s>
<s>
Modern	O
processors	O
use	O
either	O
static	B-Architecture
or	O
dynamic	O
RAM	B-Architecture
as	O
main	O
memory	O
,	O
with	O
the	O
latter	O
usually	O
accessed	O
via	O
one	O
or	O
more	O
cache	O
levels	O
.	O
</s>
<s>
Processor	B-General_Concept
registers	I-General_Concept
are	O
normally	O
at	O
the	O
top	O
of	O
the	O
memory	B-General_Concept
hierarchy	I-General_Concept
,	O
and	O
provide	O
the	O
fastest	O
way	O
to	O
access	O
data	O
.	O
</s>
<s>
The	O
term	O
normally	O
refers	O
only	O
to	O
the	O
group	O
of	O
registers	O
that	O
are	O
directly	O
encoded	O
as	O
part	O
of	O
an	O
instruction	O
,	O
as	O
defined	O
by	O
the	O
instruction	B-General_Concept
set	I-General_Concept
.	O
</s>
<s>
However	O
,	O
modern	O
high-performance	O
CPUs	O
often	O
have	O
duplicates	O
of	O
these	O
"	O
architectural	O
registers	O
"	O
in	O
order	O
to	O
improve	O
performance	O
via	O
register	B-Architecture
renaming	I-Architecture
,	O
allowing	O
parallel	B-Operating_System
and	O
speculative	B-General_Concept
execution	I-General_Concept
.	O
</s>
<s>
Modern	O
x86	B-Operating_System
design	O
acquired	O
these	O
techniques	O
around	O
1995	O
with	O
the	O
releases	O
of	O
Pentium	B-Device
Pro	I-Device
,	O
Cyrix	B-General_Concept
6x86	I-General_Concept
,	O
Nx586	B-Device
,	O
and	O
AMD	O
K5	O
.	O
</s>
<s>
When	O
a	O
computer	B-Application
program	I-Application
accesses	O
the	O
same	O
data	O
repeatedly	O
,	O
this	O
is	O
called	O
locality	B-General_Concept
of	I-General_Concept
reference	I-General_Concept
.	O
</s>
<s>
Register	O
allocation	O
is	O
performed	O
either	O
by	O
a	O
compiler	B-Language
in	O
the	O
code	B-Application
generation	I-Application
phase	O
,	O
or	O
manually	O
by	O
an	O
assembly	B-Language
language	I-Language
programmer	O
.	O
</s>
<s>
Registers	O
are	O
normally	O
measured	O
by	O
the	O
number	O
of	O
bits	O
they	O
can	O
hold	O
,	O
for	O
example	O
,	O
an	O
"	O
8-bit	O
register	O
"	O
,	O
"	O
32-bit	O
register	O
"	O
,	O
"	O
64-bit	B-Device
register	O
"	O
,	O
or	O
even	O
more	O
.	O
</s>
<s>
In	O
some	O
instruction	B-General_Concept
sets	I-General_Concept
,	O
the	O
registers	O
can	O
operate	O
in	O
various	O
modes	O
,	O
breaking	O
down	O
their	O
storage	B-General_Concept
memory	I-General_Concept
into	O
smaller	O
parts	O
(	O
32-bit	O
into	O
four	O
8-bit	O
ones	O
,	O
for	O
instance	O
)	O
to	O
which	O
multiple	O
data	O
(	O
vector	O
,	O
or	O
one-dimensional	O
array	O
of	O
data	O
)	O
can	O
be	O
loaded	O
and	O
operated	O
upon	O
at	O
the	O
same	O
time	O
.	O
</s>
<s>
Processors	O
that	O
have	O
the	O
ability	O
to	O
execute	O
single	O
instructions	O
on	O
multiple	O
data	O
are	O
called	O
vector	B-Operating_System
processors	I-Operating_System
.	O
</s>
<s>
User-accessible	O
registers	O
can	O
be	O
read	O
or	O
written	O
by	O
machine	B-Language
instructions	I-Language
.	O
</s>
<s>
The	O
most	O
common	O
division	O
of	O
user-accessible	O
registers	O
is	O
a	O
division	O
into	O
data	O
registers	O
and	O
address	B-General_Concept
registers	I-General_Concept
.	O
</s>
<s>
s	O
can	O
hold	O
numeric	B-Algorithm
data	O
values	O
such	O
as	O
integer	O
and	O
,	O
in	O
some	O
architectures	O
,	O
floating-point	B-Algorithm
values	O
,	O
as	O
well	O
as	O
characters	O
,	O
small	O
bit	B-Data_Structure
arrays	I-Data_Structure
and	O
other	O
data	O
.	O
</s>
<s>
In	O
some	O
older	O
architectures	O
,	O
such	O
as	O
the	O
IBM	B-Device
704	I-Device
,	O
the	O
IBM	B-Device
709	I-Device
and	O
successors	O
,	O
the	O
PDP-1	B-Device
,	O
the	O
PDP-4/PDP-7/PDP-9/PDP	O
-15	O
,	O
the	O
PDP-5/PDP	O
-8	O
,	O
and	O
the	O
HP	B-Device
2100	I-Device
,	O
a	O
special	O
data	O
register	O
known	O
as	O
the	O
accumulator	B-General_Concept
is	O
used	O
implicitly	O
for	O
many	O
operations	O
.	O
</s>
<s>
s	O
hold	O
addresses	B-General_Concept
and	O
are	O
used	O
by	O
instructions	O
that	O
indirectly	O
access	O
primary	O
memory	O
.	O
</s>
<s>
Some	O
processors	O
contain	O
registers	O
that	O
may	O
only	O
be	O
used	O
to	O
hold	O
an	O
address	O
or	O
only	O
to	O
hold	O
numeric	B-Algorithm
values	O
(	O
in	O
some	O
cases	O
used	O
as	O
an	O
index	B-General_Concept
register	I-General_Concept
whose	O
value	O
is	O
added	O
as	O
an	O
offset	O
from	O
some	O
address	O
)	O
;	O
others	O
allow	O
registers	O
to	O
hold	O
either	O
kind	O
of	O
quantity	O
.	O
</s>
<s>
A	O
wide	O
variety	O
of	O
possible	O
addressing	B-Language
modes	I-Language
,	O
used	O
to	O
specify	O
the	O
effective	B-Language
address	I-Language
of	O
an	O
operand	O
,	O
exist	O
.	O
</s>
<s>
The	O
stack	B-Application
pointer	O
is	O
used	O
to	O
manage	O
the	O
run-time	B-General_Concept
stack	I-General_Concept
.	O
</s>
<s>
Rarely	O
,	O
other	O
data	B-Application
stacks	I-Application
are	O
addressed	O
by	O
dedicated	O
address	B-General_Concept
registers	I-General_Concept
(	O
see	O
stack	B-Application
machine	I-Application
)	O
.	O
</s>
<s>
General-purpose	O
registers	O
(	O
GPRs	B-General_Concept
)	O
can	O
store	O
both	O
data	O
and	O
addresses	B-General_Concept
,	O
i.e.	O
,	O
they	O
are	O
combined	O
data/address	O
registers	O
;	O
in	O
some	O
architectures	O
,	O
the	O
register	B-General_Concept
file	I-General_Concept
is	O
unified	O
so	O
that	O
the	O
GPRs	B-General_Concept
can	O
store	O
floating-point	B-Algorithm
numbers	I-Algorithm
as	O
well	O
.	O
</s>
<s>
Status	B-General_Concept
registers	I-General_Concept
hold	O
truth	O
values	O
often	O
used	O
to	O
determine	O
whether	O
some	O
instruction	O
should	O
or	O
should	O
not	O
be	O
executed	O
.	O
</s>
<s>
s	O
(	O
FPRs	O
)	O
store	O
floating-point	B-Algorithm
numbers	I-Algorithm
in	O
many	O
architectures	O
.	O
</s>
<s>
hold	O
data	O
for	O
vector	B-Operating_System
processing	I-Operating_System
done	O
by	O
SIMD	B-Device
instructions	O
(	O
Single	B-Device
Instruction	I-Device
,	I-Device
Multiple	I-Device
Data	I-Device
)	O
.	O
</s>
<s>
Special-purpose	O
registers	O
(	O
SPRs	O
)	O
hold	O
some	O
elements	O
of	O
the	O
program	O
state	O
;	O
they	O
usually	O
include	O
the	O
program	B-General_Concept
counter	I-General_Concept
,	O
also	O
called	O
the	O
instruction	B-General_Concept
pointer	I-General_Concept
,	O
and	O
the	O
status	B-General_Concept
register	I-General_Concept
;	O
the	O
program	B-General_Concept
counter	I-General_Concept
and	O
status	B-General_Concept
register	I-General_Concept
might	O
be	O
combined	O
in	O
a	O
program	B-Device
status	I-Device
word	I-Device
(	O
PSW	O
)	O
register	O
.	O
</s>
<s>
The	O
aforementioned	O
stack	B-Application
pointer	O
is	O
sometimes	O
also	O
included	O
in	O
this	O
group	O
.	O
</s>
<s>
In	O
some	O
architectures	O
,	O
model-specific	B-General_Concept
registers	I-General_Concept
(	O
also	O
called	O
machine-specific	O
registers	O
)	O
store	O
data	O
and	O
settings	O
related	O
to	O
the	O
processor	O
itself	O
.	O
</s>
<s>
The	O
instruction	B-General_Concept
register	I-General_Concept
holds	O
the	O
instruction	O
currently	O
being	O
executed	O
.	O
</s>
<s>
Registers	O
related	O
to	O
fetching	O
information	O
from	O
RAM	B-Architecture
,	O
a	O
collection	O
of	O
storage	B-General_Concept
registers	O
located	O
on	O
separate	O
chips	O
from	O
the	O
CPU	O
:	O
</s>
<s>
They	O
may	O
not	O
correspond	O
to	O
the	O
physical	O
hardware	O
if	O
register	B-Architecture
renaming	I-Architecture
is	O
being	O
performed	O
by	O
the	O
underlying	O
hardware	O
.	O
</s>
<s>
Hardware	B-General_Concept
registers	I-General_Concept
are	O
similar	O
,	O
but	O
occur	O
outside	O
CPUs	O
.	O
</s>
<s>
In	O
some	O
architectures	O
(	O
such	O
as	O
SPARC	B-Architecture
and	O
MIPS	B-Device
)	O
,	O
the	O
first	O
or	O
last	O
register	O
in	O
the	O
integer	O
register	B-General_Concept
file	I-General_Concept
is	O
a	O
pseudo-register	O
in	O
that	O
it	O
is	O
hardwired	O
to	O
always	O
return	O
zero	O
when	O
read	O
(	O
mostly	O
to	O
simplify	O
indexing	O
modes	O
)	O
,	O
and	O
it	O
cannot	O
be	O
overwritten	O
.	O
</s>
<s>
In	O
Alpha	B-Device
,	O
this	O
is	O
also	O
done	O
for	O
the	O
floating-point	B-Algorithm
register	B-General_Concept
file	I-General_Concept
.	O
</s>
<s>
As	O
a	O
result	O
of	O
this	O
,	O
register	B-General_Concept
files	I-General_Concept
are	O
commonly	O
quoted	O
as	O
having	O
one	O
register	O
more	O
than	O
how	O
many	O
of	O
them	O
are	O
actually	O
usable	O
;	O
for	O
example	O
,	O
32	O
registers	O
are	O
quoted	O
when	O
only	O
31	O
of	O
them	O
fit	O
within	O
the	O
above	O
definition	O
of	O
a	O
register	O
.	O
</s>
<s>
Note	O
that	O
in	O
x86-compatible	O
processors	O
,	O
the	O
stack	B-Application
pointer	O
(	O
ESP	O
)	O
is	O
counted	O
as	O
an	O
integer	O
register	O
,	O
even	O
though	O
there	O
are	O
a	O
limited	O
number	O
of	O
instructions	O
that	O
may	O
be	O
used	O
to	O
operate	O
on	O
its	O
contents	O
.	O
</s>
<s>
Although	O
all	O
of	O
the	O
above-listed	O
architectures	O
are	O
different	O
,	O
almost	O
all	O
are	O
in	O
a	O
basic	O
arrangement	O
known	O
as	O
the	O
von	B-Architecture
Neumann	I-Architecture
architecture	I-Architecture
,	O
first	O
proposed	O
by	O
the	O
Hungarian-American	O
mathematician	O
John	O
von	O
Neumann	O
.	O
</s>
<s>
It	O
is	O
also	O
noteworthy	O
that	O
the	O
number	O
of	O
registers	O
on	O
GPUs	B-Architecture
is	O
much	O
higher	O
than	O
that	O
on	O
CPUs	O
.	O
</s>
<s>
Architecture	O
Notes	O
AT&T	B-Application
Hobbit	I-Application
0	O
stack	B-Application
of	O
7	O
All	O
data	O
manipulation	O
instructions	O
work	O
solely	O
within	O
registers	O
,	O
and	O
data	O
must	O
be	O
moved	O
into	O
a	O
register	O
before	O
processing	O
.	O
</s>
<s>
(	O
64	O
elements	O
)	O
Scalar	O
data	O
registers	O
can	O
be	O
integer	O
or	O
floating-point	B-Algorithm
;	O
also	O
64	O
scalar	O
scratch-pad	O
T	O
registers	O
and	O
64	O
address	O
scratch-pad	O
B	O
registers	O
4004	B-General_Concept
1	O
accumulator	B-General_Concept
,	O
16	O
others	O
0	O
Register	O
A	O
is	O
general-purpose	O
,	O
while	O
the	O
r0	O
–	O
r15	O
registers	O
are	O
for	O
the	O
address	O
and	O
segment	O
.	O
</s>
<s>
8008	B-General_Concept
1	O
accumulator	B-General_Concept
,	O
6	O
others	O
0	O
The	O
A	O
register	O
is	O
an	O
accumulator	B-General_Concept
to	O
which	O
all	O
arithmetic	O
is	O
done	O
;	O
the	O
H	O
and	O
L	O
registers	O
can	O
be	O
used	O
in	O
combination	O
as	O
an	O
address	B-General_Concept
register	I-General_Concept
;	O
all	O
registers	O
can	O
be	O
used	O
as	O
operands	O
in	O
load/store/move/increment/decrement	O
instructions	O
and	O
as	O
the	O
other	O
operand	O
in	O
arithmetic	O
instructions	O
.	O
</s>
<s>
There	O
is	O
no	O
floating-point	B-General_Concept
unit	I-General_Concept
(	O
FPU	O
)	O
available	O
.	O
</s>
<s>
8080	B-General_Concept
1	O
accumulator	B-General_Concept
,	O
6	O
others	O
0	O
Plus	O
a	O
stack	B-Application
pointer	O
.	O
</s>
<s>
The	O
A	O
register	O
is	O
an	O
accumulator	B-General_Concept
to	O
which	O
all	O
arithmetic	O
is	O
done	O
;	O
the	O
register	O
pairs	O
B+C	O
,	O
D+E	O
,	O
and	O
H+L	O
can	O
be	O
used	O
as	O
address	B-General_Concept
registers	I-General_Concept
in	O
some	O
instructions	O
;	O
all	O
registers	O
can	O
be	O
used	O
as	O
operands	O
in	O
load/store/move/increment/decrement	O
instructions	O
and	O
as	O
the	O
other	O
operand	O
in	O
arithmetic	O
instructions	O
.	O
</s>
<s>
Floating-point	B-General_Concept
processors	I-General_Concept
intended	O
for	O
the	O
8080	B-General_Concept
were	O
Intel	O
8231	O
,	O
AMD	O
Am9511	O
,	O
and	O
Intel	O
8232	O
.	O
</s>
<s>
They	O
were	O
also	O
readily	O
usable	O
with	O
the	O
Z80	B-General_Concept
and	O
similar	O
processors	O
.	O
</s>
<s>
(	O
if	O
FP	O
present	O
)	O
8086/8088	O
,	O
80186/80188	B-Device
,	O
80286	B-General_Concept
,	O
with	O
8087	B-Device
,	O
80187	O
or	O
80287	O
for	O
floating-point	B-Algorithm
,	O
with	O
an	O
80-bit	O
wide	O
,	O
8	O
deep	O
register	O
stack	B-Application
with	O
some	O
instructions	O
able	O
to	O
use	O
registers	O
relative	O
to	O
the	O
top	O
of	O
the	O
stack	B-Application
as	O
operands	O
;	O
without	O
8087/80187/80287	O
,	O
no	O
floating-point	B-Algorithm
registers	O
IA-32	B-Device
8	O
stack	B-Application
of	O
8	O
(	O
if	O
FP	O
present	O
)	O
,	O
</s>
<s>
8	O
(	O
if	O
SSE/MMX	O
present	O
)	O
80386	B-General_Concept
required	O
80387	O
for	O
floating-point	B-Algorithm
,	O
later	O
processors	O
had	O
built-in	O
floating-point	B-Algorithm
,	O
with	O
both	O
having	O
an	O
80-bit	O
wide	O
,	O
8	O
deep	O
register	O
stack	B-Application
with	O
some	O
instructions	O
able	O
to	O
use	O
registers	O
relative	O
to	O
the	O
top	O
of	O
the	O
stack	B-Application
as	O
operands	O
.	O
</s>
<s>
The	O
Pentium	B-General_Concept
III	I-General_Concept
and	O
later	O
had	O
the	O
SSE	B-General_Concept
with	O
additional	O
128-bit	O
XMM	O
registers	O
.	O
</s>
<s>
(	O
if	O
AVX-512	O
available	O
)	O
FP	O
registers	O
are	O
128-bit	O
XMM	O
registers	O
,	O
later	O
extended	O
to	O
256-bit	O
YMM	O
registers	O
with	O
AVX/AVX2	B-General_Concept
and	O
512-bit	O
ZMM0	O
–	O
ZMM31	O
registers	O
with	O
AVX-512	O
.	O
</s>
<s>
Fairchild	B-General_Concept
F8	I-General_Concept
one	O
accumulator	B-General_Concept
,	O
64	O
scratchpad	O
registers	O
,	O
one	O
indirect	O
scratchpad	O
register	O
(	O
ISAR	O
)	O
Instructions	O
can	O
directly	O
reference	O
the	O
first	O
16	O
scratchpad	O
registers	O
and	O
can	O
access	O
all	O
scratchpad	O
registers	O
indirectly	O
through	O
the	O
ISAR	O
Geode	B-Device
GX	I-Device
1	O
data	O
,	O
1	O
address	O
8	O
Geode	O
GX/Media	O
GX/4x86/5x86	O
is	O
the	O
emulation	O
of	O
486/Pentium	O
compatible	O
processor	O
made	O
by	O
Cyrix/National	O
Semiconductor	O
.	O
</s>
<s>
Like	O
Transmeta	O
,	O
the	O
processor	O
had	O
a	O
translation	O
layer	O
that	O
translated	O
x86	B-Operating_System
code	O
to	O
native	B-Language
code	I-Language
and	O
executed	O
it	O
.	O
</s>
<s>
It	O
does	O
not	O
support	O
128-bit	O
SSE	B-General_Concept
registers	O
,	O
just	O
the	O
80387	O
stack	B-Application
of	O
eight	O
80-bit	O
floating-point	B-Algorithm
registers	O
,	O
and	O
partially	O
supports	O
3DNow	B-General_Concept
!	I-General_Concept
</s>
<s>
The	O
native	O
processor	O
only	O
contains	O
1	O
data	O
and	O
1	O
address	B-General_Concept
register	I-General_Concept
for	O
all	O
purposes	O
and	O
it	O
is	O
translated	O
into	O
4	O
paths	O
of	O
32-bit	O
naming	O
registers	O
r1	O
(	O
base	O
)	O
,	O
r2	O
(	O
data	O
)	O
,	O
r3	O
(	O
back	O
pointer	O
)	O
,	O
and	O
r4	O
(	O
stack	B-Application
pointer	O
)	O
within	O
scratchpad	O
SRAM	O
for	O
integer	O
operation	O
and	O
it	O
uses	O
the	O
L1	O
cache	O
for	O
x86	B-Operating_System
code	O
emulation	O
(	O
it	O
's	O
not	O
compatible	O
with	O
some	O
286/386/486	O
instructions	O
in	O
real	O
mode	O
)	O
.	O
</s>
<s>
SunPlus	O
SPG	O
0	O
A	O
16-bit	O
wide	O
,	O
32-bit	O
address	O
space	O
stack	B-Application
machine	I-Application
processor	O
from	O
the	O
Taiwanese	O
company	O
Sunplus	O
Technology	O
,	O
it	O
can	O
be	O
found	O
on	O
Vtech	O
's	O
V.Smile	O
line	O
for	O
educational	O
purposes	O
and	O
video	O
game	O
consoles	O
such	O
as	O
the	O
Wireless	O
60	O
,	O
Mattel	O
HyperScan	O
,	O
and	O
XaviXPORT	O
.	O
</s>
<s>
It	O
lacks	O
any	O
general-purpose	O
register	O
or	O
internal	O
register	O
for	O
naming/renaming	O
,	O
but	O
its	O
floating-point	B-General_Concept
unit	I-General_Concept
has	O
an	O
80-bit	O
6-stage	O
stack	B-Application
and	O
four	O
128-bit	O
VLIW	O
SIMD	B-Device
registers	O
on	O
a	O
vertex	O
shader	O
co-processor	O
.	O
</s>
<s>
VM	B-Device
Labs	I-Device
Nuon	I-Device
0	O
1	O
A	O
32-bit	O
stack	B-Application
machine	I-Application
processor	O
developed	O
by	O
VM	O
Labs	O
and	O
specialized	O
for	O
multimedia	O
.	O
</s>
<s>
It	O
can	O
be	O
found	O
on	O
the	O
company	O
's	O
own	O
Nuon	B-Device
DVD	O
player	O
console	O
line	O
and	O
the	O
Game	O
Wave	O
Family	O
Entertainment	O
System	O
from	O
ZaPit	O
games	O
.	O
</s>
<s>
The	O
design	O
was	O
heavily	O
influenced	O
by	O
Intel	O
's	O
MMX	O
technology	O
;	O
it	O
contained	O
a	O
128-byte	O
unified	O
stack	B-Application
cache	O
for	O
both	O
vector	O
and	O
scalar	O
instructions	O
.	O
</s>
<s>
The	O
unified	O
cache	O
can	O
be	O
divided	O
as	O
eight	O
128-bit	O
vector	O
registers	O
or	O
thirty-two	O
32-bit	O
SIMD	B-Device
scalar	O
registers	O
through	O
bank	O
renaming	O
;	O
there	O
is	O
no	O
integer	O
register	O
in	O
this	O
architecture	O
.	O
</s>
<s>
(	O
if	O
FP	O
present	O
)	O
Address	B-General_Concept
register	I-General_Concept
8	O
(	O
a7	O
)	O
is	O
the	O
stack	B-Application
pointer	O
.	O
</s>
<s>
68000	O
,	O
68010	O
,	O
68012	O
,	O
68020	O
,	O
and	O
68030	O
require	O
an	O
FPU	O
for	O
floating-point	B-Algorithm
;	O
68040	O
had	O
FPU	O
built	O
in	O
.	O
</s>
<s>
(	O
dedicated	O
vector	O
co-processor	O
located	O
nearby	O
its	O
GPU	B-Architecture
)	O
The	O
Emotion	B-Architecture
Engine	I-Architecture
's	O
main	O
core	O
(	O
VU0	O
)	O
is	O
a	O
heavily	O
modified	O
DSP	O
general	O
core	O
intended	O
for	O
general	O
background	O
tasks	O
and	O
it	O
contains	O
one	O
64-bit	B-Device
accumulator	B-General_Concept
,	O
two	O
general	O
data	O
registers	O
,	O
and	O
one	O
32-bit	O
program	B-General_Concept
counter	I-General_Concept
.	O
</s>
<s>
A	O
modified	O
MIPS	B-Device
III	O
executable	O
core	O
(	O
VU1	O
)	O
is	O
for	O
game	O
data	O
and	O
protocol	O
control	O
,	O
and	O
it	O
contains	O
thirty-two	O
32-bit	O
general-purpose	O
registers	O
for	O
integer	O
computation	O
and	O
thirty-two	O
128-bit	O
SIMD	B-Device
registers	O
for	O
storing	O
SIMD	B-Device
instructions	O
,	O
streaming	O
data	O
value	O
and	O
some	O
integer	O
calculation	O
value	O
,	O
and	O
one	O
accumulator	B-General_Concept
register	O
for	O
connecting	O
general	O
floating-point	B-Algorithm
computation	O
to	O
the	O
vector	O
register	B-General_Concept
file	I-General_Concept
on	O
the	O
co-processor	O
.	O
</s>
<s>
The	O
coprocessor	O
is	O
built	O
via	O
a	O
32-entry	O
128-bit	O
vector	O
register	B-General_Concept
file	I-General_Concept
(	O
can	O
only	O
store	O
vector	O
values	O
that	O
pass	O
from	O
the	O
accumulator	B-General_Concept
in	O
the	O
CPU	O
)	O
and	O
no	O
integer	O
registers	O
are	O
built	O
in	O
.	O
</s>
<s>
Both	O
the	O
vector	O
co-processor	O
(	O
VPU	O
0/1	O
)	O
and	O
the	O
Emotion	B-Architecture
Engine	I-Architecture
's	O
entire	O
main	O
processor	O
module	O
(	O
VU0	O
+	O
VU1	O
+	O
VPU0	O
+	O
VPU1	O
)	O
are	O
built	O
based	O
on	O
a	O
modified	O
MIPS	B-Device
instructions	O
set	O
.	O
</s>
<s>
The	O
accumulator	B-General_Concept
in	O
this	O
case	O
is	O
not	O
general-purpose	O
but	O
control	O
status	O
.	O
</s>
<s>
CUDA	B-Architecture
configurable	O
,	O
up	O
to	O
255	O
per	O
thread	O
Earlier	O
generations	O
allowed	O
up	O
to	O
127/63	O
registers	O
per	O
thread	O
(	O
Tesla/Fermi	O
)	O
.	O
</s>
<s>
Registers	O
are	O
32	O
bits	O
wide	O
;	O
double-precision	O
floating-point	B-Algorithm
numbers	I-Algorithm
and	O
64-bit	B-Device
pointers	O
therefore	O
require	O
two	O
registers	O
.	O
</s>
<s>
CDC	B-Device
6000	I-Device
series	I-Device
16	O
8	O
8	O
'	O
A	O
 '	O
registers	O
,	O
A0	O
–	O
A7	O
,	O
hold	O
18-bit	O
addresses	B-General_Concept
;	O
8	O
'	O
B	O
 '	O
registers	O
,	O
B0	O
–	O
B7	O
,	O
hold	O
18-bit	O
integer	O
values	O
(	O
with	O
B0	O
permanently	O
set	O
to	O
zero	O
)	O
;	O
8	O
'	O
X	O
 '	O
registers	O
,	O
X0	O
–	O
X7	O
,	O
hold	O
60	O
bits	O
of	O
integer	O
or	O
floating-point	B-Algorithm
data	O
.	O
</s>
<s>
System/360	B-Application
,	O
System/370	B-Device
,	O
System/390	B-Device
,	O
z/Architecture	B-Device
16	O
4	O
(	O
if	O
FP	O
present	O
)	O
;	O
</s>
<s>
16	O
in	O
G5	O
and	O
later	O
S/390	B-Device
models	O
and	O
z/Architecture	B-Device
FP	O
was	O
optional	O
in	O
System/360	B-Application
,	O
and	O
always	O
present	O
in	O
S/370	B-Device
and	O
later	O
.	O
</s>
<s>
In	O
processors	O
with	O
the	O
Vector	B-General_Concept
Facility	I-General_Concept
,	O
there	O
are	O
16	O
vector	O
registers	O
containing	O
a	O
machine-dependent	O
number	O
of	O
32-bit	O
elements	O
.	O
</s>
<s>
Some	O
registers	O
are	O
assigned	O
a	O
fixed	O
purpose	O
by	O
calling	O
conventions	O
;	O
for	O
example	O
,	O
register	O
14	O
is	O
used	O
for	O
subroutine	O
return	O
addresses	B-General_Concept
and	O
,	O
for	O
ELF	O
ABIs	O
,	O
register	O
15	O
is	O
used	O
as	O
a	O
stack	B-Application
pointer	O
.	O
</s>
<s>
The	O
S/390	B-Device
G5	O
processor	O
increased	O
the	O
number	O
of	O
floating-point	B-Algorithm
registers	O
to	O
16	O
.	O
</s>
<s>
MMIX	O
256	O
256	O
An	O
instruction	B-General_Concept
set	I-General_Concept
designed	O
by	O
Donald	O
Knuth	O
in	O
the	O
late	O
1990s	O
for	O
pedagogical	O
purposes	O
.	O
</s>
<s>
(	O
if	O
FP	O
present	O
)	O
Xelerated	O
X10	O
1	O
32	O
A	O
32/40	O
-bit	O
stack	O
machine-based	O
network	O
processor	O
with	O
a	O
modified	O
MIPS	B-Device
instruction	I-Device
set	I-Device
and	O
a	O
128-bit	O
floating-point	B-General_Concept
unit	I-General_Concept
.	O
</s>
<s>
Parallax	B-Architecture
Propeller	I-Architecture
0	O
2	O
An	O
eight-core	O
8/16	O
-bit	O
sliced	O
stack	B-Application
machine	I-Application
controller	O
with	O
a	O
simple	O
logic	O
circuit	O
inside	O
,	O
it	O
has	O
8	O
cog	O
counters	O
(	O
cores	O
)	O
,	O
each	O
containing	O
three	O
8/16	O
bit	O
special	O
control	O
registers	O
with	O
32	O
bit	O
x	O
512	O
stack	B-Application
RAM	B-Architecture
.	O
</s>
<s>
Unlike	O
most	O
shadow	O
register	B-General_Concept
files	I-General_Concept
in	O
modern	O
processors	O
and	O
multi-core	B-Architecture
systems	O
,	O
all	O
of	O
the	O
stack	B-Application
RAM	B-Architecture
in	O
cog	O
can	O
be	O
accessed	O
in	O
instruction	O
level	O
,	O
which	O
allows	O
all	O
of	O
these	O
cogs	O
to	O
act	O
as	O
a	O
single	O
general-purpose	O
core	O
if	O
necessary	O
.	O
</s>
<s>
Floating-point	B-General_Concept
unit	I-General_Concept
is	O
external	O
and	O
it	O
contains	O
two	O
80-bit	O
vector	O
registers	O
.	O
</s>
<s>
Itanium	B-General_Concept
128	O
128	O
And	O
64	O
1-bit	O
predicate	O
registers	O
and	O
8	O
branch	O
registers	O
.	O
</s>
<s>
SPARC	B-Architecture
31	O
32	O
Global	O
register	O
0	O
is	O
hardwired	O
to	O
0	O
.	O
</s>
<s>
Uses	O
register	B-General_Concept
windows	I-General_Concept
.	O
</s>
<s>
IBM	B-Architecture
POWER	I-Architecture
32	O
32	O
And	O
1	O
link	O
and	O
1	O
count	O
register	O
.	O
</s>
<s>
Power	B-Architecture
ISA	I-Architecture
32	O
32	O
And	O
1	O
link	O
and	O
1	O
count	O
register	O
.	O
</s>
<s>
Processors	O
supporting	O
the	O
Vector	B-General_Concept
facility	I-General_Concept
also	O
have	O
32	O
128-bit	O
vector	O
registers	O
.	O
</s>
<s>
Blackfin	B-General_Concept
8	O
data	O
,	O
2	O
accumulator	B-General_Concept
,	O
6	O
address	O
0	O
And	O
stack	B-Application
pointer	O
and	O
frame	O
pointer	O
.	O
</s>
<s>
IBM	O
Cell	O
SPE	O
128	O
128	O
GPRs	B-General_Concept
,	O
which	O
can	O
hold	O
integer	O
,	O
address	O
,	O
or	O
floating-point	B-Algorithm
values	O
PDP-10	B-Device
16	O
All	O
of	O
the	O
registers	O
may	O
be	O
used	O
generally	O
(	O
integer	O
,	O
float	B-Algorithm
,	O
stack	B-Application
pointer	O
,	O
jump	O
,	O
indexing	O
,	O
etc	O
.	O
)	O
.	O
</s>
<s>
In	O
the	O
original	O
PDP-10	B-Device
processors	O
,	O
these	O
16	O
GPRs	B-General_Concept
also	O
corresponded	O
to	O
main	O
(	O
i.e.	O
</s>
<s>
core	O
)	O
memory	B-General_Concept
locations	I-General_Concept
0	O
–	O
15	O
;	O
a	O
hardware	O
option	O
called	O
"	O
fast	O
memory	O
"	O
implemented	O
the	O
registers	O
as	O
separate	O
ICs	O
,	O
and	O
references	O
to	O
memory	B-General_Concept
locations	I-General_Concept
0	O
–	O
15	O
referred	O
to	O
the	O
IC	O
registers	O
.	O
</s>
<s>
Later	O
models	O
implemented	O
the	O
registers	O
as	O
"	O
fast	O
memory	O
"	O
and	O
continued	O
to	O
make	O
memory	B-General_Concept
locations	I-General_Concept
0	O
–	O
15	O
refer	O
to	O
them	O
.	O
</s>
<s>
(	O
if	O
FPP	O
present	O
)	O
R7	O
is	O
the	O
program	B-General_Concept
counter	I-General_Concept
.	O
</s>
<s>
Any	O
register	O
can	O
be	O
a	O
stack	B-Application
pointer	O
but	O
R6	O
is	O
used	O
for	O
hardware	O
interrupts	O
and	O
traps	O
.	O
</s>
<s>
VAX	B-Device
16	O
The	O
GPRs	B-General_Concept
are	O
used	O
for	O
floating-point	B-Algorithm
values	O
as	O
well	O
.	O
</s>
<s>
Three	O
of	O
the	O
registers	O
have	O
special	O
uses	O
:	O
R12	O
(	O
Argument	O
Pointer	O
)	O
,	O
R13	O
(	O
Frame	O
Pointer	O
)	O
,	O
and	O
R14	O
(	O
Stack	B-Application
Pointer	O
)	O
,	O
while	O
R15	O
refers	O
to	O
the	O
Program	B-General_Concept
Counter	I-General_Concept
.	O
</s>
<s>
Alpha	B-Device
31	O
31	O
Registers	O
R31	O
(	O
integer	O
)	O
and	O
F31	O
(	O
floating-point	B-Algorithm
)	O
are	O
hardwired	O
to	O
zero	O
.	O
</s>
<s>
6502	B-General_Concept
1	O
data	O
,	O
2	O
index	O
0	O
6502	B-General_Concept
's	O
content	O
A	O
(	O
Accumulator	B-General_Concept
)	O
register	O
for	O
main	O
purpose	O
data	O
store	O
and	O
memory	B-General_Concept
address	I-General_Concept
(	O
8-bit	O
data/16	O
-bit	O
address	O
)	O
,	O
X	O
and	O
Y	O
are	O
indirect	O
and	O
direct	O
index	B-General_Concept
registers	I-General_Concept
(	O
respectively	O
)	O
and	O
the	O
SP	O
registers	O
are	O
specific	O
index	O
only	O
.	O
</s>
<s>
W65C816S	B-General_Concept
1	O
0	O
65c816	B-General_Concept
is	O
the	O
16-bit	O
successor	O
of	O
the	O
6502	B-General_Concept
.	O
</s>
<s>
Main	O
accumulator	B-General_Concept
extended	O
to	O
16-bit	O
(	O
C	O
)	O
while	O
keeping	O
8-bit	O
(	O
A	O
)	O
for	O
compatibility	O
and	O
main	O
registers	O
can	O
now	O
address	O
up	O
to	O
24-bit	O
(	O
16-bit	O
wide	O
data	O
instruction/24	O
-bit	O
memory	B-General_Concept
address	I-General_Concept
)	O
.	O
</s>
<s>
MeP	B-General_Concept
4	O
8	O
Media-embedded	B-General_Concept
processor	I-General_Concept
was	O
a	O
32-bit	O
processor	O
developed	O
by	O
Toshiba	O
with	O
a	O
modded	O
8080	B-General_Concept
instruction	B-General_Concept
set	I-General_Concept
.	O
</s>
<s>
It	O
is	O
incompatible	O
with	O
x86	B-Operating_System
;	O
however	O
,	O
it	O
contains	O
an	O
80-bit	O
floating-point	B-General_Concept
unit	I-General_Concept
that	O
is	O
x87-compatible	O
.	O
</s>
<s>
(	O
up	O
to	O
32	O
)	O
r15	O
is	O
the	O
program	B-General_Concept
counter	I-General_Concept
,	O
and	O
not	O
usable	O
as	O
a	O
GPR	B-General_Concept
;	O
r13	O
is	O
the	O
stack	B-Application
pointer	O
;	O
r8	O
–	O
r13	O
can	O
be	O
switched	O
out	O
for	O
others	O
(	O
banked	O
)	O
on	O
a	O
processor	O
mode	O
switch	O
.	O
</s>
<s>
Older	O
versions	O
had	O
26-bit	O
addressing	O
,	O
and	O
used	O
upper	O
bits	O
of	O
the	O
program	B-General_Concept
counter	I-General_Concept
(	O
r15	O
)	O
for	O
status	O
flags	O
,	O
making	O
that	O
register	O
32-bit	O
.	O
</s>
<s>
ARM	B-Architecture
32-bit	O
(	O
Thumb	O
)	O
8	O
16	O
Version	O
1	O
of	O
Thumb	O
,	O
which	O
only	O
supported	O
access	O
to	O
registers	O
r0	O
through	O
r7	O
ARM	B-Architecture
64-bit	B-Device
(	O
A64	O
)	O
31	O
32	O
Register	O
r31	O
is	O
the	O
stack	B-Application
pointer	O
or	O
hardwired	O
to	O
0	O
,	O
depending	O
on	O
the	O
context	O
.	O
</s>
<s>
MIPS	B-Device
31	O
32	O
Integer	O
register	O
0	O
is	O
hardwired	O
to	O
0	O
.	O
</s>
<s>
RISC-V	B-Device
31	O
32	O
Integer	O
register	O
0	O
hardwired	O
to	O
0	O
.	O
</s>
<s>
Epiphany	B-Application
64	O
(	O
per	O
core	O
)	O
Each	O
instruction	O
controls	O
whether	O
registers	O
are	O
interpreted	O
as	O
integers	O
or	O
single	O
precision	O
floating	B-Algorithm
point	I-Algorithm
.	O
</s>
<s>
The	O
number	O
of	O
registers	O
available	O
on	O
a	O
processor	O
and	O
the	O
operations	O
that	O
can	O
be	O
performed	O
using	O
those	O
registers	O
has	O
a	O
significant	O
impact	O
on	O
the	O
efficiency	B-General_Concept
of	O
code	O
generated	O
by	O
optimizing	B-Application
compilers	I-Application
.	O
</s>
