<s>
The	O
PowerPC	B-Device
7xx	I-Device
is	O
a	O
family	O
of	O
third	O
generation	O
32-bit	O
PowerPC	B-Architecture
microprocessors	B-Architecture
designed	O
and	O
manufactured	O
by	O
IBM	O
and	O
Motorola	O
(	O
spun	O
off	O
as	O
Freescale	O
Semiconductor	O
bought	O
by	O
NXP	O
Semiconductors	O
)	O
.	O
</s>
<s>
This	O
family	O
is	O
called	O
the	O
PowerPC	B-Device
G3	I-Device
by	O
Apple	O
Computer	O
(	O
later	O
Apple	O
Inc	O
.	O
)	O
,	O
which	O
introduced	O
it	O
on	O
November	O
10	O
,	O
1997	O
.	O
</s>
<s>
The	O
term	O
"	O
PowerPC	B-Device
G3	I-Device
"	O
is	O
often	O
,	O
and	O
incorrectly	O
,	O
imagined	O
to	O
be	O
a	O
microprocessor	B-Architecture
when	O
in	O
fact	O
a	O
number	O
of	O
microprocessors	B-Architecture
from	O
different	O
vendors	O
have	O
been	O
used	O
.	O
</s>
<s>
Such	O
designations	O
were	O
applied	O
to	O
Mac	B-Device
computers	I-Device
such	O
as	O
the	O
PowerBook	B-Device
G3	I-Device
,	O
the	O
multicolored	B-Device
iMacs	I-Device
,	O
iBooks	B-Device
and	O
several	O
desktops	O
,	O
including	O
both	O
the	O
Beige	B-Device
and	O
Blue	B-Device
and	I-Device
White	I-Device
Power	I-Device
Macintosh	I-Device
G3s	I-Device
.	O
</s>
<s>
The	O
low	O
power	O
requirements	O
and	O
small	O
size	O
made	O
the	O
processors	O
ideal	O
for	O
laptops	O
and	O
the	O
name	O
lived	O
out	O
its	O
last	O
days	O
at	O
Apple	O
in	O
the	O
iBook	B-Device
.	O
</s>
<s>
The	O
7xx	O
family	O
had	O
its	O
shortcomings	O
,	O
namely	O
lack	O
of	O
SMP	B-Operating_System
support	O
and	O
SIMD	B-Device
capabilities	O
and	O
a	O
relatively	O
weak	O
FPU	B-General_Concept
.	O
</s>
<s>
Motorola	O
's	O
74xx	B-General_Concept
range	O
of	O
processors	O
picked	O
up	O
where	O
the	O
7xx	O
left	O
off	O
.	O
</s>
<s>
The	O
PowerPC	B-Architecture
740	O
and	O
750	O
(	O
codename	O
Arthur	O
)	O
were	O
introduced	O
in	O
late	O
1997	O
as	O
an	O
evolutionary	O
replacement	O
for	O
the	O
PowerPC	B-Architecture
603e	O
.	O
</s>
<s>
Enhancements	O
included	O
a	O
faster	O
60x	O
system	O
bus	O
(	O
66MHz	O
)	O
,	O
larger	O
L1	O
caches	O
(	O
32	O
KB	O
instruction	O
and	O
32	O
KB	O
data	O
)	O
,	O
a	O
second	O
integer	O
unit	O
,	O
an	O
enhanced	O
floating	B-General_Concept
point	I-General_Concept
unit	I-General_Concept
,	O
and	O
higher	O
core	O
frequency	O
.	O
</s>
<s>
The	O
740	O
and	O
750	O
added	O
dynamic	B-General_Concept
branch	I-General_Concept
prediction	I-General_Concept
and	O
a	O
64-entry	O
branch	O
target	O
instruction	O
cache	O
(	O
BTIC	O
)	O
.	O
</s>
<s>
Dynamic	B-General_Concept
branch	I-General_Concept
prediction	I-General_Concept
uses	O
the	O
recorded	O
outcome	O
of	O
a	O
branch	O
stored	O
in	O
a	O
512-entry	O
by	O
2-bit	O
branch	O
history	O
table	O
(	O
BHT	O
)	O
to	O
predict	O
its	O
outcome	O
.	O
</s>
<s>
The	O
740	O
slightly	O
outperformed	O
the	O
Pentium	B-General_Concept
II	I-General_Concept
while	O
consuming	O
far	O
less	O
power	O
and	O
with	O
a	O
smaller	O
die	O
.	O
</s>
<s>
The	O
design	O
was	O
so	O
successful	O
that	O
it	O
quickly	O
surpassed	O
the	O
PowerPC	B-Architecture
604e	O
in	O
integer	O
performance	O
,	O
causing	O
a	O
planned	O
604	O
successor	O
to	O
be	O
scrapped	O
.	O
</s>
<s>
The	O
PowerPC	B-Architecture
740	O
is	O
completely	O
pin	O
compatible	O
with	O
the	O
older	O
603	O
,	O
allowing	O
upgrades	O
to	O
the	O
PowerBook	O
1400	O
,	O
2400	O
,	O
and	O
even	O
a	O
prototype	O
PowerBook	O
500/G3	O
.	O
</s>
<s>
The	O
750	O
with	O
its	O
L2	O
cache	O
bus	O
required	O
more	O
pins	O
and	O
thus	O
a	O
different	O
package	O
,	O
a	O
360-pin	O
ball	B-Algorithm
grid	I-Algorithm
array	I-Algorithm
(	O
BGA	O
)	O
.	O
</s>
<s>
The	O
PowerPC	B-Architecture
750	O
was	O
used	O
in	O
many	O
computers	O
from	O
Apple	O
,	O
including	O
the	O
original	O
iMac	B-Device
.	O
</s>
<s>
The	O
RAD750	O
is	O
a	O
radiation-hardened	O
processor	O
,	O
based	O
on	O
the	O
PowerPC	B-Architecture
750	O
.	O
</s>
<s>
It	O
is	O
intended	O
for	O
use	O
in	O
high	O
radiation	O
environments	O
such	O
as	O
experienced	O
on	O
board	O
satellites	B-Application
and	O
other	O
spacecraft	O
.	O
</s>
<s>
The	O
RAD750	O
packaging	O
and	O
logic	O
functions	O
has	O
a	O
price	O
tag	O
in	O
excess	O
of	O
US$	O
200,000	O
:	O
the	O
high	O
price	O
is	O
mainly	O
due	O
to	O
radiation	O
hardening	O
revisions	O
to	O
the	O
PowerPC	B-Architecture
750	O
architecture	O
and	O
manufacturing	O
,	O
stringent	O
quality	O
control	O
requirements	O
,	O
and	O
extended	O
testing	O
of	O
each	O
processor	O
chip	O
manufactured	O
.	O
</s>
<s>
The	O
755	O
was	O
used	O
in	O
some	O
iBook	B-Device
models	O
.	O
</s>
<s>
After	O
this	O
model	O
,	O
Motorola	O
chose	O
not	O
to	O
keep	O
developing	O
the	O
750	O
processors	O
in	O
favour	O
of	O
their	O
PowerPC	B-General_Concept
7400	I-General_Concept
processor	O
and	O
other	O
cores	O
.	O
</s>
<s>
IBM	O
continued	O
to	O
develop	O
the	O
PowerPC	B-Architecture
750	O
line	O
and	O
introduced	O
the	O
PowerPC	B-Architecture
750CX	O
(	O
code-named	O
Sidewinder	O
)	O
in	O
2000	O
.	O
</s>
<s>
The	O
750CX	O
was	O
only	O
used	O
in	O
one	O
iMac	B-Device
and	O
iBook	B-Device
revision	O
.	O
</s>
<s>
Several	O
iBook	B-Device
models	O
and	O
the	O
last	O
G3-based	O
iMac	B-Device
have	O
this	O
processor	O
.	O
</s>
<s>
Gekko	O
is	O
the	O
IBM	O
's	O
custom	O
central	O
processor	O
for	O
the	O
Nintendo	B-Application
GameCube	I-Application
game	O
console	O
.	O
</s>
<s>
Based	O
on	O
a	O
PowerPC	B-Architecture
750CXe	O
,	O
it	O
adds	O
about	O
50	O
new	O
instructions	O
and	O
a	O
modified	O
FPU	B-General_Concept
capable	O
of	O
some	O
SIMD	B-Device
functionality	O
.	O
</s>
<s>
It	O
is	O
manufactured	O
using	O
a	O
0.13	O
μm	O
copper	O
based	O
fabrication	O
with	O
Low-K	B-Algorithm
dielectric	I-Algorithm
and	O
Silicon	B-Algorithm
on	I-Algorithm
insulator	I-Algorithm
technology	O
.	O
</s>
<s>
It	O
was	O
the	O
last	O
G3	O
type	O
processor	O
used	O
by	O
Apple	O
(	O
employed	O
on	O
the	O
iBook	B-Device
G3	I-Device
)	O
.	O
</s>
<s>
It	O
is	O
manufactured	O
using	O
a	O
0.13μm	O
process	O
with	O
copper	O
interconnects	O
,	O
low-K	B-Algorithm
dielectric	I-Algorithm
,	O
and	O
silicon	B-Algorithm
on	I-Algorithm
insulator	I-Algorithm
technology	O
.	O
</s>
<s>
It	O
would	O
be	O
the	O
most	O
powerful	O
and	O
featured	O
version	O
to	O
date	O
with	O
up	O
to	O
4MB	O
of	O
off	O
die	O
L3	O
cache	O
,	O
a	O
400Mhz	O
DDR	O
front	O
side	O
bus	O
and	O
the	O
same	O
implementation	O
of	O
AltiVec	B-General_Concept
used	O
in	O
the	O
PowerPC	B-General_Concept
970	I-General_Concept
.	O
</s>
<s>
It	O
was	O
reported	O
to	O
be	O
finished	O
and	O
ready	O
for	O
production	O
in	O
December	O
2003	O
,	O
but	O
said	O
timing	O
was	O
too	O
late	O
for	O
it	O
to	O
get	O
significant	O
orders	O
seeing	O
Apple	O
's	O
iBook	B-Device
line	O
had	O
switched	O
to	O
G4s	O
in	O
October	O
the	O
same	O
year	O
,	O
and	O
thus	O
it	O
quickly	O
fell	O
off	O
the	O
roadmap	O
.	O
</s>
<s>
The	O
750CL	O
is	O
manufactured	O
using	O
a	O
90nm	O
copper	O
based	O
fabrication	O
with	O
Low-K	B-Algorithm
dielectric	I-Algorithm
and	O
Silicon	B-Algorithm
on	I-Algorithm
insulator	I-Algorithm
technology	O
and	O
features	O
20	O
million	O
transistors	O
on	O
a	O
16mm2	O
die	O
.	O
</s>
<s>
The	O
CPU	O
in	O
Wii	B-Operating_System
is	O
virtually	O
identical	O
to	O
the	O
750CL	O
but	O
it	O
runs	O
at	O
729MHz	O
,	O
a	O
frequency	O
not	O
supported	O
by	O
stock	O
750CL	O
.	O
</s>
<s>
This	O
is	O
smaller	O
than	O
half	O
the	O
size	O
of	O
the	O
"	O
Gekko	O
"	O
microprocessor	B-Architecture
(	O
43mm2	O
)	O
incorporated	O
in	O
the	O
GameCube	B-Application
at	O
its	O
first	O
release	O
.	O
</s>
<s>
The	O
CPU	O
in	O
Wii	B-Device
U	I-Device
is	O
believed	O
to	O
be	O
an	O
evolution	O
of	O
the	O
Broadway	O
architecture	O
.	O
</s>
<s>
In	O
particular	O
,	O
IBM	O
has	O
no	O
public	O
plans	O
to	O
produce	O
an	O
ordinary	O
750-based	O
microprocessor	B-Architecture
in	O
a	O
process	O
smaller	O
than	O
90	O
nm	O
,	O
effectively	O
phasing	O
it	O
out	O
as	O
a	O
commodity	O
chip	O
competitive	O
in	O
such	O
markets	O
as	O
networking	O
equipment	O
.	O
</s>
<s>
Freescale	O
has	O
discontinued	O
all	O
750	O
designs	O
in	O
favor	O
of	O
designs	O
based	O
on	O
the	O
PowerPC	B-General_Concept
e500	I-General_Concept
core	O
(	O
PowerQUICC	B-General_Concept
III	I-General_Concept
)	O
.	O
</s>
<s>
Name	O
Codename	O
Manufacturer	O
Image	O
Fab	O
Process	O
Transistors	O
Die	O
size	O
Cores	O
CPU	O
Clock	O
Front	O
Side	O
Bus	O
L2	O
cache	O
Consumption	O
Package	O
Introduced	O
PPC740MPC740	O
Arthur	O
IBMMotorola	O
100px	O
0.25	O
μm	O
Al	O
6.35	O
Million	O
67	O
mm2	O
1	O
233	O
-	O
366	O
MHz	O
66	O
MHz	O
No	O
L2	O
cache	O
7.3W	O
@	O
366	O
MHz	O
255	O
pin	O
CBGA	O
1997	O
PPC750MPC750	O
Arthur	O
IBMMotorola	O
100px	O
0.25	O
μm	O
Al	O
6.35	O
Million	O
67	O
mm2	O
1	O
233	O
-	O
366	O
MHz	O
66	O
MHz	O
256	O
-	O
1024	O
kBoff-diehalf	O
speed	O
7.3W	O
@	O
366	O
MHz	O
360	O
pin	O
CBGA	O
1997	O
MPC745	O
Conan	O
MotorolaFreescale	O
100px	O
0.22	O
μm	O
Al	O
6.75	O
Million	O
51	O
mm2	O
1	O
300	O
-	O
350	O
MHz	O
66	O
MHz	O
No	O
L2	O
cache	O
5.4W	O
@	O
400	O
MHz	O
255	O
pin	O
PBGA	B-Algorithm
1998	O
MPC755	O
Doyle	O
MotorolaFreescale	O
100px	O
0.22	O
μm	O
Al	O
6.75	O
Million	O
51	O
mm2	O
1	O
300	O
-	O
400	O
MHz	O
66	O
MHz	O
256	O
-	O
1024	O
kBoff-diehalf	O
speed	O
5.4W	O
@	O
400	O
MHzMPC755	O
RISC	O
Microprocessor	B-Architecture
Hardware	O
Specifications	O
,	O
page	O
11	O
360	O
pin	O
PBGA360	O
pin	O
CBGA	O
1998	O
PPC740L	O
Lonestar	O
IBM	O
100px	O
0.20	O
μm	O
Cu	O
6.35	O
Million	O
40	O
mm2	O
1	O
300	O
-	O
533	O
MHz	O
100	O
MHz	O
No	O
L2	O
cache	O
6W	O
@	O
500	O
MHz	O
255	O
pin	O
CBGA	O
1999	O
PPC750L	O
Lonestar	O
IBM	O
100px	O
0.20	O
μm	O
Cu	O
6.35	O
Million	O
40	O
mm2	O
1	O
300	O
-	O
533	O
MHzPPC740L	O
and	O
PPC750L	O
-	O
Page	O
13	O
100	O
MHz	O
256	O
-	O
1024	O
kBoff-diehalf	O
speed	O
6W	O
@	O
500	O
MHzPPC750L	O
vs	O
PPC750CXe	O
-	O
Page	O
6	O
360	O
pin	O
CBGA	O
1999	O
PPC750CXPPC750CXePPC750CXrPPCDBK	O
SidewinderAnacondaGekko	O
IBM	O
100px	O
0.18	O
μm	O
Cu	O
20	O
Million(including L2 cache )	O
42.7	O
mm2	O
1	O
350	O
-	O
600	O
MHz366	O
-	O
700	O
MHz300	O
-	O
533	O
MHz486	O
MHz	O
100	O
MHz133	O
MHz133	O
MHz162	O
MHz	O
256	O
kB	O
4.2W	O
@	O
400	O
MHzPPC	O
750CX	O
Supplement	O
to	O
the	O
PPC	O
750	O
User	O
Manual	O
-	O
Page	O
36	O
W	O
@	O
600	O
MHzPPC	O
750CXe	O
Data	O
Sheet	O
-	O
Page	O
97.8	O
W	O
@	O
533	O
MHzPPC	O
750CXr	O
Data	O
Sheet	O
-	O
Page	O
174.9W	O
@	O
486	O
MHz	O
256	O
pin	O
PBGA	B-Algorithm
2000200120032001	O
RAD750	O
BAE	O
Systems	O
100px	O
0.25	O
μm	O
-	O
0.15	O
μm	O
10.4	O
Million	O
130	O
mm2	O
1	O
110	O
-	O
200	O
MHz	O
66	O
MHzRAD750	O
SpaceWire-enabled	O
Flight	O
Computer	O
for	O
Lunar	O
Reconnaissance	O
Orbiter	O
0	O
-	O
1024	O
kBoff-die	O
5	O
W	O
@	O
133	O
MHz	O
360	O
pin	O
CBGARadiation	O
hardened	O
2001	O
PPC750FXPPC750FL	O
Sahara	O
IBM	O
100px	O
0.13	O
μm	O
SOI	O
38	O
Million(including L2 cache )	O
34.3	O
mm2	O
1	O
600	O
-	O
900	O
MHz600	O
-	O
733	O
MHz	O
166	O
MHz	O
512	O
kB	O
5.4	O
W	O
@	O
800	O
MHzPPC	O
750FX	O
and	O
PPC750GX	O
Power	O
Dissipation	O
-	O
Page	O
135.1	O
W	O
@	O
733	O
MHzPPC	O
750FL	O
Data	O
Sheet	O
-	O
Page	O
19	O
292	O
pin	O
CBGA	O
20022007	O
PPC750GXPPC750GL	O
Gobi	O
IBM	O
100px	O
0.13	O
μm	O
SOI	O
74	O
Million(including L2 cache )	O
52.5	O
mm2	O
1	O
733	O
-	O
1000	O
MHz800	O
-	O
933	O
MHz	O
200	O
MHz	O
1024	O
kB	O
8.3	O
W	O
@	O
1000	O
MHzPPC	O
750GX	O
Data	O
Sheet	O
-	O
Page	O
176.5	O
W@	O
933	O
MHz	O
PPC	O
750GL	O
Data	O
Sheet	O
-	O
Page	O
17	O
292	O
pin	O
CBGA	O
20032005	O
PPC750CLBroadway	O
IBM	O
100px	O
90	O
nm90	O
nm	O
,	O
65	O
nm	O
SOI	O
20	O
Million(including L2 cache )	O
15.9	O
mm2	O
1	O
400	O
-	O
1000	O
MHz729	O
MHz	O
240	O
MHz	O
243	O
MHz	O
256	O
kB	O
10.5	O
W	O
(	O
max	O
)	O
@	O
1	O
GHzPPC	O
750CL	O
Revision	O
Level	O
DD2.x	O
-	O
Page	O
243.9	O
W	O
@	O
729	O
MHz	O
"	O
20	O
percent	O
reduction	O
in	O
energy	O
consumption	O
[	O
over	O
Gekko	O
's	O
4.9	O
W	O
Power	O
Rating ]	O
"	O
278	O
pin	O
PBGA	B-Algorithm
2006	O
Espresso	O
IBM	O
100px	O
45	O
nm	O
SOI	O
60	O
Million	O
(	O
?	O
)	O
</s>
