<s>
The	O
PlayStation	B-Device
technical	I-Device
specifications	I-Device
describe	O
the	O
various	O
components	O
of	O
the	O
original	B-Device
PlayStation	I-Device
video	B-Algorithm
game	O
console	O
.	O
</s>
<s>
MIPS	O
R3000A-compatible	O
32-bit	O
RISC	B-Architecture
CPU	B-General_Concept
MIPS	O
R3051	B-Device
with	O
5KB	O
L1cache	O
,	O
running	O
at	O
33.8688MHz	O
.	O
</s>
<s>
The	O
microprocessor	B-Architecture
was	O
manufactured	O
by	O
LSI	O
Logic	O
Corp	O
.	O
with	O
technology	O
licensed	O
from	O
SGI	O
.	O
</s>
<s>
CPU	B-General_Concept
cache	I-General_Concept
RAM	I-General_Concept
:	O
</s>
<s>
Coprocessor	O
that	O
resides	O
inside	O
the	O
main	O
CPU	B-General_Concept
processor	O
,	O
giving	O
it	O
additional	O
vector	O
math	O
instructions	O
used	O
for	O
3D	O
graphics	O
,	O
lighting	O
,	O
geometry	O
,	O
polygon	B-General_Concept
and	O
coordinate	O
transformations	O
GTE	O
performs	O
high-speed	O
matrix	O
multiplications	O
.	O
</s>
<s>
Polygons	B-General_Concept
per	O
second	O
(	O
rendered	O
in	O
hardware	O
)	O
:	O
</s>
<s>
Also	O
residing	O
within	O
the	O
main	O
CPU	B-General_Concept
,	O
enables	O
full	O
screen	O
,	O
high	B-General_Concept
quality	I-General_Concept
FMV	O
playback	O
and	O
is	O
responsible	O
for	O
decompressing	B-General_Concept
images	B-General_Concept
and	O
video	B-Algorithm
into	O
VRAM	O
.	O
</s>
<s>
Documented	O
device	O
mode	O
is	O
to	O
read	O
three	O
RLE-encoded	O
16×16	O
macroblocks	B-General_Concept
,	O
run	O
IDCT	B-General_Concept
and	O
assemble	O
a	O
single	O
16×16	O
RGB	O
macroblock	B-General_Concept
.	O
</s>
<s>
Output	O
data	O
may	O
be	O
transferred	O
directly	O
to	O
GPU	B-Architecture
via	O
DMA	B-General_Concept
.	O
</s>
<s>
It	O
is	O
possible	O
to	O
overwrite	O
IDCT	B-General_Concept
matrix	O
and	O
some	O
additional	O
parameters	O
,	O
however	O
MDEC	O
internal	O
instruction	O
set	O
was	O
never	O
documented	O
.	O
</s>
<s>
It	O
is	O
directly	O
connected	O
to	O
a	O
CPU	B-General_Concept
bus	B-General_Concept
.	O
</s>
<s>
This	O
unit	O
is	O
part	O
of	O
the	O
CPU	B-General_Concept
.	O
</s>
<s>
Modified	O
from	O
the	O
original	O
R3000A	B-Device
cop0	O
architecture	O
,	O
with	O
the	O
addition	O
of	O
a	O
few	O
registers	O
and	O
functions	O
.	O
</s>
<s>
Controls	O
memory	O
management	O
through	O
virtual	O
memory	O
technique	O
,	O
system	O
interrupts	B-Application
,	O
exception	B-General_Concept
handling	I-General_Concept
,	O
and	O
breakpoints	O
.	O
</s>
<s>
Additional	O
RAM	O
is	O
integrated	O
with	O
the	O
GPU	B-Architecture
(	O
including	O
a	O
1MB	O
framebuffer	B-Algorithm
)	O
and	O
SPU	O
(	O
512KB	O
)	O
,	O
see	O
below	O
for	O
details	O
.	O
</s>
<s>
Cache	O
RAM	O
for	O
CPU	B-General_Concept
core	O
and	O
CD-ROM	B-Device
.	O
</s>
<s>
Resolutions	B-General_Concept
:	O
</s>
