<s>
The	O
Platform	B-Device
Controller	I-Device
Hub	I-Device
(	O
PCH	O
)	O
is	O
a	O
family	O
of	O
Intel	O
's	O
single-chip	O
chipsets	B-Device
,	O
first	O
introduced	O
in	O
2009	O
.	O
</s>
<s>
It	O
is	O
the	O
successor	O
to	O
the	O
Intel	B-Architecture
Hub	I-Architecture
Architecture	I-Architecture
,	O
which	O
used	O
two	O
chipsa	O
northbridge	B-Device
and	O
southbridge	B-Device
,	O
and	O
first	O
appeared	O
in	O
the	O
Intel	B-Device
5	I-Device
Series	I-Device
.	O
</s>
<s>
The	O
PCH	O
controls	O
certain	O
data	O
paths	O
and	O
support	O
functions	O
used	O
in	O
conjunction	O
with	O
Intel	O
CPUs	B-Device
.	O
</s>
<s>
These	O
include	O
clocking	O
(	O
the	O
system	B-Operating_System
clock	I-Operating_System
)	O
,	O
Flexible	B-Device
Display	I-Device
Interface	I-Device
(	O
FDI	O
)	O
and	O
Direct	B-Architecture
Media	I-Architecture
Interface	I-Architecture
(	O
DMI	B-Architecture
)	O
,	O
although	O
FDI	O
is	O
used	O
only	O
when	O
the	O
chipset	B-Device
is	O
required	O
to	O
support	O
a	O
processor	O
with	O
integrated	O
graphics	O
.	O
</s>
<s>
As	O
such	O
,	O
I/O	O
functions	O
are	O
reassigned	O
between	O
this	O
new	O
central	O
hub	O
and	O
the	O
CPU	B-Device
compared	O
to	O
the	O
previous	O
architecture	O
:	O
some	O
northbridge	B-Device
functions	O
,	O
the	O
memory	O
controller	O
and	O
PCIe	O
lanes	O
,	O
were	O
integrated	O
into	O
the	O
CPU	B-Device
while	O
the	O
PCH	O
took	O
over	O
the	O
remaining	O
functions	O
in	O
addition	O
to	O
the	O
traditional	O
roles	O
of	O
the	O
southbridge	B-Device
.	O
</s>
<s>
AMD	O
has	O
its	O
equivalent	O
for	O
the	O
PCH	O
,	O
known	O
simply	O
as	O
a	O
chipset	B-Device
,	O
no	O
longer	O
using	O
the	O
previous	O
term	O
Fusion	O
controller	O
hub	O
since	O
the	O
release	O
of	O
the	O
Zen	O
architecture	O
in	O
2017	O
.	O
</s>
<s>
The	O
PCH	O
architecture	O
supersedes	O
Intel	O
's	O
previous	O
Hub	B-Architecture
Architecture	I-Architecture
,	O
with	O
its	O
design	O
addressing	O
the	O
eventual	O
problematic	O
performance	O
bottleneck	O
between	O
the	O
processor	O
and	O
the	O
motherboard	B-Device
.	O
</s>
<s>
Over	O
time	O
,	O
the	O
speed	O
of	O
CPUs	B-Device
kept	O
increasing	O
but	O
the	O
bandwidth	O
of	O
the	O
front-side	B-Architecture
bus	I-Architecture
(	O
FSB	O
)	O
(	O
connection	O
between	O
the	O
CPU	B-Device
and	O
the	O
motherboard	B-Device
)	O
did	O
not	O
,	O
resulting	O
in	O
a	O
performance	O
bottleneck	O
.	O
</s>
<s>
Under	O
the	O
Hub	B-Architecture
Architecture	I-Architecture
,	O
a	O
motherboard	B-Device
would	O
have	O
a	O
two	O
piece	O
chipset	B-Device
consisting	O
of	O
a	O
northbridge	B-Device
chip	I-Device
and	O
a	O
southbridge	B-Device
chip	O
.	O
</s>
<s>
As	O
a	O
solution	O
to	O
the	O
bottleneck	O
,	O
several	O
functions	O
belonging	O
to	O
the	O
traditional	O
northbridge	B-Device
and	O
southbridge	B-Device
chipsets	B-Device
were	O
rearranged	O
.	O
</s>
<s>
The	O
northbridge	B-Device
and	O
its	O
functions	O
are	O
now	O
eliminated	O
completely	O
:	O
The	O
memory	O
controller	O
,	O
PCI	O
Express	O
lanes	O
for	O
expansion	B-Device
cards	I-Device
and	O
other	O
northbridge	B-Device
functions	O
are	O
now	O
incorporated	O
into	O
the	O
CPU	B-Device
die	O
as	O
a	O
system	B-General_Concept
agent	I-General_Concept
(	O
Intel	O
)	O
or	O
packaged	O
in	O
the	O
processor	O
on	O
an	O
I/O	O
die	O
(	O
AMD	O
Zen	O
2	O
)	O
.	O
</s>
<s>
The	O
PCH	O
then	O
incorporates	O
a	O
few	O
of	O
the	O
remaining	O
northbridge	B-Device
functions	O
(	O
e.g.	O
</s>
<s>
clocking	O
)	O
in	O
addition	O
to	O
all	O
of	O
the	O
southbridge	B-Device
's	O
functions	O
,	O
replacing	O
it	O
.	O
</s>
<s>
The	O
system	B-Operating_System
clock	I-Operating_System
was	O
previously	O
a	O
connection	O
and	O
is	O
now	O
incorporated	O
into	O
the	O
PCH	O
.	O
</s>
<s>
Two	O
different	O
connections	O
exist	O
between	O
the	O
PCH	O
and	O
the	O
CPU	B-Device
:	O
Flexible	B-Device
Display	I-Device
Interface	I-Device
(	O
FDI	O
)	O
and	O
Direct	B-Architecture
Media	I-Architecture
Interface	I-Architecture
(	O
DMI	B-Architecture
)	O
.	O
</s>
<s>
The	O
FDI	O
is	O
used	O
only	O
when	O
the	O
chipset	B-Device
requires	O
supporting	O
a	O
processor	O
with	O
integrated	O
graphics	O
.	O
</s>
<s>
The	O
Intel	B-Device
Management	I-Device
Engine	I-Device
was	O
also	O
moved	O
to	O
the	O
PCH	O
starting	O
with	O
the	O
Nehalem	B-Device
processors	O
and	O
5-Series	B-Device
chipsets	B-Device
.	O
</s>
<s>
AMD	O
's	O
chipsets	B-Device
instead	O
use	O
several	O
PCIe	O
lanes	O
to	O
connect	O
with	O
the	O
CPU	B-Device
while	O
also	O
providing	O
their	O
own	O
PCIe	O
lanes	O
,	O
which	O
are	O
also	O
provided	O
by	O
the	O
processor	O
itself	O
.	O
</s>
<s>
With	O
the	O
northbridge	B-Device
functions	O
integrated	O
to	O
the	O
CPU	B-Device
,	O
much	O
of	O
the	O
bandwidth	O
needed	O
for	O
chipsets	B-Device
is	O
now	O
relieved	O
.	O
</s>
<s>
This	O
style	O
began	O
in	O
Nehalem	B-Device
and	O
will	O
remain	O
for	O
the	O
foreseeable	O
future	O
,	O
through	O
Cannon	B-Device
Lake	I-Device
.	O
</s>
<s>
Beginning	O
with	O
ultra-low-power	O
Broadwells	B-General_Concept
and	O
continuing	O
with	O
mobile	O
Skylake	B-Architecture
processors	O
,	O
Intel	O
incorporated	O
the	O
southbridge	B-Device
IO	O
controllers	O
into	O
the	O
CPU	B-Device
package	O
,	O
eliminating	O
the	O
PCH	O
for	O
a	O
system	B-Algorithm
in	I-Algorithm
package	I-Algorithm
(	O
SOP	O
)	O
design	O
with	O
two	O
dies	O
;	O
the	O
larger	O
die	O
being	O
the	O
CPU	B-Device
die	O
,	O
the	O
smaller	O
die	O
being	O
the	O
PCH	O
die	O
.	O
</s>
<s>
Rather	O
than	O
DMI	B-Architecture
,	O
these	O
SOPs	O
directly	O
expose	O
PCIe	O
lanes	O
,	O
as	O
well	O
as	O
SATA	O
,	O
USB	O
,	O
and	O
HDA	O
lines	O
from	O
integrated	O
controllers	O
,	O
and	O
SPI/I²C/UART/GPIO	O
lines	O
for	O
sensors	O
.	O
</s>
<s>
Like	O
PCH-compatible	O
CPUs	B-Device
,	O
they	O
continue	O
to	O
expose	O
DisplayPort	O
,	O
RAM	O
,	O
and	O
SMBus	B-Algorithm
lines	O
.	O
</s>
<s>
However	O
,	O
a	O
fully	O
integrated	O
voltage	O
regulator	O
will	O
be	O
absent	O
until	O
Cannon	B-Device
Lake	I-Device
.	O
</s>
<s>
The	O
Intel	B-Device
5	I-Device
Series	I-Device
chipsets	B-Device
were	O
the	O
first	O
to	O
introduce	O
a	O
PCH	O
.	O
</s>
<s>
Langwell	O
is	O
the	O
codename	O
of	O
a	O
PCH	O
in	O
the	O
Moorestown	B-Device
MID/smartphone	O
platform	O
.	O
</s>
<s>
for	O
Atom	B-Device
Lincroft	O
microprocessors	O
.	O
</s>
<s>
Tiger	O
Point	O
is	O
the	O
codename	O
of	O
a	O
PCH	O
in	O
the	O
Pine	O
Trail	O
netbook	O
platform	O
chipset	B-Device
for	O
Atom	B-Device
Pineview	O
microprocessors	O
.	O
</s>
<s>
Topcliff	O
is	O
the	O
codename	O
of	O
a	O
PCH	O
in	O
the	O
Queens	O
Bay	O
embedded	O
platform	O
chipset	B-Device
for	O
Atom	B-Device
Tunnel	O
Creek	O
microprocessors	O
.	O
</s>
<s>
It	O
connects	O
to	O
the	O
processor	O
via	O
PCIe	O
(	O
vs	O
.	O
DMI	B-Architecture
as	O
other	O
PCHs	O
do	O
)	O
.	O
</s>
<s>
Cougar	O
Point	O
is	O
the	O
codename	O
of	O
a	O
PCH	O
in	O
Intel	O
6	O
Series	O
chipsets	B-Device
for	O
mobile	O
,	O
desktop	O
,	O
and	O
workstation	O
/	O
server	O
platforms	O
.	O
</s>
<s>
It	O
is	O
most	O
closely	O
associated	O
with	O
Sandy	B-Device
Bridge	I-Device
processors	O
.	O
</s>
<s>
The	O
bug	O
was	O
present	O
in	O
revision	O
B2	O
of	O
the	O
chipsets	B-Device
,	O
and	O
was	O
fixed	O
with	O
B3	O
.	O
</s>
<s>
This	O
bug	O
was	O
especially	O
a	O
problem	O
with	O
the	O
H61	O
chipset	B-Device
,	O
which	O
only	O
had	O
3Gbit/s	O
SATA	O
ports	O
.	O
</s>
<s>
Nearly	O
all	O
produced	O
motherboards	B-Device
using	O
Cougar	O
Point	O
chipsets	B-Device
were	O
designed	O
to	O
handle	O
Sandy	B-Device
Bridge	I-Device
,	O
and	O
later	O
Ivy	B-Device
Bridge	I-Device
,	O
processors	O
.	O
</s>
<s>
ASRock	O
produced	O
one	O
motherboard	B-Device
for	O
LGA	B-Device
1156	I-Device
processors	O
,	O
based	O
on	O
P67	O
chipset	B-Device
,	O
the	O
P67	O
Transformer	O
.	O
</s>
<s>
It	O
exclusively	O
supports	O
Lynnfield	B-Device
Core	O
i5/i7	O
and	O
Xeon	B-Device
processors	O
,	O
using	O
LGA	B-Device
1156	I-Device
socket	O
.	O
</s>
<s>
After	O
revision	O
B2	O
of	O
Cougar	O
Point	O
chipsets	B-Device
was	O
recalled	O
,	O
ASRock	O
decided	O
not	O
to	O
update	O
the	O
P67	O
Transformer	O
motherboard	B-Device
,	O
and	O
was	O
discontinued	O
.	O
</s>
<s>
Some	O
small	O
Chinese	O
manufacturers	O
are	O
producing	O
LGA	B-Device
1156	I-Device
motherboards	B-Device
with	O
H61	O
chipset	B-Device
.	O
</s>
<s>
Whitney	O
Point	O
is	O
the	O
codename	O
of	O
a	O
PCH	O
in	O
the	O
Oak	O
Trail	O
tablet	O
platform	O
for	O
Atom	B-Device
Lincroft	O
microprocessors	O
.	O
</s>
<s>
Panther	O
Point	O
is	O
the	O
codename	O
of	O
a	O
PCH	O
in	O
Intel	O
7	O
Series	O
chipsets	B-Device
for	O
mobile	O
and	O
desktop	O
.	O
</s>
<s>
It	O
is	O
most	O
closely	O
associated	O
with	O
Ivy	B-Device
Bridge	I-Device
processors	O
.	O
</s>
<s>
These	O
chipsets	B-Device
(	O
except	O
PCH	O
HM75	O
)	O
have	O
integrated	O
USB	O
3.0	O
.	O
</s>
<s>
Patsburg	O
is	O
the	O
codename	O
of	O
a	O
PCH	O
in	O
Intel	O
7	O
Series	O
chipsets	B-Device
for	O
server	O
and	O
workstation	O
using	O
the	O
LGA	B-Device
2011	I-Device
socket	O
.	O
</s>
<s>
It	O
was	O
initially	O
launched	O
in	O
2011	O
as	O
part	O
of	O
Intel	B-Device
X79	I-Device
for	O
the	O
desktop	O
enthusiast	O
Sandy	B-Device
Bridge-E	I-Device
processors	O
in	O
Waimea	O
Bay	O
platforms	O
.	O
</s>
<s>
Patsburg	O
was	O
then	O
used	O
for	O
the	O
Sandy	B-Device
Bridge-EP	I-Device
server	O
platform	O
(	O
the	O
platform	O
was	O
codenamed	O
Romley	B-Device
and	O
the	O
CPUs	B-Device
codenamed	O
Jaketown	O
,	O
and	O
finally	O
branded	O
as	O
Xeon	B-Device
E5-2600	O
series	O
)	O
launched	O
in	O
early	O
2012	O
.	O
</s>
<s>
Launched	O
in	O
the	O
fall	O
of	O
2013	O
,	O
the	O
Ivy	O
Bridge-E/EP	O
processors	O
(	O
the	O
latter	O
branded	O
as	O
Xeon	B-Device
E5-2600	O
v2	O
series	O
)	O
also	O
work	O
with	O
Patsburg	O
,	O
typically	O
with	O
a	O
BIOS	O
update	O
.	O
</s>
<s>
Lynx	O
Point	O
is	O
the	O
codename	O
of	O
a	O
PCH	O
in	O
Intel	O
8	O
Series	O
chipsets	B-Device
,	O
most	O
closely	O
associated	O
with	O
Haswell	B-Device
processors	O
with	O
LGA	B-Device
1150	I-Device
socket	O
.	O
</s>
<s>
The	O
Lynx	O
Point	O
chipset	B-Device
connects	O
to	O
the	O
processor	O
primarily	O
over	O
the	O
Direct	B-Architecture
Media	I-Architecture
Interface	I-Architecture
(	O
DMI	B-Architecture
)	O
interface	O
.	O
</s>
<s>
In	O
addition	O
the	O
following	O
newer	O
variants	O
are	O
available	O
,	O
additionally	O
known	O
as	O
Wildcat	O
Point	O
,	O
which	O
also	O
support	O
Haswell	B-Device
Refresh	O
processors	O
:	O
</s>
<s>
This	O
issue	O
is	O
corrected	O
in	O
C2	O
stepping	B-General_Concept
level	I-General_Concept
of	O
the	O
Lynx	O
Point	O
chipset	B-Device
.	O
</s>
<s>
Wellsburg	O
is	O
the	O
codename	O
for	O
the	O
C610-series	O
PCH	O
,	O
supporting	O
the	O
Haswell-E	O
(	O
Core	B-Device
i7	I-Device
Extreme	O
)	O
,	O
Haswell-EP	O
(	O
Xeon	B-Device
E5-16xx	O
v3	O
and	O
Xeon	B-Device
E5-26xx	O
v3	O
)	O
,	O
and	O
Broadwell-EP	O
(	O
Xeon	B-Device
E5-26xx	O
v4	O
)	O
processors	O
.	O
</s>
<s>
(	O
PCH	B-Device
X99	I-Device
)	O
,	O
intended	O
for	O
enthusiasts	O
making	O
use	O
of	O
Intel	B-Device
Core	I-Device
i7	I-Device
59/69XX	O
processors	O
but	O
it	O
is	O
compatible	O
with	O
LGA	O
2011-3	O
Xeons	B-Device
.	O
</s>
<s>
Sunrise	O
Point	O
is	O
the	O
codename	O
of	O
a	O
PCH	O
in	O
Intel	O
100	O
Series	O
chipsets	B-Device
,	O
most	O
closely	O
associated	O
with	O
Skylake	B-Architecture
processors	O
with	O
LGA	B-Device
1151	I-Device
socket	O
.	O
</s>
<s>
Union	O
Point	O
is	O
the	O
codename	O
of	O
a	O
PCH	O
in	O
Intel	O
200	O
Series	O
chipsets	B-Device
,	O
most	O
closely	O
associated	O
with	O
Kaby	B-Device
Lake	I-Device
processors	O
with	O
LGA	B-Device
1151	I-Device
socket	O
.	O
</s>
<s>
Lewisburg	O
is	O
the	O
codename	O
for	O
the	O
C620-series	O
PCH	O
,	O
supporting	O
LGA	B-Device
2066	I-Device
socketed	O
Skylake-X/Kaby	O
Lake-X	O
processors	O
(	O
"	O
Skylake-W	O
"	O
Xeon	B-Device
)	O
.	O
</s>
<s>
Basin	O
Falls	O
is	O
the	O
codename	O
for	O
the	O
C400-series	O
PCH	O
,	O
supporting	O
Skylake-X/Kaby	O
Lake-X	O
processors	O
(	O
branded	O
Core	B-Device
i9	I-Device
Extreme	O
and	O
"	O
Skylake-W	O
"	O
Xeon	B-Device
)	O
.	O
</s>
<s>
(	O
PCH	B-Device
X299	I-Device
)	O
,	O
intended	O
for	O
enthusiasts	O
making	O
use	O
of	O
Intel	B-Device
Core	I-Device
i9	I-Device
76-79XX	O
processors	O
but	O
it	O
is	O
compatible	O
with	O
LGA	B-Device
2066	I-Device
Xeons	B-Device
.	O
</s>
<s>
Cannon	O
Point	O
is	O
the	O
codename	O
of	O
a	O
PCH	O
in	O
Intel	O
300	O
Series	O
chipsets	B-Device
,	O
most	O
closely	O
associated	O
with	O
Coffee	B-Device
Lake	I-Device
processors	O
with	O
LGA	B-Device
1151	I-Device
socket	O
.	O
</s>
