<s>
Plasma-immersion	B-Algorithm
ion	I-Algorithm
implantation	I-Algorithm
(	O
PIII	O
)	O
or	O
pulsed-plasma	O
doping	O
(	O
pulsed	O
PIII	O
)	O
is	O
a	O
surface	O
modification	O
technique	O
of	O
extracting	O
the	O
accelerated	O
ions	O
from	O
the	O
plasma	O
by	O
applying	O
a	O
high	O
voltage	O
pulsed	O
DC	O
or	O
pure	O
DC	O
power	O
supply	O
and	O
targeting	O
them	O
into	O
a	O
suitable	O
substrate	B-Architecture
or	O
electrode	O
with	O
a	O
semiconductor	B-Architecture
wafer	I-Architecture
placed	O
over	O
it	O
,	O
so	O
as	O
to	O
implant	O
it	O
with	O
suitable	O
dopants	O
.	O
</s>
<s>
The	O
vacuum	O
chamber	O
can	O
be	O
of	O
two	O
types	O
-	O
diode	O
and	O
triode	O
type	O
depending	O
upon	O
whether	O
the	O
power	O
supply	O
is	O
applied	O
to	O
the	O
substrate	B-Architecture
as	O
in	O
the	O
former	O
case	O
or	O
to	O
the	O
perforated	O
grid	O
as	O
in	O
the	O
latter	O
.	O
</s>
<s>
In	O
a	O
conventional	O
immersion	O
type	O
of	O
PIII	O
system	O
,	O
also	O
called	O
as	O
the	O
diode	O
type	O
configuration	O
,	O
the	O
wafer	B-Architecture
is	O
kept	O
at	O
a	O
negative	O
potential	O
since	O
the	O
positively	O
charged	O
ions	O
of	O
the	O
electropositive	O
plasma	O
are	O
the	O
ones	O
who	O
get	O
extracted	O
and	O
implanted	O
.	O
</s>
<s>
The	O
wafer	B-Architecture
sample	O
to	O
be	O
treated	O
is	O
placed	O
on	O
a	O
sample	O
holder	O
in	O
a	O
vacuum	O
chamber	O
.	O
</s>
<s>
When	O
the	O
substrate	B-Architecture
is	O
biased	O
to	O
a	O
negative	O
voltage	O
(	O
few	O
KV	O
's	O
)	O
,	O
the	O
resultant	O
electric	O
field	O
drives	O
electrons	O
away	O
from	O
the	O
substrate	B-Architecture
in	O
the	O
time	O
scale	O
of	O
the	O
inverse	O
electron	O
plasma	O
frequency	O
ωe−1	O
(	O
~	O
10−9	O
sec	O
)	O
.	O
</s>
<s>
The	O
negatively	O
biased	O
substrate	B-Architecture
will	O
accelerate	O
the	O
ions	O
within	O
a	O
time	O
scale	O
of	O
the	O
inverse	O
ion	O
plasma	O
frequency	O
ωi−1	O
(	O
~	O
10−6	O
sec	O
)	O
.	O
</s>
<s>
Pulse	O
biasing	O
is	O
preferred	O
over	O
DC	O
biasing	O
because	O
it	O
creates	O
less	O
damage	O
during	O
the	O
pulse	O
ON	O
time	O
and	O
neutralization	O
of	O
unwanted	O
charges	O
accumulated	O
on	O
the	O
wafer	B-Architecture
in	O
the	O
afterglow	O
period	O
(	O
i.e.	O
</s>
<s>
In	O
case	O
of	O
a	O
triode	O
type	O
configuration	O
,	O
a	O
suitable	O
perforated	O
grid	O
is	O
placed	O
in	O
between	O
the	O
substrate	B-Architecture
and	O
the	O
plasma	O
and	O
a	O
pulsed	O
DC	O
bias	O
is	O
applied	O
to	O
this	O
grid	O
.	O
</s>
<s>
Here	O
the	O
same	O
theory	O
applies	O
as	O
previously	O
discussed	O
,	O
but	O
with	O
a	O
difference	O
that	O
the	O
extracted	O
ions	O
from	O
the	O
grid	O
holes	O
bombard	O
the	O
substrate	B-Architecture
,	O
thus	O
causing	O
implantation	O
.	O
</s>
