<s>
Pico-ITXe	B-Device
is	O
a	O
PC	O
Pico-ITX	B-Device
motherboard	B-Device
specification	O
created	O
by	O
VIA	O
Technologies	O
and	O
SFF-SIG	B-Device
.	O
</s>
<s>
The	O
Pico-ITXe	B-Device
specifications	O
call	O
for	O
the	O
board	O
to	O
be	O
,	O
which	O
is	O
half	O
the	O
area	O
of	O
Nano-ITX	B-Device
,	O
and	O
12	O
layers	O
deep	O
.	O
</s>
<s>
The	O
processor	O
can	O
be	O
a	O
VIA	B-Device
C7	I-Device
that	O
uses	O
VIA	O
's	O
NanoBGA2	O
technology	O
.	O
</s>
<s>
Video	O
is	O
supplied	O
by	O
VIA	O
's	O
Chrome9	O
HC3	O
GPU	B-Architecture
with	O
built-in	O
MPEG-2	B-Algorithm
,	O
4	B-Algorithm
,	O
WMV9	B-Device
,	O
and	O
VC1	B-Operating_System
decoding	O
acceleration	O
.	O
</s>
<s>
The	O
BIOS	B-Operating_System
is	O
a	O
4	B-Algorithm
or	O
8	O
Mbit	O
Award	O
BIOS	B-Operating_System
.	O
</s>
<s>
The	O
first	O
motherboard	B-Device
that	O
was	O
produced	O
under	O
this	O
specification	O
is	O
called	O
EPIA-P710	O
.	O
</s>
<s>
It	O
uses	O
a	O
1GHz	O
VIA	B-Device
C7-M	I-Device
processor	O
,	O
a	O
VIA	O
VX800	O
chip	O
set	O
,	O
and	O
is	O
RoHS	O
compliant	O
.	O
</s>
<s>
It	O
has	O
onboard	O
VGA	B-Protocol
video-out	O
.	O
</s>
<s>
The	O
following	O
are	O
the	O
standard	O
I/O	B-General_Concept
connections	O
:	O
</s>
<s>
Up	O
to	O
four	O
I/O	B-General_Concept
expansion	O
boards	O
can	O
be	O
stacked	O
upon	O
each	O
other	O
using	O
the	O
SUMIT	B-Device
interface	O
.	O
</s>
