<s>
In	O
Intel	O
's	O
Tick-Tock	B-Device
cycle	I-Device
,	O
the	O
2007/2008	O
"	O
Tick	O
"	O
was	O
the	O
shrink	O
of	O
the	O
Core	B-Device
microarchitecture	I-Device
to	O
45	B-Algorithm
nanometers	I-Algorithm
as	O
CPUID	O
model	O
23	O
.	O
</s>
<s>
In	O
Core	B-Device
2	O
processors	O
,	O
it	O
is	O
used	O
with	O
the	O
code	O
names	O
Penryn	B-Device
(	O
Socket	B-Device
P	I-Device
)	O
,	O
Wolfdale	B-Device
(	O
LGA	B-Device
775	I-Device
)	O
and	O
Yorkfield	B-Device
(	O
MCM	O
,	O
LGA	B-Device
775	I-Device
)	O
,	O
some	O
of	O
which	O
are	O
also	O
sold	O
as	O
Celeron	B-Device
,	O
Pentium	B-General_Concept
and	O
Xeon	B-Device
processors	O
.	O
</s>
<s>
In	O
the	O
Xeon	B-Device
brand	O
,	O
the	O
Wolfdale-DP	O
and	O
Harpertown	O
code	O
names	O
are	O
used	O
for	O
LGA	B-Device
771	I-Device
based	O
MCMs	O
with	O
two	O
or	O
four	O
active	O
Wolfdale	B-Device
cores	O
.	O
</s>
<s>
Architectural	O
improvements	O
over	O
65-nanometer	O
Core	B-Device
2	O
CPUs	O
include	O
a	O
new	O
divider	O
with	O
reduced	O
latency	O
,	O
a	O
new	O
shuffle	O
engine	O
,	O
and	O
SSE4.1	B-General_Concept
instructions	O
(	O
some	O
of	O
which	O
are	O
enabled	O
by	O
the	O
new	O
single-cycle	O
shuffle	O
engine	O
)	O
.	O
</s>
<s>
Cut-down	O
versions	O
with	O
3	O
MB	O
L2	O
also	O
exist	O
,	O
which	O
are	O
commonly	O
called	O
Penryn-3M	O
and	O
Wolfdale-3M	O
as	O
well	O
as	O
Yorkfield-6M	O
,	O
respectively	O
.	O
</s>
<s>
The	O
single-core	O
version	O
of	O
Penryn	B-Device
,	O
listed	O
as	O
Penryn-L	O
here	O
,	O
is	O
not	O
a	O
separate	O
model	O
like	O
Merom-L	O
but	O
a	O
version	O
of	O
the	O
Penryn-3M	O
model	O
with	O
only	O
one	O
active	O
core	B-Device
.	O
</s>
<s>
The	O
processors	O
of	O
the	O
Core	B-Device
microarchitecture	I-Device
can	O
be	O
categorized	O
by	O
number	O
of	O
cores	O
,	O
cache	O
size	O
,	O
and	O
socket	O
;	O
each	O
combination	O
of	O
these	O
has	O
a	O
unique	O
code	O
name	O
and	O
product	O
code	O
that	O
is	O
used	O
across	O
a	O
number	O
of	O
brands	O
.	O
</s>
<s>
For	O
instance	O
,	O
code	O
name	O
"	O
Allendale	O
"	O
with	O
product	O
code	O
80557	O
has	O
two	O
cores	O
,	O
2	O
MB	O
L2	O
cache	O
and	O
uses	O
the	O
desktop	O
socket	B-Device
775	I-Device
,	O
but	O
has	O
been	O
marketed	O
as	O
Celeron	B-Device
,	O
Pentium	B-General_Concept
,	O
Core	B-Device
2	O
and	O
Xeon	B-Device
,	O
each	O
with	O
different	O
sets	O
of	O
features	O
enabled	O
.	O
</s>
<s>
Wolfdale-DP	O
and	O
all	O
quad-core	O
processors	O
except	O
Dunnington	O
QC	O
are	O
multi-chip	O
modules	O
combining	O
two	O
dies	O
.	O
</s>
<s>
Mobile	O
(	O
Penryn	B-Device
)	O
Desktop	O
(	O
Wolfdale	B-Device
)	O
Desktop	O
(	O
Yorkfield	B-Device
)	O
Server	O
(	O
Wolfdale-DP	O
,	O
Harpertown	O
,	O
Dunnington	O
)	O
Stepping	O
Released	O
Area	O
CPUID	O
L2	O
cache	O
Max	O
.	O
</s>
<s>
All	O
steppings	O
have	O
the	O
new	O
SSE4.1	B-General_Concept
instructions	O
.	O
</s>
<s>
Stepping	O
C1/M1	O
was	O
a	O
bug	O
fix	O
version	O
of	O
C0/M0	O
specifically	O
for	O
quad	O
core	B-Device
processors	O
and	O
only	O
used	O
in	O
those	O
.	O
</s>
<s>
As	O
of	O
February	O
2008	O
,	O
it	O
has	O
only	O
found	O
its	O
way	O
into	O
the	O
very	O
high-end	O
Xeon	B-Device
7400	O
series	O
(	O
Dunnington	O
)	O
.	O
</s>
