<s>
Parallel	B-Operating_System
computing	I-Operating_System
is	O
a	O
type	O
of	O
computation	O
in	O
which	O
many	O
calculations	O
or	O
processes	B-Operating_System
are	O
carried	O
out	O
simultaneously	O
.	O
</s>
<s>
There	O
are	O
several	O
different	O
forms	O
of	O
parallel	B-Operating_System
computing	I-Operating_System
:	O
bit-level	B-Operating_System
,	O
instruction-level	B-Operating_System
,	O
data	B-Operating_System
,	O
and	O
task	B-Operating_System
parallelism	I-Operating_System
.	O
</s>
<s>
Parallelism	B-Operating_System
has	O
long	O
been	O
employed	O
in	O
high-performance	B-Architecture
computing	I-Architecture
,	O
but	O
has	O
gained	O
broader	O
interest	O
due	O
to	O
the	O
physical	O
constraints	O
preventing	O
frequency	B-General_Concept
scaling	I-General_Concept
.	O
</s>
<s>
As	O
power	O
consumption	O
(	O
and	O
consequently	O
heat	O
generation	O
)	O
by	O
computers	O
has	O
become	O
a	O
concern	O
in	O
recent	O
years	O
,	O
parallel	B-Operating_System
computing	I-Operating_System
has	O
become	O
the	O
dominant	O
paradigm	O
in	O
computer	B-General_Concept
architecture	I-General_Concept
,	O
mainly	O
in	O
the	O
form	O
of	O
multi-core	B-Architecture
processors	I-Architecture
.	O
</s>
<s>
Parallel	B-Operating_System
computing	I-Operating_System
is	O
closely	O
related	O
to	O
concurrent	B-Architecture
computing	I-Architecture
—	O
they	O
are	O
frequently	O
used	O
together	O
,	O
and	O
often	O
conflated	O
,	O
though	O
the	O
two	O
are	O
distinct	O
:	O
it	O
is	O
possible	O
to	O
have	O
parallelism	B-Operating_System
without	O
concurrency	B-Application
,	O
and	O
concurrency	B-Application
without	O
parallelism	B-Operating_System
(	O
such	O
as	O
multitasking	B-Operating_System
by	O
time-sharing	B-General_Concept
on	O
a	O
single-core	O
CPU	O
)	O
.	O
</s>
<s>
In	O
parallel	B-Operating_System
computing	I-Operating_System
,	O
a	O
computational	O
task	O
is	O
typically	O
broken	O
down	O
into	O
several	O
,	O
often	O
many	O
,	O
very	O
similar	O
sub-tasks	O
that	O
can	O
be	O
processed	O
independently	O
and	O
whose	O
results	O
are	O
combined	O
afterwards	O
,	O
upon	O
completion	O
.	O
</s>
<s>
In	O
contrast	O
,	O
in	O
concurrent	B-Architecture
computing	I-Architecture
,	O
the	O
various	O
processes	B-Operating_System
often	O
do	O
not	O
address	O
related	O
tasks	O
;	O
when	O
they	O
do	O
,	O
as	O
is	O
typical	O
in	O
distributed	B-Architecture
computing	I-Architecture
,	O
the	O
separate	O
tasks	O
may	O
have	O
a	O
varied	O
nature	O
and	O
often	O
require	O
some	O
inter-process	B-Operating_System
communication	I-Operating_System
during	O
execution	O
.	O
</s>
<s>
Parallel	B-Operating_System
computers	I-Operating_System
can	O
be	O
roughly	O
classified	O
according	O
to	O
the	O
level	O
at	O
which	O
the	O
hardware	O
supports	O
parallelism	B-Operating_System
,	O
with	O
multi-core	B-Architecture
and	O
multi-processor	B-Operating_System
computers	O
having	O
multiple	B-Operating_System
processing	I-Operating_System
elements	I-Operating_System
within	O
a	O
single	O
machine	O
,	O
while	O
clusters	B-Architecture
,	O
MPPs	B-Operating_System
,	O
and	O
grids	B-Architecture
use	O
multiple	O
computers	O
to	O
work	O
on	O
the	O
same	O
task	O
.	O
</s>
<s>
Specialized	O
parallel	B-Operating_System
computer	I-Operating_System
architectures	O
are	O
sometimes	O
used	O
alongside	O
traditional	O
processors	O
,	O
for	O
accelerating	O
specific	O
tasks	O
.	O
</s>
<s>
In	O
some	O
cases	O
parallelism	B-Operating_System
is	O
transparent	O
to	O
the	O
programmer	O
,	O
such	O
as	O
in	O
bit-level	B-Operating_System
or	O
instruction-level	B-Operating_System
parallelism	I-Operating_System
,	O
but	O
explicitly	O
parallel	B-Operating_System
algorithms	I-Operating_System
,	O
particularly	O
those	O
that	O
use	O
concurrency	B-Application
,	O
are	O
more	O
difficult	O
to	O
write	O
than	O
sequential	B-Algorithm
ones	O
,	O
because	O
concurrency	B-Application
introduces	O
several	O
new	O
classes	O
of	O
potential	O
software	B-Error_Name
bugs	I-Error_Name
,	O
of	O
which	O
race	B-Operating_System
conditions	I-Operating_System
are	O
the	O
most	O
common	O
.	O
</s>
<s>
Communication	B-Architecture
and	O
synchronization	O
between	O
the	O
different	O
subtasks	O
are	O
typically	O
some	O
of	O
the	O
greatest	O
obstacles	O
to	O
getting	O
optimal	O
parallel	B-Operating_System
program	I-Operating_System
performance	O
.	O
</s>
<s>
A	O
theoretical	O
upper	O
bound	O
on	O
the	O
speed-up	B-Operating_System
of	O
a	O
single	O
program	O
as	O
a	O
result	O
of	O
parallelization	B-Operating_System
is	O
given	O
by	O
Amdahl	B-Operating_System
's	I-Operating_System
law	I-Operating_System
,	O
which	O
states	O
that	O
it	O
is	O
limited	O
by	O
the	O
fraction	O
of	O
time	O
for	O
which	O
the	O
parallelization	B-Operating_System
can	O
be	O
utilised	O
.	O
</s>
<s>
Traditionally	O
,	O
computer	B-Application
software	I-Application
has	O
been	O
written	O
for	O
serial	B-Device
computation	I-Device
.	O
</s>
<s>
These	O
instructions	O
are	O
executed	O
on	O
a	O
central	B-General_Concept
processing	I-General_Concept
unit	I-General_Concept
on	O
one	O
computer	O
.	O
</s>
<s>
Parallel	B-Operating_System
computing	I-Operating_System
,	O
on	O
the	O
other	O
hand	O
,	O
uses	O
multiple	B-Operating_System
processing	I-Operating_System
elements	I-Operating_System
simultaneously	O
to	O
solve	O
a	O
problem	O
.	O
</s>
<s>
Historically	O
parallel	B-Operating_System
computing	I-Operating_System
was	O
used	O
for	O
scientific	O
computing	O
and	O
the	O
simulation	O
of	O
scientific	O
problems	O
,	O
particularly	O
in	O
the	O
natural	O
and	O
engineering	O
sciences	O
,	O
such	O
as	O
meteorology	O
.	O
</s>
<s>
This	O
led	O
to	O
the	O
design	O
of	O
parallel	O
hardware	O
and	O
software	O
,	O
as	O
well	O
as	O
high	B-Architecture
performance	I-Architecture
computing	I-Architecture
.	O
</s>
<s>
Frequency	B-General_Concept
scaling	I-General_Concept
was	O
the	O
dominant	O
reason	O
for	O
improvements	O
in	O
computer	O
performance	O
from	O
the	O
mid-1980s	O
until	O
2004	O
.	O
</s>
<s>
The	O
runtime	B-Library
of	O
a	O
program	O
is	O
equal	O
to	O
the	O
number	O
of	O
instructions	O
multiplied	O
by	O
the	O
average	O
time	O
per	O
instruction	O
.	O
</s>
<s>
An	O
increase	O
in	O
frequency	O
thus	O
decreases	O
runtime	B-Library
for	O
all	O
compute-bound	O
programs	O
.	O
</s>
<s>
However	O
,	O
power	O
consumption	O
P	O
by	O
a	O
chip	O
is	O
given	O
by	O
the	O
equation	O
P	O
=	O
C	B-Language
×	O
V	O
2	O
×	O
F	O
,	O
where	O
C	B-Language
is	O
the	O
capacitance	O
being	O
switched	O
per	O
clock	O
cycle	O
(	O
proportional	O
to	O
the	O
number	O
of	O
transistors	B-Application
whose	O
inputs	O
change	O
)	O
,	O
V	O
is	O
voltage	O
,	O
and	O
F	O
is	O
the	O
processor	O
frequency	O
(	O
cycles	O
per	O
second	O
)	O
.	O
</s>
<s>
Increasing	O
processor	O
power	O
consumption	O
led	O
ultimately	O
to	O
Intel	O
's	O
May	O
8	O
,	O
2004	O
cancellation	O
of	O
its	O
Tejas	B-Device
and	I-Device
Jayhawk	I-Device
processors	O
,	O
which	O
is	O
generally	O
cited	O
as	O
the	O
end	O
of	O
frequency	B-General_Concept
scaling	I-General_Concept
as	O
the	O
dominant	O
computer	B-General_Concept
architecture	I-General_Concept
paradigm	O
.	O
</s>
<s>
To	O
deal	O
with	O
the	O
problem	O
of	O
power	O
consumption	O
and	O
overheating	O
the	O
major	O
central	B-General_Concept
processing	I-General_Concept
unit	I-General_Concept
(	O
CPU	O
or	O
processor	O
)	O
manufacturers	O
started	O
to	O
produce	O
power	O
efficient	O
processors	O
with	O
multiple	O
cores	O
.	O
</s>
<s>
The	O
core	O
is	O
the	O
computing	O
unit	O
of	O
the	O
processor	O
and	O
in	O
multi-core	B-Architecture
processors	I-Architecture
each	O
core	O
is	O
independent	O
and	O
can	O
access	O
the	O
same	O
memory	O
concurrently	O
.	O
</s>
<s>
Multi-core	B-Architecture
processors	I-Architecture
have	O
brought	O
parallel	B-Operating_System
computing	I-Operating_System
to	O
desktop	B-Device
computers	I-Device
.	O
</s>
<s>
Thus	O
parallelisation	B-Operating_System
of	O
serial	O
programmes	O
has	O
become	O
a	O
mainstream	O
programming	O
task	O
.	O
</s>
<s>
In	O
2012	O
quad-core	B-Architecture
processors	I-Architecture
became	O
standard	O
for	O
desktop	B-Device
computers	I-Device
,	O
while	O
servers	B-Application
have	O
10+	O
core	O
processors	O
.	O
</s>
<s>
This	O
could	O
mean	O
that	O
after	O
2020	O
a	O
typical	O
processor	O
will	O
have	O
dozens	O
or	O
hundreds	O
of	O
cores	O
,	O
however	O
in	O
reality	O
the	O
standard	O
is	O
somewhere	O
in	O
the	O
region	O
of	O
4	O
to	O
16	O
cores	O
,	O
with	O
some	O
designs	O
having	O
a	O
mix	O
of	O
performance	O
and	O
efficiency	O
cores	O
(	O
such	O
as	O
ARM	B-Architecture
's	I-Architecture
big.LITTLE	I-Architecture
design	O
)	O
due	O
to	O
thermal	O
and	O
design	O
constraints	O
.	O
</s>
<s>
An	O
operating	B-General_Concept
system	I-General_Concept
can	O
ensure	O
that	O
different	O
tasks	O
and	O
user	O
programmes	O
are	O
run	O
in	O
parallel	O
on	O
the	O
available	O
cores	O
.	O
</s>
<s>
However	O
,	O
for	O
a	O
serial	O
software	O
programme	O
to	O
take	O
full	O
advantage	O
of	O
the	O
multi-core	B-Architecture
architecture	O
the	O
programmer	O
needs	O
to	O
restructure	O
and	O
parallelise	O
the	O
code	O
.	O
</s>
<s>
A	O
speed-up	B-Operating_System
of	O
application	O
software	O
runtime	B-Library
will	O
no	O
longer	O
be	O
achieved	O
through	O
frequency	B-General_Concept
scaling	I-General_Concept
,	O
instead	O
programmers	O
will	O
need	O
to	O
parallelise	O
their	O
software	O
code	O
to	O
take	O
advantage	O
of	O
the	O
increasing	O
computing	O
power	O
of	O
multicore	B-Architecture
architectures	O
.	O
</s>
<s>
Optimally	O
,	O
the	O
speedup	B-Operating_System
from	O
parallelization	B-Operating_System
would	O
be	O
linear	O
—	O
doubling	O
the	O
number	O
of	O
processing	O
elements	O
should	O
halve	O
the	O
runtime	B-Library
,	O
and	O
doubling	O
it	O
a	O
second	O
time	O
should	O
again	O
halve	O
the	O
runtime	B-Library
.	O
</s>
<s>
However	O
,	O
very	O
few	O
parallel	B-Operating_System
algorithms	I-Operating_System
achieve	O
optimal	O
speedup	B-Operating_System
.	O
</s>
<s>
Slatency	O
is	O
the	O
potential	O
speedup	B-Operating_System
in	O
latency	B-General_Concept
of	O
the	O
execution	O
of	O
the	O
whole	O
task	O
;	O
</s>
<s>
s	O
is	O
the	O
speedup	B-Operating_System
in	O
latency	B-General_Concept
of	O
the	O
execution	O
of	O
the	O
parallelizable	O
part	O
of	O
the	O
task	O
;	O
</s>
<s>
p	O
is	O
the	O
percentage	O
of	O
the	O
execution	B-Library
time	I-Library
of	O
the	O
whole	O
task	O
concerning	O
the	O
parallelizable	O
part	O
of	O
the	O
task	O
before	O
parallelization	B-Operating_System
.	O
</s>
<s>
Since	O
,	O
it	O
shows	O
that	O
a	O
small	O
part	O
of	O
the	O
program	O
which	O
cannot	O
be	O
parallelized	B-Operating_System
will	O
limit	O
the	O
overall	O
speedup	B-Operating_System
available	O
from	O
parallelization	B-Operating_System
.	O
</s>
<s>
If	O
the	O
non-parallelizable	O
part	O
of	O
a	O
program	O
accounts	O
for	O
10%	O
of	O
the	O
runtime	B-Library
(	O
p	O
=	O
0.9	O
)	O
,	O
we	O
can	O
get	O
no	O
more	O
than	O
a	O
10	O
times	O
speedup	B-Operating_System
,	O
regardless	O
of	O
how	O
many	O
processors	O
are	O
added	O
.	O
</s>
<s>
This	O
puts	O
an	O
upper	O
limit	O
on	O
the	O
usefulness	O
of	O
adding	O
more	O
parallel	B-Operating_System
execution	I-Operating_System
units	I-Operating_System
.	O
</s>
<s>
"	O
When	O
a	O
task	O
cannot	O
be	O
partitioned	O
because	O
of	O
sequential	B-Algorithm
constraints	O
,	O
the	O
application	O
of	O
more	O
effort	O
has	O
no	O
effect	O
on	O
the	O
schedule	O
.	O
</s>
<s>
Amdahl	B-Operating_System
's	I-Operating_System
law	I-Operating_System
only	O
applies	O
to	O
cases	O
where	O
the	O
problem	O
size	O
is	O
fixed	O
.	O
</s>
<s>
In	O
this	O
case	O
,	O
Gustafson	B-Operating_System
's	I-Operating_System
law	I-Operating_System
gives	O
a	O
less	O
pessimistic	O
and	O
more	O
realistic	O
assessment	O
of	O
parallel	O
performance	O
:	O
</s>
<s>
Both	O
Amdahl	B-Operating_System
's	I-Operating_System
law	I-Operating_System
and	O
Gustafson	B-Operating_System
's	I-Operating_System
law	I-Operating_System
assume	O
that	O
the	O
running	O
time	O
of	O
the	O
serial	O
part	O
of	O
the	O
program	O
is	O
independent	O
of	O
the	O
number	O
of	O
processors	O
.	O
</s>
<s>
Amdahl	B-Operating_System
's	I-Operating_System
law	I-Operating_System
assumes	O
that	O
the	O
entire	O
problem	O
is	O
of	O
fixed	O
size	O
so	O
that	O
the	O
total	O
amount	O
of	O
work	O
to	O
be	O
done	O
in	O
parallel	O
is	O
also	O
independent	O
of	O
the	O
number	O
of	O
processors	O
,	O
whereas	O
Gustafson	B-Operating_System
's	I-Operating_System
law	I-Operating_System
assumes	O
that	O
the	O
total	O
amount	O
of	O
work	O
to	O
be	O
done	O
in	O
parallel	O
varies	O
linearly	O
with	O
the	O
number	O
of	O
processors	O
.	O
</s>
<s>
Understanding	O
data	B-Operating_System
dependencies	I-Operating_System
is	O
fundamental	O
in	O
implementing	O
parallel	B-Operating_System
algorithms	I-Operating_System
.	O
</s>
<s>
Bernstein	O
's	O
conditions	O
do	O
not	O
allow	O
memory	O
to	O
be	O
shared	O
between	O
different	O
processes	B-Operating_System
.	O
</s>
<s>
For	O
that	O
,	O
some	O
means	O
of	O
enforcing	O
an	O
ordering	O
between	O
accesses	O
is	O
necessary	O
,	O
such	O
as	O
semaphores	B-Operating_System
,	O
barriers	B-Operating_System
or	O
some	O
other	O
synchronization	O
method	O
.	O
</s>
<s>
Subtasks	O
in	O
a	O
parallel	B-Operating_System
program	I-Operating_System
are	O
often	O
called	O
threads	B-Operating_System
.	O
</s>
<s>
Some	O
parallel	B-Operating_System
computer	I-Operating_System
architectures	O
use	O
smaller	O
,	O
lightweight	O
versions	O
of	O
threads	B-Operating_System
known	O
as	O
fibers	B-Operating_System
,	O
while	O
others	O
use	O
bigger	O
versions	O
known	O
as	O
processes	B-Operating_System
.	O
</s>
<s>
However	O
,	O
"	O
threads	B-Operating_System
"	O
is	O
generally	O
accepted	O
as	O
a	O
generic	O
term	O
for	O
subtasks	O
.	O
</s>
<s>
Threads	B-Operating_System
will	O
often	O
need	O
synchronized	O
access	O
to	O
an	O
object	O
or	O
other	O
resource	O
,	O
for	O
example	O
when	O
they	O
must	O
update	O
a	O
variable	O
that	O
is	O
shared	O
between	O
them	O
.	O
</s>
<s>
Without	O
synchronization	O
,	O
the	O
instructions	O
between	O
the	O
two	O
threads	B-Operating_System
may	O
be	O
interleaved	O
in	O
any	O
order	O
.	O
</s>
<s>
If	O
instruction	O
1B	O
is	O
executed	O
between	O
1A	O
and	O
3A	O
,	O
or	O
if	O
instruction	O
1A	O
is	O
executed	O
between	O
1B	O
and	O
3B	O
,	O
the	O
program	O
will	O
produce	O
incorrect	O
data	B-Operating_System
.	O
</s>
<s>
This	O
is	O
known	O
as	O
a	O
race	B-Operating_System
condition	I-Operating_System
.	O
</s>
<s>
The	O
programmer	O
must	O
use	O
a	O
lock	B-Operating_System
to	O
provide	O
mutual	B-Operating_System
exclusion	I-Operating_System
.	O
</s>
<s>
A	O
lock	B-Operating_System
is	O
a	O
programming	O
language	O
construct	O
that	O
allows	O
one	O
thread	B-Operating_System
to	O
take	O
control	O
of	O
a	O
variable	O
and	O
prevent	O
other	O
threads	B-Operating_System
from	O
reading	O
or	O
writing	O
it	O
,	O
until	O
that	O
variable	O
is	O
unlocked	O
.	O
</s>
<s>
The	O
thread	B-Operating_System
holding	O
the	O
lock	B-Operating_System
is	O
free	O
to	O
execute	O
its	O
critical	B-Operating_System
section	I-Operating_System
(	O
the	O
section	O
of	O
a	O
program	O
that	O
requires	O
exclusive	O
access	O
to	O
some	O
variable	O
)	O
,	O
and	O
to	O
unlock	O
the	O
data	B-Operating_System
when	O
it	O
is	O
finished	O
.	O
</s>
<s>
One	O
thread	B-Operating_System
will	O
successfully	O
lock	B-Operating_System
variable	I-Operating_System
V	O
,	O
while	O
the	O
other	O
thread	B-Operating_System
will	O
be	O
locked	B-Operating_System
out	I-Operating_System
—	O
unable	O
to	O
proceed	O
until	O
V	O
is	O
unlocked	O
again	O
.	O
</s>
<s>
Locks	O
may	O
be	O
necessary	O
to	O
ensure	O
correct	O
program	O
execution	O
when	O
threads	B-Operating_System
must	O
serialize	O
access	O
to	O
resources	O
,	O
but	O
their	O
use	O
can	O
greatly	O
slow	O
a	O
program	O
and	O
may	O
affect	O
its	O
reliability	O
.	O
</s>
<s>
Locking	B-Operating_System
multiple	O
variables	O
using	O
non-atomic	B-General_Concept
locks	O
introduces	O
the	O
possibility	O
of	O
program	O
deadlock	B-Operating_System
.	O
</s>
<s>
An	O
atomic	O
lock	B-Operating_System
locks	O
multiple	O
variables	O
all	O
at	O
once	O
.	O
</s>
<s>
If	O
it	O
cannot	O
lock	B-Operating_System
all	O
of	O
them	O
,	O
it	O
does	O
not	O
lock	B-Operating_System
any	O
of	O
them	O
.	O
</s>
<s>
If	O
two	O
threads	B-Operating_System
each	O
need	O
to	O
lock	B-Operating_System
the	O
same	O
two	O
variables	O
using	O
non-atomic	B-General_Concept
locks	O
,	O
it	O
is	O
possible	O
that	O
one	O
thread	B-Operating_System
will	O
lock	B-Operating_System
one	O
of	O
them	O
and	O
the	O
second	O
thread	B-Operating_System
will	O
lock	B-Operating_System
the	O
second	O
variable	O
.	O
</s>
<s>
In	O
such	O
a	O
case	O
,	O
neither	O
thread	B-Operating_System
can	O
complete	O
,	O
and	O
deadlock	B-Operating_System
results	O
.	O
</s>
<s>
Many	O
parallel	B-Operating_System
programs	I-Operating_System
require	O
that	O
their	O
subtasks	O
act	O
in	O
synchrony	O
.	O
</s>
<s>
This	O
requires	O
the	O
use	O
of	O
a	O
barrier	B-Operating_System
.	O
</s>
<s>
Barriers	B-Operating_System
are	O
typically	O
implemented	O
using	O
a	O
lock	B-Operating_System
or	O
a	O
semaphore	B-Operating_System
.	O
</s>
<s>
One	O
class	O
of	O
algorithms	O
,	O
known	O
as	O
lock-free	B-Operating_System
and	I-Operating_System
wait-free	I-Operating_System
algorithms	I-Operating_System
,	O
altogether	O
avoids	O
the	O
use	O
of	O
locks	O
and	O
barriers	B-Operating_System
.	O
</s>
<s>
However	O
,	O
this	O
approach	O
is	O
generally	O
difficult	O
to	O
implement	O
and	O
requires	O
correctly	O
designed	O
data	B-Operating_System
structures	O
.	O
</s>
<s>
Not	O
all	O
parallelization	B-Operating_System
results	O
in	O
speed-up	B-Operating_System
.	O
</s>
<s>
Generally	O
,	O
as	O
a	O
task	O
is	O
split	O
up	O
into	O
more	O
and	O
more	O
threads	B-Operating_System
,	O
those	O
threads	B-Operating_System
spend	O
an	O
ever-increasing	O
portion	O
of	O
their	O
time	O
communicating	O
with	O
each	O
other	O
or	O
waiting	O
on	O
each	O
other	O
for	O
access	O
to	O
resources	O
.	O
</s>
<s>
Once	O
the	O
overhead	O
from	O
resource	O
contention	O
or	O
communication	B-Architecture
dominates	O
the	O
time	O
spent	O
on	O
other	O
computation	O
,	O
further	O
parallelization	B-Operating_System
(	O
that	O
is	O
,	O
splitting	O
the	O
workload	O
over	O
even	O
more	O
threads	B-Operating_System
)	O
increases	O
rather	O
than	O
decreases	O
the	O
amount	O
of	O
time	O
required	O
to	O
finish	O
.	O
</s>
<s>
This	O
problem	O
,	O
known	O
as	O
parallel	B-Operating_System
slowdown	I-Operating_System
,	O
can	O
be	O
improved	O
in	O
some	O
cases	O
by	O
software	O
analysis	O
and	O
redesign	O
.	O
</s>
<s>
An	O
application	O
exhibits	O
fine-grained	O
parallelism	B-Operating_System
if	O
its	O
subtasks	O
must	O
communicate	O
many	O
times	O
per	O
second	O
;	O
it	O
exhibits	O
coarse-grained	O
parallelism	B-Operating_System
if	O
they	O
do	O
not	O
communicate	O
many	O
times	O
per	O
second	O
,	O
and	O
it	O
exhibits	O
embarrassing	B-Operating_System
parallelism	I-Operating_System
if	O
they	O
rarely	O
or	O
never	O
have	O
to	O
communicate	O
.	O
</s>
<s>
Embarrassingly	B-Operating_System
parallel	I-Operating_System
applications	O
are	O
considered	O
the	O
easiest	O
to	O
parallelize	O
.	O
</s>
<s>
Michael	O
J	O
.	O
Flynn	O
created	O
one	O
of	O
the	O
earliest	O
classification	O
systems	O
for	O
parallel	O
(	O
and	O
sequential	B-Algorithm
)	O
computers	O
and	O
programs	O
,	O
now	O
known	O
as	O
Flynn	B-Operating_System
's	I-Operating_System
taxonomy	I-Operating_System
.	O
</s>
<s>
Flynn	O
classified	O
programs	O
and	O
computers	O
by	O
whether	O
they	O
were	O
operating	O
using	O
a	O
single	O
set	O
or	O
multiple	O
sets	O
of	O
instructions	O
,	O
and	O
whether	O
or	O
not	O
those	O
instructions	O
were	O
using	O
a	O
single	O
set	O
or	O
multiple	O
sets	O
of	O
data	B-Operating_System
.	O
</s>
<s>
The	O
single-instruction-single-data	O
(	O
SISD	O
)	O
classification	O
is	O
equivalent	O
to	O
an	O
entirely	O
sequential	B-Algorithm
program	O
.	O
</s>
<s>
The	O
single-instruction-multiple-data	O
(	O
SIMD	O
)	O
classification	O
is	O
analogous	O
to	O
doing	O
the	O
same	O
operation	O
repeatedly	O
over	O
a	O
large	O
data	B-Operating_System
set	O
.	O
</s>
<s>
Multiple-instruction-single-data	O
(	O
MISD	O
)	O
is	O
a	O
rarely	O
used	O
classification	O
.	O
</s>
<s>
While	O
computer	B-General_Concept
architectures	I-General_Concept
to	O
deal	O
with	O
this	O
were	O
devised	O
(	O
such	O
as	O
systolic	B-Architecture
arrays	I-Architecture
)	O
,	O
few	O
applications	O
that	O
fit	O
this	O
class	O
materialized	O
.	O
</s>
<s>
Multiple-instruction-multiple-data	O
(	O
MIMD	O
)	O
programs	O
are	O
by	O
far	O
the	O
most	O
common	O
type	O
of	O
parallel	B-Operating_System
programs	I-Operating_System
.	O
</s>
<s>
thumb|Taiwania	O
3	O
of	O
Taiwan	O
,	O
a	O
parallel	O
supercomputing	B-Architecture
device	O
that	O
joined	O
COVID-19	O
research	O
.	O
</s>
<s>
From	O
the	O
advent	O
of	O
very-large-scale	O
integration	O
(	O
VLSI	O
)	O
computer-chip	O
fabrication	O
technology	O
in	O
the	O
1970s	O
until	O
about	O
1986	O
,	O
speed-up	B-Operating_System
in	O
computer	B-General_Concept
architecture	I-General_Concept
was	O
driven	O
by	O
doubling	O
computer	O
word	O
size	O
—	O
the	O
amount	O
of	O
information	O
the	O
processor	O
can	O
manipulate	O
per	O
cycle	O
.	O
</s>
<s>
For	O
example	O
,	O
where	O
an	O
8-bit	O
processor	O
must	O
add	O
two	O
16-bit	B-Device
integers	O
,	O
the	O
processor	O
must	O
first	O
add	O
the	O
8	O
lower-order	O
bits	O
from	O
each	O
integer	O
using	O
the	O
standard	O
addition	O
instruction	O
,	O
then	O
add	O
the	O
8	O
higher-order	O
bits	O
using	O
an	O
add-with-carry	O
instruction	O
and	O
the	O
carry	B-Algorithm
bit	I-Algorithm
from	O
the	O
lower	O
order	O
addition	O
;	O
thus	O
,	O
an	O
8-bit	O
processor	O
requires	O
two	O
instructions	O
to	O
complete	O
a	O
single	O
operation	O
,	O
where	O
a	O
16-bit	B-Device
processor	I-Device
would	O
be	O
able	O
to	O
complete	O
the	O
operation	O
with	O
a	O
single	O
instruction	O
.	O
</s>
<s>
Historically	O
,	O
4-bit	O
microprocessors	O
were	O
replaced	O
with	O
8-bit	O
,	O
then	O
16-bit	B-Device
,	O
then	O
32-bit	O
microprocessors	O
.	O
</s>
<s>
Not	O
until	O
the	O
early	O
2000s	O
,	O
with	O
the	O
advent	O
of	O
x86-64	B-Device
architectures	O
,	O
did	O
64-bit	B-Device
processors	I-Device
become	O
commonplace	O
.	O
</s>
<s>
thumb|300px|A	O
canonical	O
processor	O
without	O
pipeline	B-General_Concept
.	O
</s>
<s>
Without	O
instruction-level	B-Operating_System
parallelism	I-Operating_System
,	O
a	O
processor	O
can	O
only	O
issue	O
less	O
than	O
one	O
instruction	O
per	O
clock	O
cycle	O
(	O
)	O
.	O
</s>
<s>
These	O
instructions	O
can	O
be	O
re-ordered	B-General_Concept
and	O
combined	O
into	O
groups	O
which	O
are	O
then	O
executed	O
in	O
parallel	O
without	O
changing	O
the	O
result	O
of	O
the	O
program	O
.	O
</s>
<s>
This	O
is	O
known	O
as	O
instruction-level	B-Operating_System
parallelism	I-Operating_System
.	O
</s>
<s>
Advances	O
in	O
instruction-level	B-Operating_System
parallelism	I-Operating_System
dominated	O
computer	B-General_Concept
architecture	I-General_Concept
from	O
the	O
mid-1980s	O
until	O
the	O
mid-1990s.Culler	O
et	O
al	O
.	O
</s>
<s>
thumb|300px|A	O
canonical	O
five-stage	O
pipelined	B-General_Concept
processor	I-General_Concept
.	O
</s>
<s>
All	O
modern	O
processors	O
have	O
multi-stage	O
instruction	B-General_Concept
pipelines	I-General_Concept
.	O
</s>
<s>
Each	O
stage	O
in	O
the	O
pipeline	B-General_Concept
corresponds	O
to	O
a	O
different	O
action	O
the	O
processor	O
performs	O
on	O
that	O
instruction	O
in	O
that	O
stage	O
;	O
a	O
processor	O
with	O
an	O
N-stage	O
pipeline	B-General_Concept
can	O
have	O
up	O
to	O
N	O
different	O
instructions	O
at	O
different	O
stages	O
of	O
completion	O
and	O
thus	O
can	O
issue	O
one	O
instruction	O
per	O
clock	O
cycle	O
(	O
)	O
.	O
</s>
<s>
The	O
canonical	O
example	O
of	O
a	O
pipelined	B-General_Concept
processor	I-General_Concept
is	O
a	O
RISC	B-Architecture
processor	I-Architecture
,	O
with	O
five	O
stages	O
:	O
instruction	O
fetch	O
(	O
IF	O
)	O
,	O
instruction	O
decode	O
(	O
ID	O
)	O
,	O
execute	O
(	O
EX	O
)	O
,	O
memory	O
access	O
(	O
MEM	O
)	O
,	O
and	O
register	O
write	O
back	O
(	O
WB	O
)	O
.	O
</s>
<s>
The	O
Pentium	B-General_Concept
4	I-General_Concept
processor	O
had	O
a	O
35-stage	O
pipeline.Patt	O
,	O
Yale	O
(	O
April	O
2004	O
)	O
.	O
</s>
<s>
thumb|300px|A	O
canonical	O
five-stage	O
pipelined	B-General_Concept
processor	I-General_Concept
with	O
two	O
execution	B-General_Concept
units	I-General_Concept
.	O
</s>
<s>
In	O
the	O
best	O
case	O
scenario	O
,	O
it	O
takes	O
one	O
clock	O
cycle	O
to	O
complete	O
two	O
instructions	O
and	O
thus	O
the	O
processor	O
can	O
issue	O
superscalar	B-General_Concept
performance	O
(	O
)	O
.	O
</s>
<s>
Most	O
modern	O
processors	O
also	O
have	O
multiple	O
execution	B-General_Concept
units	I-General_Concept
.	O
</s>
<s>
These	O
processors	O
are	O
known	O
as	O
superscalar	B-General_Concept
processors	I-General_Concept
.	O
</s>
<s>
Superscalar	B-General_Concept
processors	I-General_Concept
differ	O
from	O
multi-core	B-Architecture
processors	I-Architecture
in	O
that	O
the	O
several	O
execution	B-General_Concept
units	I-General_Concept
are	O
not	O
entire	O
processors	O
(	O
i.e.	O
</s>
<s>
processing	B-General_Concept
units	I-General_Concept
)	O
.	O
</s>
<s>
Instructions	O
can	O
be	O
grouped	O
together	O
only	O
if	O
there	O
is	O
no	O
data	B-Operating_System
dependency	I-Operating_System
between	O
them	O
.	O
</s>
<s>
Scoreboarding	B-General_Concept
and	O
the	O
Tomasulo	B-General_Concept
algorithm	I-General_Concept
(	O
which	O
is	O
similar	O
to	O
scoreboarding	B-General_Concept
but	O
makes	O
use	O
of	O
register	B-Architecture
renaming	I-Architecture
)	O
are	O
two	O
of	O
the	O
most	O
common	O
techniques	O
for	O
implementing	O
out-of-order	B-General_Concept
execution	I-General_Concept
and	O
instruction-level	B-Operating_System
parallelism	I-Operating_System
.	O
</s>
<s>
Task	B-Operating_System
parallelisms	I-Operating_System
is	O
the	O
characteristic	O
of	O
a	O
parallel	B-Operating_System
program	I-Operating_System
that	O
"	O
entirely	O
different	O
calculations	O
can	O
be	O
performed	O
on	O
either	O
the	O
same	O
or	O
different	O
sets	O
of	O
data	B-Operating_System
"	O
.Culler	O
et	O
al	O
.	O
</s>
<s>
This	O
contrasts	O
with	O
data	B-Operating_System
parallelism	I-Operating_System
,	O
where	O
the	O
same	O
calculation	O
is	O
performed	O
on	O
the	O
same	O
or	O
different	O
sets	O
of	O
data	B-Operating_System
.	O
</s>
<s>
Task	B-Operating_System
parallelism	I-Operating_System
involves	O
the	O
decomposition	O
of	O
a	O
task	O
into	O
sub-tasks	O
and	O
then	O
allocating	O
each	O
sub-task	O
to	O
a	O
processor	O
for	O
execution	O
.	O
</s>
<s>
Task	B-Operating_System
parallelism	I-Operating_System
does	O
not	O
usually	O
scale	O
with	O
the	O
size	O
of	O
a	O
problem.Culler	O
et	O
al	O
.	O
</s>
<s>
Superword	O
level	O
parallelism	B-Operating_System
is	O
a	O
vectorization	B-General_Concept
technique	O
based	O
on	O
loop	B-Operating_System
unrolling	I-Operating_System
and	O
basic	O
block	O
vectorization	B-General_Concept
.	O
</s>
<s>
It	O
is	O
distinct	O
from	O
loop	O
vectorization	B-General_Concept
algorithms	O
in	O
that	O
it	O
can	O
exploit	O
parallelism	B-Operating_System
of	O
inline	O
code	O
,	O
such	O
as	O
manipulating	O
coordinates	O
,	O
color	O
channels	O
or	O
in	O
loops	O
unrolled	O
by	O
hand	O
.	O
</s>
<s>
Main	O
memory	O
in	O
a	O
parallel	B-Operating_System
computer	I-Operating_System
is	O
either	O
shared	B-Operating_System
memory	I-Operating_System
(	O
shared	O
between	O
all	O
processing	O
elements	O
in	O
a	O
single	O
address	B-General_Concept
space	I-General_Concept
)	O
,	O
or	O
distributed	B-Operating_System
memory	I-Operating_System
(	O
in	O
which	O
each	O
processing	O
element	O
has	O
its	O
own	O
local	O
address	B-General_Concept
space	I-General_Concept
)	O
.Patterson	O
and	O
Hennessy	O
,	O
p	O
.	O
713	O
.	O
</s>
<s>
Distributed	B-Operating_System
memory	I-Operating_System
refers	O
to	O
the	O
fact	O
that	O
the	O
memory	O
is	O
logically	O
distributed	O
,	O
but	O
often	O
implies	O
that	O
it	O
is	O
physically	O
distributed	O
as	O
well	O
.	O
</s>
<s>
Distributed	B-Operating_System
shared	I-Operating_System
memory	I-Operating_System
and	O
memory	B-General_Concept
virtualization	I-General_Concept
combine	O
the	O
two	O
approaches	O
,	O
where	O
the	O
processing	O
element	O
has	O
its	O
own	O
local	O
memory	O
and	O
access	O
to	O
the	O
memory	O
on	O
non-local	O
processors	O
.	O
</s>
<s>
On	O
the	O
supercomputers	B-Architecture
,	O
distributed	B-Operating_System
shared	I-Operating_System
memory	I-Operating_System
space	O
can	O
be	O
implemented	O
using	O
the	O
programming	O
model	O
such	O
as	O
PGAS	B-Application
.	O
</s>
<s>
This	O
model	O
allows	O
processes	B-Operating_System
on	O
one	O
compute	O
node	O
to	O
transparently	O
access	O
the	O
remote	O
memory	O
of	O
another	O
compute	O
node	O
.	O
</s>
<s>
All	O
compute	O
nodes	O
are	O
also	O
connected	O
to	O
an	O
external	O
shared	B-Operating_System
memory	I-Operating_System
system	O
via	O
high-speed	O
interconnect	B-General_Concept
,	O
such	O
as	O
Infiniband	B-Architecture
,	O
this	O
external	O
shared	B-Operating_System
memory	I-Operating_System
system	O
is	O
known	O
as	O
burst	B-Operating_System
buffer	I-Operating_System
,	O
which	O
is	O
typically	O
built	O
from	O
arrays	O
of	O
non-volatile	B-General_Concept
memory	I-General_Concept
physically	O
distributed	O
across	O
multiple	O
I/O	O
nodes	O
.	O
</s>
<s>
right|thumbnail|400px|A	O
logical	O
view	O
of	O
a	O
non-uniform	B-Operating_System
memory	I-Operating_System
access	I-Operating_System
(	O
NUMA	O
)	O
architecture	O
.	O
</s>
<s>
Processors	O
in	O
one	O
directory	O
can	O
access	O
that	O
directory	O
's	O
memory	O
with	O
less	O
latency	B-General_Concept
than	O
they	O
can	O
access	O
memory	O
in	O
the	O
other	O
directory	O
's	O
memory	O
.	O
</s>
<s>
Computer	B-General_Concept
architectures	I-General_Concept
in	O
which	O
each	O
element	O
of	O
main	O
memory	O
can	O
be	O
accessed	O
with	O
equal	O
latency	B-General_Concept
and	O
bandwidth	O
are	O
known	O
as	O
uniform	B-Operating_System
memory	I-Operating_System
access	I-Operating_System
(	O
UMA	O
)	O
systems	O
.	O
</s>
<s>
Typically	O
,	O
that	O
can	O
be	O
achieved	O
only	O
by	O
a	O
shared	B-Operating_System
memory	I-Operating_System
system	O
,	O
in	O
which	O
the	O
memory	O
is	O
not	O
physically	O
distributed	O
.	O
</s>
<s>
A	O
system	O
that	O
does	O
not	O
have	O
this	O
property	O
is	O
known	O
as	O
a	O
non-uniform	B-Operating_System
memory	I-Operating_System
access	I-Operating_System
(	O
NUMA	O
)	O
architecture	O
.	O
</s>
<s>
Distributed	B-Operating_System
memory	I-Operating_System
systems	O
have	O
non-uniform	B-Operating_System
memory	I-Operating_System
access	I-Operating_System
.	O
</s>
<s>
Parallel	B-Operating_System
computer	I-Operating_System
systems	O
have	O
difficulties	O
with	O
caches	O
that	O
may	O
store	O
the	O
same	O
value	O
in	O
more	O
than	O
one	O
location	O
,	O
with	O
the	O
possibility	O
of	O
incorrect	O
program	O
execution	O
.	O
</s>
<s>
These	O
computers	O
require	O
a	O
cache	B-General_Concept
coherency	I-General_Concept
system	O
,	O
which	O
keeps	O
track	O
of	O
cached	O
values	O
and	O
strategically	O
purges	O
them	O
,	O
thus	O
ensuring	O
correct	O
program	O
execution	O
.	O
</s>
<s>
Bus	B-General_Concept
snooping	I-General_Concept
is	O
one	O
of	O
the	O
most	O
common	O
methods	O
for	O
keeping	O
track	O
of	O
which	O
values	O
are	O
being	O
accessed	O
(	O
and	O
thus	O
should	O
be	O
purged	O
)	O
.	O
</s>
<s>
Designing	O
large	O
,	O
high-performance	O
cache	B-General_Concept
coherence	I-General_Concept
systems	O
is	O
a	O
very	O
difficult	O
problem	O
in	O
computer	B-General_Concept
architecture	I-General_Concept
.	O
</s>
<s>
As	O
a	O
result	O
,	O
shared	B-Operating_System
memory	I-Operating_System
computer	B-General_Concept
architectures	I-General_Concept
do	O
not	O
scale	O
as	O
well	O
as	O
distributed	B-Operating_System
memory	I-Operating_System
systems	O
do	O
.	O
</s>
<s>
Processor	O
–	O
processor	O
and	O
processor	O
–	O
memory	O
communication	B-Architecture
can	O
be	O
implemented	O
in	O
hardware	O
in	O
several	O
ways	O
,	O
including	O
via	O
shared	O
(	O
either	O
multiported	O
or	O
multiplexed	B-Architecture
)	O
memory	O
,	O
a	O
crossbar	O
switch	O
,	O
a	O
shared	O
bus	B-General_Concept
or	O
an	O
interconnect	B-General_Concept
network	O
of	O
a	O
myriad	O
of	O
topologies	B-Architecture
including	O
star	B-Architecture
,	O
ring	B-Architecture
,	O
tree	O
,	O
hypercube	O
,	O
fat	O
hypercube	O
(	O
a	O
hypercube	O
with	O
more	O
than	O
one	O
processor	O
at	O
a	O
node	O
)	O
,	O
or	O
n-dimensional	B-Architecture
mesh	I-Architecture
.	O
</s>
<s>
Parallel	B-Operating_System
computers	I-Operating_System
based	O
on	O
interconnected	O
networks	O
need	O
to	O
have	O
some	O
kind	O
of	O
routing	B-Protocol
to	O
enable	O
the	O
passing	O
of	O
messages	O
between	O
nodes	O
that	O
are	O
not	O
directly	O
connected	O
.	O
</s>
<s>
The	O
medium	O
used	O
for	O
communication	B-Architecture
between	O
the	O
processors	O
is	O
likely	O
to	O
be	O
hierarchical	O
in	O
large	O
multiprocessor	O
machines	O
.	O
</s>
<s>
Parallel	B-Operating_System
computers	I-Operating_System
can	O
be	O
roughly	O
classified	O
according	O
to	O
the	O
level	O
at	O
which	O
the	O
hardware	O
supports	O
parallelism	B-Operating_System
.	O
</s>
<s>
These	O
are	O
not	O
mutually	O
exclusive	O
;	O
for	O
example	O
,	O
clusters	B-Architecture
of	O
symmetric	B-Operating_System
multiprocessors	I-Operating_System
are	O
relatively	O
common	O
.	O
</s>
<s>
A	O
multi-core	B-Architecture
processor	I-Architecture
is	O
a	O
processor	O
that	O
includes	O
multiple	O
processing	B-General_Concept
units	I-General_Concept
(	O
called	O
"	O
cores	O
"	O
)	O
on	O
the	O
same	O
chip	O
.	O
</s>
<s>
This	O
processor	O
differs	O
from	O
a	O
superscalar	B-General_Concept
processor	I-General_Concept
,	O
which	O
includes	O
multiple	O
execution	B-General_Concept
units	I-General_Concept
and	O
can	O
issue	O
multiple	O
instructions	O
per	O
clock	O
cycle	O
from	O
one	O
instruction	O
stream	O
(	O
thread	B-Operating_System
)	O
;	O
in	O
contrast	O
,	O
a	O
multi-core	B-Architecture
processor	I-Architecture
can	O
issue	O
multiple	O
instructions	O
per	O
clock	O
cycle	O
from	O
multiple	O
instruction	O
streams	O
.	O
</s>
<s>
IBM	O
's	O
Cell	B-General_Concept
microprocessor	I-General_Concept
,	O
designed	O
for	O
use	O
in	O
the	O
Sony	B-Operating_System
PlayStation	I-Operating_System
3	I-Operating_System
,	O
is	O
a	O
prominent	O
multi-core	B-Architecture
processor	I-Architecture
.	O
</s>
<s>
Each	O
core	O
in	O
a	O
multi-core	B-Architecture
processor	I-Architecture
can	O
potentially	O
be	O
superscalar	B-General_Concept
as	O
well	O
—	O
that	O
is	O
,	O
on	O
every	O
clock	O
cycle	O
,	O
each	O
core	O
can	O
issue	O
multiple	O
instructions	O
from	O
one	O
thread	B-Operating_System
.	O
</s>
<s>
Simultaneous	B-Operating_System
multithreading	I-Operating_System
(	O
of	O
which	O
Intel	O
's	O
Hyper-Threading	B-Operating_System
is	O
the	O
best	O
known	O
)	O
was	O
an	O
early	O
form	O
of	O
pseudo-multi-coreism	O
.	O
</s>
<s>
A	O
processor	O
capable	O
of	O
concurrent	B-Operating_System
multithreading	B-Operating_System
includes	O
multiple	O
execution	B-General_Concept
units	I-General_Concept
in	O
the	O
same	O
processing	O
unit	O
—	O
that	O
is	O
it	O
has	O
a	O
superscalar	B-General_Concept
architecture	I-General_Concept
—	O
and	O
can	O
issue	O
multiple	O
instructions	O
per	O
clock	O
cycle	O
from	O
multiple	O
threads	B-Operating_System
.	O
</s>
<s>
Temporal	B-Operating_System
multithreading	I-Operating_System
on	O
the	O
other	O
hand	O
includes	O
a	O
single	O
execution	B-General_Concept
unit	I-General_Concept
in	O
the	O
same	O
processing	O
unit	O
and	O
can	O
issue	O
one	O
instruction	O
at	O
a	O
time	O
from	O
multiple	O
threads	B-Operating_System
.	O
</s>
<s>
A	O
symmetric	B-Operating_System
multiprocessor	I-Operating_System
(	O
SMP	O
)	O
is	O
a	O
computer	O
system	O
with	O
multiple	O
identical	O
processors	O
that	O
share	O
memory	O
and	O
connect	O
via	O
a	O
bus.Hennessy	O
and	O
Patterson	O
,	O
p	O
.	O
549	O
.	O
</s>
<s>
Bus	B-Architecture
contention	I-Architecture
prevents	O
bus	B-General_Concept
architectures	O
from	O
scaling	O
.	O
</s>
<s>
Because	O
of	O
the	O
small	O
size	O
of	O
the	O
processors	O
and	O
the	O
significant	O
reduction	O
in	O
the	O
requirements	O
for	O
bus	B-General_Concept
bandwidth	O
achieved	O
by	O
large	O
caches	O
,	O
such	O
symmetric	B-Operating_System
multiprocessors	I-Operating_System
are	O
extremely	O
cost-effective	O
,	O
provided	O
that	O
a	O
sufficient	O
amount	O
of	O
memory	O
bandwidth	O
exists	O
.	O
</s>
<s>
A	O
distributed	O
computer	O
(	O
also	O
known	O
as	O
a	O
distributed	B-Operating_System
memory	I-Operating_System
multiprocessor	O
)	O
is	O
a	O
distributed	B-Operating_System
memory	I-Operating_System
computer	O
system	O
in	O
which	O
the	O
processing	O
elements	O
are	O
connected	O
by	O
a	O
network	O
.	O
</s>
<s>
The	O
terms	O
"	O
concurrent	B-Architecture
computing	I-Architecture
"	O
,	O
"	O
parallel	B-Operating_System
computing	I-Operating_System
"	O
,	O
and	O
"	O
distributed	B-Architecture
computing	I-Architecture
"	O
have	O
a	O
lot	O
of	O
overlap	O
,	O
and	O
no	O
clear	O
distinction	O
exists	O
between	O
them.Ghosh	O
(	O
2007	O
)	O
,	O
p	O
.	O
10	O
.	O
</s>
<s>
The	O
same	O
system	O
may	O
be	O
characterized	O
both	O
as	O
"	O
parallel	O
"	O
and	O
"	O
distributed	O
"	O
;	O
the	O
processors	O
in	O
a	O
typical	O
distributed	B-Architecture
system	I-Architecture
run	O
concurrently	O
in	O
parallel.Lynch	O
(	O
1996	O
)	O
,	O
p	O
.	O
xix	O
,	O
1	O
–	O
2	O
.	O
</s>
<s>
Clusters	B-Architecture
are	O
composed	O
of	O
multiple	O
standalone	O
machines	O
connected	O
by	O
a	O
network	O
.	O
</s>
<s>
While	O
machines	O
in	O
a	O
cluster	O
do	O
not	O
have	O
to	O
be	O
symmetric	O
,	O
load	B-Application
balancing	I-Application
is	O
more	O
difficult	O
if	O
they	O
are	O
not	O
.	O
</s>
<s>
The	O
most	O
common	O
type	O
of	O
cluster	O
is	O
the	O
Beowulf	B-Operating_System
cluster	I-Operating_System
,	O
which	O
is	O
a	O
cluster	O
implemented	O
on	O
multiple	O
identical	O
commercial	O
off-the-shelf	O
computers	O
connected	O
with	O
a	O
TCP/IP	B-Protocol
Ethernet	O
local	O
area	O
network.Beowulf	O
definition	O
.	O
</s>
<s>
Beowulf	B-Operating_System
technology	O
was	O
originally	O
developed	O
by	O
Thomas	O
Sterling	O
and	O
Donald	O
Becker	O
.	O
</s>
<s>
87%	O
of	O
all	O
Top500	B-Operating_System
supercomputers	B-Architecture
are	O
clusters	B-Architecture
.	O
</s>
<s>
The	O
remaining	O
are	O
Massively	B-Operating_System
Parallel	I-Operating_System
Processors	O
,	O
explained	O
below	O
.	O
</s>
<s>
Because	O
grid	B-Architecture
computing	I-Architecture
systems	O
(	O
described	O
below	O
)	O
can	O
easily	O
handle	O
embarrassingly	B-Operating_System
parallel	I-Operating_System
problems	I-Operating_System
,	O
modern	O
clusters	B-Architecture
are	O
typically	O
designed	O
to	O
handle	O
more	O
difficult	O
problems	O
—	O
problems	O
that	O
require	O
nodes	O
to	O
share	O
intermediate	O
results	O
with	O
each	O
other	O
more	O
often	O
.	O
</s>
<s>
This	O
requires	O
a	O
high	O
bandwidth	O
and	O
,	O
more	O
importantly	O
,	O
a	O
low-latency	O
interconnection	O
network	O
.	O
</s>
<s>
Many	O
historic	O
and	O
current	O
supercomputers	B-Architecture
use	O
customized	O
high-performance	O
network	O
hardware	O
specifically	O
designed	O
for	O
cluster	B-Architecture
computing	I-Architecture
,	O
such	O
as	O
the	O
Cray	O
Gemini	O
network	O
.	O
</s>
<s>
"	O
Interconnect	B-General_Concept
"	O
.	O
</s>
<s>
As	O
of	O
2014	O
,	O
most	O
current	O
supercomputers	B-Architecture
use	O
some	O
off-the-shelf	O
standard	O
network	O
hardware	O
,	O
often	O
Myrinet	B-General_Concept
,	O
InfiniBand	B-Architecture
,	O
or	O
Gigabit	O
Ethernet	O
.	O
</s>
<s>
A	O
massively	B-Operating_System
parallel	I-Operating_System
processor	O
(	O
MPP	O
)	O
is	O
a	O
single	O
computer	O
with	O
many	O
networked	O
processors	O
.	O
</s>
<s>
MPPs	B-Operating_System
have	O
many	O
of	O
the	O
same	O
characteristics	O
as	O
clusters	B-Architecture
,	O
but	O
MPPs	B-Operating_System
have	O
specialized	O
interconnect	B-General_Concept
networks	O
(	O
whereas	O
clusters	B-Architecture
use	O
commodity	O
hardware	O
for	O
networking	O
)	O
.	O
</s>
<s>
MPPs	B-Operating_System
also	O
tend	O
to	O
be	O
larger	O
than	O
clusters	B-Architecture
,	O
typically	O
having	O
"	O
far	O
more	O
"	O
than	O
100	O
processors.Hennessy	O
and	O
Patterson	O
,	O
p	O
.	O
537	O
.	O
</s>
<s>
In	O
an	O
MPP	O
,	O
"	O
each	O
CPU	O
contains	O
its	O
own	O
memory	O
and	O
copy	O
of	O
the	O
operating	B-General_Concept
system	I-General_Concept
and	O
application	O
.	O
</s>
<s>
Each	O
subsystem	O
communicates	O
with	O
the	O
others	O
via	O
a	O
high-speed	O
interconnect	B-General_Concept
.	O
</s>
<s>
IBM	O
's	O
Blue	B-Operating_System
Gene/L	I-Operating_System
,	O
the	O
fifth	O
fastest	B-Operating_System
supercomputer	I-Operating_System
in	O
the	O
world	O
according	O
to	O
the	O
June	O
2009	O
TOP500	B-Operating_System
ranking	O
,	O
is	O
an	O
MPP	O
.	O
</s>
<s>
Grid	B-Architecture
computing	I-Architecture
is	O
the	O
most	O
distributed	O
form	O
of	O
parallel	B-Operating_System
computing	I-Operating_System
.	O
</s>
<s>
Because	O
of	O
the	O
low	O
bandwidth	O
and	O
extremely	O
high	O
latency	B-General_Concept
available	O
on	O
the	O
Internet	O
,	O
distributed	B-Architecture
computing	I-Architecture
typically	O
deals	O
only	O
with	O
embarrassingly	B-Operating_System
parallel	I-Operating_System
problems	I-Operating_System
.	O
</s>
<s>
Most	O
grid	B-Architecture
computing	I-Architecture
applications	O
use	O
middleware	B-General_Concept
(	O
software	O
that	O
sits	O
between	O
the	O
operating	B-General_Concept
system	I-General_Concept
and	O
the	O
application	O
to	O
manage	O
network	O
resources	O
and	O
standardize	O
the	B-Application
software	I-Application
interface	O
)	O
.	O
</s>
<s>
The	O
most	O
common	O
grid	B-Architecture
computing	I-Architecture
middleware	B-General_Concept
is	O
the	O
Berkeley	B-Operating_System
Open	I-Operating_System
Infrastructure	I-Operating_System
for	I-Operating_System
Network	I-Operating_System
Computing	I-Operating_System
(	O
BOINC	B-Operating_System
)	O
.	O
</s>
<s>
Often	O
volunteer	B-Operating_System
computing	I-Operating_System
software	O
makes	O
use	O
of	O
"	O
spare	O
cycles	O
"	O
,	O
performing	O
computations	O
at	O
times	O
when	O
a	O
computer	O
is	O
idling	O
.	O
</s>
<s>
Within	O
parallel	B-Operating_System
computing	I-Operating_System
,	O
there	O
are	O
specialized	O
parallel	O
devices	O
that	O
remain	O
niche	O
areas	O
of	O
interest	O
.	O
</s>
<s>
While	O
not	O
domain-specific	B-Language
,	O
they	O
tend	O
to	O
be	O
applicable	O
to	O
only	O
a	O
few	O
classes	O
of	O
parallel	O
problems	O
.	O
</s>
<s>
Reconfigurable	B-Architecture
computing	I-Architecture
is	O
the	O
use	O
of	O
a	O
field-programmable	B-Architecture
gate	I-Architecture
array	I-Architecture
(	O
FPGA	B-Architecture
)	O
as	O
a	O
co-processor	O
to	O
a	O
general-purpose	O
computer	O
.	O
</s>
<s>
An	O
FPGA	B-Architecture
is	O
,	O
in	O
essence	O
,	O
a	O
computer	O
chip	O
that	O
can	O
rewire	O
itself	O
for	O
a	O
given	O
task	O
.	O
</s>
<s>
FPGAs	B-Architecture
can	O
be	O
programmed	O
with	O
hardware	O
description	O
languages	O
such	O
as	O
VHDL	B-Language
or	O
Verilog	B-Language
.	O
</s>
<s>
Several	O
vendors	O
have	O
created	O
C	B-Application
to	I-Application
HDL	I-Application
languages	O
that	O
attempt	O
to	O
emulate	O
the	O
syntax	O
and	O
semantics	O
of	O
the	O
C	B-Language
programming	I-Language
language	I-Language
,	O
with	O
which	O
most	O
programmers	O
are	O
familiar	O
.	O
</s>
<s>
The	O
best	O
known	O
C	B-Application
to	I-Application
HDL	I-Application
languages	O
are	O
Mitrion-C	B-General_Concept
,	O
Impulse	B-Language
C	I-Language
,	O
and	O
Handel-C	B-Language
.	O
</s>
<s>
Specific	O
subsets	O
of	O
SystemC	B-Language
based	O
on	O
C++	O
can	O
also	O
be	O
used	O
for	O
this	O
purpose	O
.	O
</s>
<s>
AMD	O
's	O
decision	O
to	O
open	O
its	O
HyperTransport	B-Device
technology	O
to	O
third-party	O
vendors	O
has	O
become	O
the	O
enabling	O
technology	O
for	O
high-performance	O
reconfigurable	O
computing.D	O
'	O
Amour	O
,	O
Michael	O
R.	O
,	O
Chief	O
Operating	O
Officer	O
,	O
DRC	O
Computer	O
Corporation	O
.	O
</s>
<s>
"	O
Standard	O
Reconfigurable	B-Architecture
Computing	I-Architecture
"	O
.	O
</s>
<s>
According	O
to	O
Michael	O
R	O
.	O
D'Amour	O
,	O
Chief	O
Operating	O
Officer	O
of	O
DRC	O
Computer	O
Corporation	O
,	O
"	O
when	O
we	O
first	O
walked	O
into	O
AMD	O
,	O
they	O
called	O
us	O
'	O
the	O
socket	B-General_Concept
stealers.	O
'	O
</s>
<s>
General-purpose	O
computing	O
on	O
graphics	B-Architecture
processing	I-Architecture
units	I-Architecture
(	O
GPGPU	O
)	O
is	O
a	O
fairly	O
recent	O
trend	O
in	O
computer	O
engineering	O
research	O
.	O
</s>
<s>
GPUs	B-Architecture
are	O
co-processors	O
that	O
have	O
been	O
heavily	O
optimized	O
for	O
computer	O
graphics	O
processing.Boggan	O
,	O
Sha'Kia	O
and	O
Daniel	O
M	O
.	O
Pressel	O
(	O
August	O
2007	O
)	O
.	O
</s>
<s>
GPUs	B-Architecture
:	O
An	O
Emerging	O
Platform	O
for	O
General-Purpose	O
Computation	O
(	O
PDF	O
)	O
.	O
</s>
<s>
Computer	O
graphics	O
processing	O
is	O
a	O
field	O
dominated	O
by	O
data	B-Operating_System
parallel	I-Operating_System
operations	O
—	O
particularly	O
linear	B-Language
algebra	I-Language
matrix	B-Architecture
operations	O
.	O
</s>
<s>
In	O
the	O
early	O
days	O
,	O
GPGPU	O
programs	O
used	O
the	O
normal	O
graphics	O
APIs	B-Application
for	O
executing	O
programs	O
.	O
</s>
<s>
However	O
,	O
several	O
new	O
programming	O
languages	O
and	O
platforms	O
have	O
been	O
built	O
to	O
do	O
general	O
purpose	O
computation	O
on	O
GPUs	B-Architecture
with	O
both	O
Nvidia	O
and	O
AMD	O
releasing	O
programming	O
environments	O
with	O
CUDA	B-Architecture
and	O
Stream	O
SDK	O
respectively	O
.	O
</s>
<s>
Other	O
GPU	B-Architecture
programming	O
languages	O
include	O
BrookGPU	B-Library
,	O
PeakStream	O
,	O
and	O
RapidMind	O
.	O
</s>
<s>
Nvidia	O
has	O
also	O
released	O
specific	O
products	O
for	O
computation	O
in	O
their	O
Tesla	B-Device
series	I-Device
.	O
</s>
<s>
The	O
technology	O
consortium	O
Khronos	O
Group	O
has	O
released	O
the	O
OpenCL	B-Application
specification	O
,	O
which	O
is	O
a	O
framework	O
for	O
writing	O
programs	O
that	O
execute	O
across	O
platforms	O
consisting	O
of	O
CPUs	O
and	O
GPUs	B-Architecture
.	O
</s>
<s>
AMD	O
,	O
Apple	O
,	O
Intel	O
,	O
Nvidia	O
and	O
others	O
are	O
supporting	O
OpenCL	B-Application
.	O
</s>
<s>
"	O
Systematic	O
Generation	O
of	O
Executing	O
Programs	O
for	O
Processor	O
Elements	O
in	O
Parallel	O
ASIC	O
or	O
FPGA-Based	O
Systems	O
and	O
Their	O
Transformation	O
into	O
VHDL-Descriptions	O
of	O
Processor	O
Element	O
Control	B-General_Concept
Units	I-General_Concept
"	O
.	O
</s>
<s>
However	O
,	O
ASICs	O
are	O
created	O
by	O
UV	B-Algorithm
photolithography	I-Algorithm
.	O
</s>
<s>
This	O
process	B-Operating_System
requires	O
a	O
mask	O
set	O
,	O
which	O
can	O
be	O
extremely	O
expensive	O
.	O
</s>
<s>
(	O
The	O
smaller	O
the	O
transistors	B-Application
required	O
for	O
the	O
chip	O
,	O
the	O
more	O
expensive	O
the	O
mask	O
will	O
be	O
.	O
)	O
</s>
<s>
High	O
initial	O
cost	O
,	O
and	O
the	O
tendency	O
to	O
be	O
overtaken	O
by	O
Moore's-law-driven	O
general-purpose	O
computing	O
,	O
has	O
rendered	O
ASICs	O
unfeasible	O
for	O
most	O
parallel	B-Operating_System
computing	I-Operating_System
applications	O
.	O
</s>
<s>
One	O
example	O
is	O
the	O
PFLOPS	O
RIKEN	B-Algorithm
MDGRAPE-3	I-Algorithm
machine	O
which	O
uses	O
custom	O
ASICs	O
for	O
molecular	O
dynamics	O
simulation	O
.	O
</s>
<s>
A	O
vector	B-Operating_System
processor	I-Operating_System
is	O
a	O
CPU	O
or	O
computer	O
system	O
that	O
can	O
execute	O
the	O
same	O
instruction	O
on	O
large	O
sets	O
of	O
data	B-Operating_System
.	O
</s>
<s>
Vector	B-Operating_System
processors	I-Operating_System
have	O
high-level	O
operations	O
that	O
work	O
on	O
linear	O
arrays	O
of	O
numbers	O
or	O
vectors	O
.	O
</s>
<s>
An	O
example	O
vector	O
operation	O
is	O
A	O
=	O
B	O
×	O
C	B-Language
,	O
where	O
A	O
,	O
B	O
,	O
and	O
C	B-Language
are	O
each	O
64-element	O
vectors	O
of	O
64-bit	B-Device
floating-point	O
numbers.Patterson	O
and	O
Hennessy	O
,	O
p	O
.	O
751	O
.	O
</s>
<s>
However	O
,	O
vector	B-Operating_System
processors	I-Operating_System
—	O
both	O
as	O
CPUs	O
and	O
as	O
full	O
computer	O
systems	O
—	O
have	O
generally	O
disappeared	O
.	O
</s>
<s>
Modern	O
processor	B-General_Concept
instruction	I-General_Concept
sets	I-General_Concept
do	O
include	O
some	O
vector	B-Operating_System
processing	I-Operating_System
instructions	O
,	O
such	O
as	O
with	O
Freescale	O
Semiconductor	O
's	O
AltiVec	B-General_Concept
and	O
Intel	O
's	O
Streaming	B-General_Concept
SIMD	I-General_Concept
Extensions	I-General_Concept
(	O
SSE	O
)	O
.	O
</s>
<s>
Concurrent	B-Language
programming	I-Language
languages	I-Language
,	O
libraries	B-Library
,	O
APIs	B-Application
,	O
and	O
parallel	B-Application
programming	I-Application
models	I-Application
(	O
such	O
as	O
algorithmic	B-Language
skeletons	I-Language
)	O
have	O
been	O
created	O
for	O
programming	O
parallel	B-Operating_System
computers	I-Operating_System
.	O
</s>
<s>
These	O
can	O
generally	O
be	O
divided	O
into	O
classes	O
based	O
on	O
the	O
assumptions	O
they	O
make	O
about	O
the	O
underlying	O
memory	O
architecture	O
—	O
shared	B-Operating_System
memory	I-Operating_System
,	O
distributed	B-Operating_System
memory	I-Operating_System
,	O
or	O
shared	O
distributed	B-Operating_System
memory	I-Operating_System
.	O
</s>
<s>
Shared	B-Operating_System
memory	I-Operating_System
programming	I-Operating_System
languages	O
communicate	O
by	O
manipulating	O
shared	B-Operating_System
memory	I-Operating_System
variables	O
.	O
</s>
<s>
Distributed	B-Operating_System
memory	I-Operating_System
uses	O
message	B-Architecture
passing	I-Architecture
.	O
</s>
<s>
POSIX	B-Operating_System
Threads	I-Operating_System
and	O
OpenMP	B-Application
are	O
two	O
of	O
the	O
most	O
widely	O
used	O
shared	B-Operating_System
memory	I-Operating_System
APIs	B-Application
,	O
whereas	O
Message	B-Application
Passing	I-Application
Interface	I-Application
(	O
MPI	O
)	O
is	O
the	O
most	O
widely	O
used	O
message-passing	B-Architecture
system	O
API.The	O
Sidney	O
Fernbach	O
Award	O
given	O
to	O
MPI	O
inventor	O
Bill	O
Gropp	O
refers	O
to	O
MPI	O
as	O
"	O
the	O
dominant	O
HPC	O
communications	O
interface	O
"	O
One	O
concept	O
used	O
in	O
programming	O
parallel	B-Operating_System
programs	I-Operating_System
is	O
the	O
future	B-Operating_System
concept	I-Operating_System
,	O
where	O
one	O
part	O
of	O
a	O
program	O
promises	O
to	O
deliver	O
a	O
required	O
datum	O
to	O
another	O
part	O
of	O
a	O
program	O
at	O
some	O
future	O
time	O
.	O
</s>
<s>
Efforts	O
to	O
standardize	O
parallel	B-Operating_System
programming	I-Operating_System
include	O
an	O
open	O
standard	O
called	O
OpenHMPP	B-Application
for	O
hybrid	O
multi-core	B-Architecture
parallel	B-Operating_System
programming	I-Operating_System
.	O
</s>
<s>
The	O
OpenHMPP	B-Application
directive-based	O
programming	O
model	O
offers	O
a	O
syntax	O
to	O
efficiently	O
offload	O
computations	O
on	O
hardware	O
accelerators	O
and	O
to	O
optimize	O
data	B-Operating_System
movement	O
to/from	O
the	O
hardware	O
memory	O
using	O
remote	B-Operating_System
procedure	I-Operating_System
calls	I-Operating_System
.	O
</s>
<s>
The	O
rise	O
of	O
consumer	O
GPUs	B-Architecture
has	O
led	O
to	O
support	O
for	O
compute	B-Operating_System
kernels	I-Operating_System
,	O
either	O
in	O
graphics	O
APIs	B-Application
(	O
referred	O
to	O
as	O
compute	B-Operating_System
shaders	I-Operating_System
)	O
,	O
in	O
dedicated	O
APIs	B-Application
(	O
such	O
as	O
OpenCL	B-Application
)	O
,	O
or	O
in	O
other	O
language	O
extensions	O
.	O
</s>
<s>
Automatic	O
parallelization	B-Operating_System
of	O
a	O
sequential	B-Algorithm
program	O
by	O
a	O
compiler	B-Language
is	O
the	O
"	O
holy	O
grail	O
"	O
of	O
parallel	B-Operating_System
computing	I-Operating_System
,	O
especially	O
with	O
the	O
aforementioned	O
limit	O
of	O
processor	O
frequency	O
.	O
</s>
<s>
Despite	O
decades	O
of	O
work	O
by	O
compiler	B-Language
researchers	O
,	O
automatic	O
parallelization	B-Operating_System
has	O
had	O
only	O
limited	O
success	O
.	O
</s>
<s>
Mainstream	O
parallel	B-Operating_System
programming	I-Operating_System
languages	O
remain	O
either	O
explicitly	O
parallel	O
or	O
(	O
at	O
best	O
)	O
partially	B-Operating_System
implicit	I-Operating_System
,	O
in	O
which	O
a	O
programmer	O
gives	O
the	O
compiler	B-Language
directives	O
for	O
parallelization	B-Operating_System
.	O
</s>
<s>
A	O
few	O
fully	O
implicit	O
parallel	B-Operating_System
programming	I-Operating_System
languages	O
exist	O
—	O
SISAL	B-Language
,	O
Parallel	O
Haskell	B-Language
,	O
SequenceL	B-Operating_System
,	O
System	B-Language
C	I-Language
(	O
for	O
FPGAs	B-Architecture
)	O
,	O
Mitrion-C	B-General_Concept
,	O
VHDL	B-Language
,	O
and	O
Verilog	B-Language
.	O
</s>
<s>
Application	B-General_Concept
checkpointing	I-General_Concept
is	O
a	O
technique	O
whereby	O
the	O
computer	O
system	O
takes	O
a	O
"	O
snapshot	O
"	O
of	O
the	O
application	O
—	O
a	O
record	O
of	O
all	O
current	O
resource	O
allocations	O
and	O
variable	O
states	O
,	O
akin	O
to	O
a	O
core	B-Error_Name
dump	I-Error_Name
—	O
;	O
this	O
information	O
can	O
be	O
used	O
to	O
restore	O
the	O
program	O
if	O
the	O
computer	O
should	O
fail	O
.	O
</s>
<s>
Application	B-General_Concept
checkpointing	I-General_Concept
means	O
that	O
the	O
program	O
has	O
to	O
restart	O
from	O
only	O
its	O
last	O
checkpoint	O
rather	O
than	O
the	O
beginning	O
.	O
</s>
<s>
As	O
parallel	B-Operating_System
computers	I-Operating_System
become	O
larger	O
and	O
faster	O
,	O
we	O
are	O
now	O
able	O
to	O
solve	O
problems	O
that	O
had	O
previously	O
taken	O
too	O
long	O
to	O
run	O
.	O
</s>
<s>
Fields	O
as	O
varied	O
as	O
bioinformatics	O
(	O
for	O
protein	O
folding	O
and	O
sequence	O
analysis	O
)	O
and	O
economics	O
(	O
for	O
mathematical	O
finance	O
)	O
have	O
taken	O
advantage	O
of	O
parallel	B-Operating_System
computing	I-Operating_System
.	O
</s>
<s>
Common	O
types	O
of	O
problems	O
in	O
parallel	B-Operating_System
computing	I-Operating_System
applications	O
include:Asanovic	O
,	O
Krste	O
,	O
et	O
al	O
.	O
</s>
<s>
"	O
The	O
Landscape	O
of	O
Parallel	B-Operating_System
Computing	I-Operating_System
Research	O
:	O
A	O
View	O
from	O
Berkeley	O
"	O
(	O
PDF	O
)	O
.	O
</s>
<s>
Parallel	B-Operating_System
computing	I-Operating_System
can	O
also	O
be	O
applied	O
to	O
the	O
design	O
of	O
fault-tolerant	B-General_Concept
computer	I-General_Concept
systems	I-General_Concept
,	O
particularly	O
via	O
lockstep	B-General_Concept
systems	O
performing	O
the	O
same	O
operation	O
in	O
parallel	O
.	O
</s>
<s>
This	O
provides	O
redundancy	O
in	O
case	O
one	O
component	O
fails	O
,	O
and	O
also	O
allows	O
automatic	O
error	B-Error_Name
detection	I-Error_Name
and	O
error	B-Error_Name
correction	I-Error_Name
if	O
the	O
results	O
differ	O
.	O
</s>
<s>
These	O
methods	O
can	O
be	O
used	O
to	O
help	O
prevent	O
single-event	O
upsets	O
caused	O
by	O
transient	O
errors.Dobel	O
,	O
B.	O
,	O
Hartig	O
,	O
H.	O
,	O
&	O
Engel	O
,	O
M	O
.	O
(	O
2012	O
)	O
"	O
Operating	B-General_Concept
system	I-General_Concept
support	O
for	O
redundant	O
multithreading	B-Operating_System
"	O
.	O
</s>
<s>
The	O
origins	O
of	O
true	O
(	O
MIMD	O
)	O
parallelism	B-Operating_System
go	O
back	O
to	O
Luigi	O
Federico	O
Menabrea	O
and	O
his	O
Sketch	O
of	O
the	O
Analytic	B-Device
Engine	I-Device
Invented	O
by	O
Charles	O
Babbage.Menabrea	O
,	O
L	O
.	O
F	O
.	O
(	O
1842	O
)	O
.	O
</s>
<s>
Sketch	O
of	O
the	O
Analytic	B-Device
Engine	I-Device
Invented	O
by	O
Charles	O
Babbage	O
.	O
</s>
<s>
quote	O
:	O
"	O
when	O
a	O
long	O
series	O
of	O
identical	O
computations	O
is	O
to	O
be	O
performed	O
,	O
such	O
as	O
those	O
required	O
for	O
the	O
formation	O
of	O
numerical	O
tables	O
,	O
the	O
machine	O
can	O
be	O
brought	O
into	O
play	O
so	O
as	O
to	O
give	O
several	O
results	O
at	O
the	O
same	O
time	O
,	O
which	O
will	O
greatly	O
abridge	O
the	O
whole	O
amount	O
of	O
the	O
processes	B-Operating_System
.	O
</s>
<s>
Hockney	O
,	O
C.R.	O
</s>
<s>
Parallel	B-Operating_System
Computers	I-Operating_System
2	O
:	O
Architecture	O
,	O
Programming	O
and	O
Algorithms	O
,	O
Volume	O
2	O
.	O
</s>
<s>
1988	O
.	O
p	O
.	O
8	O
quote	O
:	O
"	O
The	O
earliest	O
reference	O
to	O
parallelism	B-Operating_System
in	O
computer	B-General_Concept
design	I-General_Concept
is	O
thought	O
to	O
be	O
in	O
General	O
L	O
.	O
F	O
.	O
Menabrea	O
's	O
publication	O
in	O
…	O
1842	O
,	O
entitled	O
Sketch	B-Device
of	I-Device
the	I-Device
Analytical	I-Device
Engine	I-Device
Invented	O
by	O
Charles	O
Babbage	O
"	O
.	O
</s>
<s>
In	O
April	O
1958	O
,	O
Stanley	O
Gill	O
(	O
Ferranti	O
)	O
discussed	O
parallel	B-Operating_System
programming	I-Operating_System
and	O
the	O
need	O
for	O
branching	O
and	O
waiting	O
.	O
</s>
<s>
"	O
Parallel	B-Operating_System
Programming	I-Operating_System
"	O
,	O
S	O
.	O
Gill	O
,	O
The	O
Computer	O
Journal	O
Vol	O
.	O
</s>
<s>
Also	O
in	O
1958	O
,	O
IBM	O
researchers	O
John	O
Cocke	O
and	O
Daniel	O
Slotnick	O
discussed	O
the	O
use	O
of	O
parallelism	B-Operating_System
in	O
numerical	O
calculations	O
for	O
the	O
first	O
time	O
.	O
</s>
<s>
In	O
1967	O
,	O
Amdahl	O
and	O
Slotnick	O
published	O
a	O
debate	O
about	O
the	O
feasibility	O
of	O
parallel	B-Operating_System
processing	I-Operating_System
at	O
American	O
Federation	O
of	O
Information	O
Processing	O
Societies	O
Conference	O
.	O
</s>
<s>
It	O
was	O
during	O
this	O
debate	O
that	O
Amdahl	B-Operating_System
's	I-Operating_System
law	I-Operating_System
was	O
coined	O
to	O
define	O
the	O
limit	O
of	O
speed-up	B-Operating_System
due	O
to	O
parallelism	B-Operating_System
.	O
</s>
<s>
In	O
1969	O
,	O
Honeywell	O
introduced	O
its	O
first	O
Multics	B-Application
system	O
,	O
a	O
symmetric	B-Operating_System
multiprocessor	I-Operating_System
system	I-Operating_System
capable	O
of	O
running	O
up	O
to	O
eight	O
processors	O
in	O
parallel	O
.	O
</s>
<s>
C.mmp	B-Operating_System
,	O
a	O
multi-processor	B-Operating_System
project	O
at	O
Carnegie	O
Mellon	O
University	O
in	O
the	O
1970s	O
,	O
was	O
among	O
the	O
first	O
multiprocessors	O
with	O
more	O
than	O
a	O
few	O
processors	O
.	O
</s>
<s>
The	O
first	O
bus-connected	O
multiprocessor	O
with	O
snooping	O
caches	O
was	O
the	O
Synapse	O
N+1	O
in	O
1984	O
.	O
</s>
<s>
SIMD	O
parallel	B-Operating_System
computers	I-Operating_System
can	O
be	O
traced	O
back	O
to	O
the	O
1970s	O
.	O
</s>
<s>
The	O
motivation	O
behind	O
early	O
SIMD	O
computers	O
was	O
to	O
amortize	O
the	O
gate	O
delay	O
of	O
the	O
processor	O
's	O
control	B-General_Concept
unit	I-General_Concept
over	O
multiple	O
instructions.Patterson	O
and	O
Hennessy	O
,	O
p	O
.	O
749	O
.	O
</s>
<s>
In	O
1964	O
,	O
Slotnick	O
had	O
proposed	O
building	O
a	O
massively	B-Operating_System
parallel	I-Operating_System
computer	I-Operating_System
for	O
the	O
Lawrence	O
Livermore	O
National	O
Laboratory	O
.	O
</s>
<s>
His	O
design	O
was	O
funded	O
by	O
the	O
US	O
Air	O
Force	O
,	O
which	O
was	O
the	O
earliest	O
SIMD	O
parallel-computing	O
effort	O
,	O
ILLIAC	B-Device
IV	I-Device
.	O
</s>
<s>
The	O
key	O
to	O
its	O
design	O
was	O
a	O
fairly	O
high	O
parallelism	B-Operating_System
,	O
with	O
up	O
to	O
256	O
processors	O
,	O
which	O
allowed	O
the	O
machine	O
to	O
work	O
on	O
large	O
datasets	O
in	O
what	O
would	O
later	O
be	O
known	O
as	O
vector	B-Operating_System
processing	I-Operating_System
.	O
</s>
<s>
However	O
,	O
ILLIAC	B-Device
IV	I-Device
was	O
called	O
"	O
the	O
most	O
infamous	O
of	O
supercomputers	B-Architecture
"	O
,	O
because	O
the	O
project	O
was	O
only	O
one-fourth	O
completed	O
,	O
but	O
took	O
11	O
years	O
and	O
cost	O
almost	O
four	O
times	O
the	O
original	O
estimate.Patterson	O
and	O
Hennessy	O
,	O
pp	O
.	O
</s>
<s>
749	O
–	O
50	O
:	O
"	O
Although	O
successful	O
in	O
pushing	O
several	O
technologies	O
useful	O
in	O
later	O
projects	O
,	O
the	O
ILLIAC	B-Device
IV	I-Device
failed	O
as	O
a	O
computer	O
.	O
</s>
<s>
It	O
was	O
perhaps	O
the	O
most	O
infamous	O
of	O
supercomputers	B-Architecture
.	O
</s>
<s>
When	O
it	O
was	O
finally	O
ready	O
to	O
run	O
its	O
first	O
real	O
application	O
in	O
1976	O
,	O
it	O
was	O
outperformed	O
by	O
existing	O
commercial	O
supercomputers	B-Architecture
such	O
as	O
the	O
Cray-1	B-Device
.	O
</s>
<s>
In	O
the	O
early	O
1970s	O
,	O
at	O
the	O
MIT	O
Computer	O
Science	O
and	O
Artificial	O
Intelligence	O
Laboratory	O
,	O
Marvin	O
Minsky	O
and	O
Seymour	O
Papert	O
started	O
developing	O
the	O
Society	O
of	O
Mind	O
theory	O
,	O
which	O
views	O
the	O
biological	O
brain	O
as	O
massively	B-Operating_System
parallel	I-Operating_System
computer	I-Operating_System
.	O
</s>
<s>
Similar	O
models	O
(	O
which	O
also	O
view	O
the	O
biological	O
brain	O
as	O
a	O
massively	B-Operating_System
parallel	I-Operating_System
computer	I-Operating_System
,	O
i.e.	O
,	O
the	O
brain	O
is	O
made	O
up	O
of	O
a	O
constellation	O
of	O
independent	O
or	O
semi-independent	O
agents	O
)	O
were	O
also	O
described	O
by	O
:	O
</s>
