<s>
In	O
computing	O
,	O
Page	B-General_Concept
Size	I-General_Concept
Extension	I-General_Concept
(	O
PSE	O
)	O
refers	O
to	O
a	O
feature	O
of	O
x86	B-Operating_System
processors	O
that	O
allows	O
for	O
pages	B-General_Concept
larger	O
than	O
the	O
traditional	O
4	O
KiB	O
size	O
.	O
</s>
<s>
It	O
was	O
introduced	O
in	O
the	O
original	B-General_Concept
Pentium	I-General_Concept
processor	O
,	O
but	O
it	O
was	O
only	O
publicly	O
documented	O
by	O
Intel	O
with	O
the	O
release	O
of	O
the	O
Pentium	B-Device
Pro	I-Device
.	O
</s>
<s>
The	O
CPUID	B-Architecture
instruction	O
can	O
be	O
used	O
to	O
identify	O
the	O
availability	O
of	O
PSE	O
on	O
x86	B-Operating_System
CPUs	B-Device
.	O
</s>
<s>
In	O
order	O
to	O
fulfill	O
this	O
request	O
,	O
an	O
operating	O
system	O
that	O
supports	O
paging	O
and	O
that	O
is	O
running	O
on	O
older	O
x86	B-Operating_System
CPUs	B-Device
will	O
have	O
to	O
allocate	O
256	O
pages	B-General_Concept
of	O
4KiB	O
each	O
.	O
</s>
<s>
An	O
overhead	O
of	O
1KiB	O
of	O
memory	O
is	O
required	O
for	O
maintaining	O
page	B-General_Concept
directories	O
and	O
page	B-General_Concept
tables	I-General_Concept
.	O
</s>
<s>
When	O
accessing	O
this	O
1MiB	O
memory	O
,	O
each	O
of	O
the	O
256	O
page	B-General_Concept
entries	O
would	O
be	O
cached	O
in	O
the	O
translation	B-Architecture
lookaside	I-Architecture
buffer	I-Architecture
(	O
TLB	O
;	O
a	O
cache	O
that	O
remembers	O
virtual	O
address	O
to	O
physical	O
address	O
translations	O
for	O
faster	O
lookup	O
on	O
subsequent	O
memory	O
requests	O
)	O
.	O
</s>
<s>
Cluttering	O
the	O
TLB	O
is	O
possibly	O
one	O
of	O
the	O
largest	O
disadvantages	O
of	O
having	O
several	O
page	B-General_Concept
entries	O
for	O
what	O
could	O
have	O
been	O
allocated	O
in	O
one	O
single	O
memory	O
block	O
.	O
</s>
<s>
If	O
the	O
TLB	O
gets	O
filled	O
,	O
then	O
a	O
TLB	O
entry	O
would	O
have	O
to	O
be	O
freed	O
,	O
the	O
page	B-General_Concept
directory	O
and	O
page	B-General_Concept
tables	I-General_Concept
would	O
have	O
to	O
be	O
“	O
walked	O
”	O
in	O
memory	O
,	O
and	O
finally	O
,	O
the	O
memory	O
would	O
be	O
accessed	O
and	O
the	O
new	O
entry	O
would	O
be	O
brought	O
into	O
the	O
TLB	O
.	O
</s>
<s>
This	O
is	O
a	O
severe	O
performance	O
penalty	O
and	O
was	O
possibly	O
the	O
largest	O
motivation	O
for	O
augmenting	O
the	O
x86	B-Operating_System
architecture	I-Operating_System
with	O
larger	O
page	B-General_Concept
sizes	I-General_Concept
.	O
</s>
<s>
The	O
PSE	O
allows	O
for	O
page	B-General_Concept
sizes	I-General_Concept
of	O
4MiB	O
to	O
exist	O
along	O
with	O
4KiB	O
pages	B-General_Concept
.	O
</s>
<s>
The	O
1MiB	O
request	O
described	O
previously	O
would	O
easily	O
be	O
fulfilled	O
with	O
a	O
single	O
4MiB	O
page	B-General_Concept
,	O
and	O
it	O
would	O
require	O
only	O
one	O
TLB	O
entry	O
.	O
</s>
<s>
However	O
,	O
the	O
disadvantage	O
of	O
using	O
larger	O
page	B-General_Concept
sizes	I-General_Concept
is	O
internal	B-Architecture
fragmentation	I-Architecture
.	O
</s>
<s>
In	O
traditional	O
32-bit	O
protected	B-Application
mode	I-Application
,	O
x86	B-Operating_System
processors	O
use	O
a	O
two-level	O
page	B-General_Concept
translation	O
scheme	O
,	O
where	O
the	O
control	B-Operating_System
register	I-Operating_System
CR3	O
points	O
to	O
a	O
single	O
4KiB-long	O
page	B-General_Concept
directory	O
,	O
which	O
is	O
divided	O
into	O
1024	O
×	O
4-byte	O
entries	O
that	O
point	O
to	O
4KiB-long	O
page	B-General_Concept
tables	I-General_Concept
,	O
similarly	O
consisting	O
of	O
1024	O
×	O
4-byte	O
entries	O
pointing	O
to	O
4KiB-long	O
pages	B-General_Concept
.	O
</s>
<s>
The	O
entries	O
in	O
the	O
page	B-General_Concept
directory	O
have	O
an	O
additional	O
flag	O
,	O
in	O
bit	O
7	O
,	O
named	O
PS	O
(	O
for	O
page	B-General_Concept
size	I-General_Concept
)	O
.	O
</s>
<s>
This	O
flag	O
was	O
ignored	O
without	O
PSE	O
,	O
but	O
now	O
,	O
the	O
page-directory	O
entry	O
with	O
PS	O
set	O
to	O
1	O
does	O
not	O
point	O
to	O
a	O
page	B-General_Concept
table	I-General_Concept
,	O
but	O
to	O
a	O
single	O
large	O
4MiB	O
page	B-General_Concept
.	O
</s>
<s>
The	O
page-directory	O
entry	O
with	O
PS	O
set	O
to	O
0	O
behaves	O
as	O
without	O
PSE	O
.	O
</s>
<s>
If	O
newer	O
PSE-36	B-General_Concept
capability	O
is	O
available	O
on	O
the	O
CPU	B-Device
,	O
as	O
checked	O
using	O
the	O
CPUID	B-Architecture
instruction	O
,	O
then	O
4	O
more	O
bits	O
,	O
in	O
addition	O
to	O
normal	O
10bits	O
,	O
are	O
used	O
inside	O
a	O
page-directory	O
entry	O
pointing	O
to	O
a	O
large	O
page	B-General_Concept
.	O
</s>
<s>
This	O
allows	O
a	O
large	O
page	B-General_Concept
to	O
be	O
located	O
in	O
36-bit	O
address	O
space	O
.	O
</s>
<s>
If	O
Physical	B-General_Concept
Address	I-General_Concept
Extension	I-General_Concept
(	O
PAE	O
)	O
is	O
used	O
,	O
the	O
size	O
of	O
large	O
pages	B-General_Concept
is	O
reduced	O
from	O
4MiB	O
down	O
to	O
2MiB	O
,	O
and	O
PSE	O
is	O
always	O
enabled	O
,	O
regardless	O
of	O
the	O
PSE	O
bit	O
in	O
CR4	O
.	O
</s>
