<s>
PWRficient	B-General_Concept
is	O
a	O
microprocessor	B-Architecture
series	O
by	O
P.A.	O
</s>
<s>
Semi	O
where	O
the	O
PA6T-1682M	O
was	O
the	O
only	O
one	O
that	O
became	O
an	O
actual	O
product	O
.	O
</s>
<s>
PWRficient	B-General_Concept
processors	O
comply	O
with	O
the	O
64-bit	B-Device
Power	B-Architecture
ISA	I-Architecture
,	O
and	O
are	O
designed	O
for	O
high	O
performance	O
and	O
extreme	O
power	O
efficiency	O
.	O
</s>
<s>
The	O
processors	O
are	O
highly	O
modular	O
and	O
can	O
be	O
combined	O
to	O
multi-core	B-Architecture
system-on-a-chip	B-Architecture
(	O
SoC	O
)	O
designs	O
,	O
combining	O
CPU	B-Device
,	O
northbridge	B-Device
,	O
and	O
southbridge	B-Device
functionality	O
on	O
a	O
single	O
processor	O
die	O
.	O
</s>
<s>
The	O
PA6T	B-General_Concept
is	O
the	O
first	O
and	O
only	O
processor	O
core	O
from	O
P.A.	O
</s>
<s>
Semi	O
,	O
in	O
two	O
distinct	O
product	O
lines	O
:	O
16xxM	O
dual	B-Architecture
core	I-Architecture
and	O
13xxM/E	O
single	O
core	O
.	O
</s>
<s>
The	O
PA6T	B-General_Concept
lines	O
differed	O
in	O
L2	B-General_Concept
cache	I-General_Concept
size	O
,	O
memory	B-General_Concept
controllers	I-General_Concept
,	O
communication	O
functionality	O
,	O
and	O
cryptography	O
offloading	O
features	O
.	O
</s>
<s>
The	O
PA6T	B-General_Concept
is	O
the	O
first	O
Power	B-Architecture
ISA	I-Architecture
core	O
designed	O
from	O
scratch	O
in	O
the	O
previous	O
ten	O
years	O
outside	O
the	O
AIM	O
alliance	O
,	O
which	O
included	O
IBM	O
,	O
Motorola	O
,	O
Freescale	O
,	O
and	O
Apple	O
Inc	O
.	O
</s>
<s>
Semi	O
,	O
it	O
was	O
suggested	O
that	O
its	O
fabrication	O
plants	O
would	O
have	O
manufactured	O
the	O
PWRficient	B-General_Concept
processors	O
.	O
</s>
<s>
PWRficient	B-General_Concept
processors	O
were	O
initially	O
shipped	O
to	O
select	O
customers	O
in	O
February	O
2007	O
and	O
were	O
released	O
worldwide	O
in	O
Q4	O
2007	O
.	O
</s>
<s>
Semi	O
was	O
bought	O
by	O
Apple	O
Inc	O
.	O
in	O
April	O
2008	O
,	O
and	O
closed	O
development	O
of	O
PWRficient	B-General_Concept
architecture	O
processors	O
.	O
</s>
<s>
Semi	O
PWRficient	B-General_Concept
were	O
later	O
integrated	O
into	O
Apple	B-Device
silicon	I-Device
.	O
</s>
<s>
PWRficient	B-General_Concept
processors	O
comprise	O
three	O
parts	O
:	O
</s>
<s>
64/64	O
kB	O
instruction	O
and	O
data	O
L1	B-General_Concept
caches	I-General_Concept
.	O
</s>
<s>
1	O
–	O
4	O
1067MHz	O
DDR2	O
memory	B-General_Concept
controllers	I-General_Concept
.	O
</s>
<s>
Mercury	B-Application
Computer	I-Application
Systems	I-Application
planned	O
the	O
1682M	O
processor	O
for	O
its	O
signal	O
and	O
image	B-Algorithm
processing	I-Algorithm
systems	O
.	O
</s>
<s>
NEC	O
planned	O
the	O
1682M	O
processor	O
for	O
its	O
storage	B-General_Concept
array	I-General_Concept
systems	O
.	O
</s>
<s>
AmigaOne	B-Device
X1000	I-Device
has	O
the	O
1682M	O
processor	O
as	O
CPU	B-Device
.	O
</s>
